1/* 2 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Rob Clark <robclark@freedesktop.org> 25 */ 26 27#include "tgsi/tgsi_text.h" 28#include "tgsi/tgsi_ureg.h" 29 30#include "freedreno_program.h" 31#include "freedreno_context.h" 32 33static void 34fd_fp_state_bind(struct pipe_context *pctx, void *hwcso) 35{ 36 struct fd_context *ctx = fd_context(pctx); 37 ctx->prog.fp = hwcso; 38 ctx->dirty_shader[PIPE_SHADER_FRAGMENT] |= FD_DIRTY_SHADER_PROG; 39 ctx->dirty |= FD_DIRTY_PROG; 40} 41 42static void 43fd_vp_state_bind(struct pipe_context *pctx, void *hwcso) 44{ 45 struct fd_context *ctx = fd_context(pctx); 46 ctx->prog.vp = hwcso; 47 ctx->dirty_shader[PIPE_SHADER_VERTEX] |= FD_DIRTY_SHADER_PROG; 48 ctx->dirty |= FD_DIRTY_PROG; 49} 50 51static const char *solid_fp = 52 "FRAG \n" 53 "PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1 \n" 54 "DCL CONST[0] \n" 55 "DCL OUT[0], COLOR \n" 56 " 0: MOV OUT[0], CONST[0] \n" 57 " 1: END \n"; 58 59static const char *solid_vp = 60 "VERT \n" 61 "DCL IN[0] \n" 62 "DCL OUT[0], POSITION \n" 63 " 0: MOV OUT[0], IN[0] \n" 64 " 1: END \n"; 65 66static const char *blit_vp = 67 "VERT \n" 68 "DCL IN[0] \n" 69 "DCL IN[1] \n" 70 "DCL OUT[0], GENERIC[0] \n" 71 "DCL OUT[1], POSITION \n" 72 " 0: MOV OUT[0], IN[0] \n" 73 " 0: MOV OUT[1], IN[1] \n" 74 " 1: END \n"; 75 76static void * assemble_tgsi(struct pipe_context *pctx, 77 const char *src, bool frag) 78{ 79 struct tgsi_token toks[32]; 80 struct pipe_shader_state cso = { 81 .tokens = toks, 82 }; 83 84 bool ret = tgsi_text_translate(src, toks, ARRAY_SIZE(toks)); 85 assume(ret); 86 87 if (frag) 88 return pctx->create_fs_state(pctx, &cso); 89 else 90 return pctx->create_vs_state(pctx, &cso); 91} 92 93static void * 94fd_prog_blit(struct pipe_context *pctx, int rts, bool depth) 95{ 96 int i; 97 struct ureg_src tc; 98 struct ureg_program *ureg; 99 100 debug_assert(rts <= MAX_RENDER_TARGETS); 101 102 ureg = ureg_create(PIPE_SHADER_FRAGMENT); 103 if (!ureg) 104 return NULL; 105 106 tc = ureg_DECL_fs_input( 107 ureg, TGSI_SEMANTIC_GENERIC, 0, TGSI_INTERPOLATE_PERSPECTIVE); 108 for (i = 0; i < rts; i++) 109 ureg_TEX(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, i), 110 TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, i)); 111 if (depth) 112 ureg_TEX(ureg, 113 ureg_writemask( 114 ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0), 115 TGSI_WRITEMASK_Z), 116 TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, rts)); 117 118 ureg_END(ureg); 119 120 return ureg_create_shader_and_destroy(ureg, pctx); 121} 122 123 124void fd_prog_init(struct pipe_context *pctx) 125{ 126 struct fd_context *ctx = fd_context(pctx); 127 int i; 128 129 pctx->bind_fs_state = fd_fp_state_bind; 130 pctx->bind_vs_state = fd_vp_state_bind; 131 132 ctx->solid_prog.fp = assemble_tgsi(pctx, solid_fp, true); 133 ctx->solid_prog.vp = assemble_tgsi(pctx, solid_vp, false); 134 ctx->blit_prog[0].vp = assemble_tgsi(pctx, blit_vp, false); 135 ctx->blit_prog[0].fp = fd_prog_blit(pctx, 1, false); 136 137 if (ctx->screen->gpu_id < 300) 138 return; 139 140 for (i = 1; i < ctx->screen->max_rts; i++) { 141 ctx->blit_prog[i].vp = ctx->blit_prog[0].vp; 142 ctx->blit_prog[i].fp = fd_prog_blit(pctx, i + 1, false); 143 } 144 145 ctx->blit_z.vp = ctx->blit_prog[0].vp; 146 ctx->blit_z.fp = fd_prog_blit(pctx, 0, true); 147 ctx->blit_zs.vp = ctx->blit_prog[0].vp; 148 ctx->blit_zs.fp = fd_prog_blit(pctx, 1, true); 149} 150 151void fd_prog_fini(struct pipe_context *pctx) 152{ 153 struct fd_context *ctx = fd_context(pctx); 154 int i; 155 156 pctx->delete_vs_state(pctx, ctx->solid_prog.vp); 157 pctx->delete_fs_state(pctx, ctx->solid_prog.fp); 158 pctx->delete_vs_state(pctx, ctx->blit_prog[0].vp); 159 for (i = 0; i < ctx->screen->max_rts; i++) 160 pctx->delete_fs_state(pctx, ctx->blit_prog[i].fp); 161 pctx->delete_fs_state(pctx, ctx->blit_z.fp); 162 pctx->delete_fs_state(pctx, ctx->blit_zs.fp); 163} 164