1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2010 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "util/u_format.h" 25#include "util/u_format_s3tc.h" 26#include "util/u_screen.h" 27#include "util/u_memory.h" 28#include "util/os_time.h" 29#include "vl/vl_decoder.h" 30#include "vl/vl_video_buffer.h" 31 32#include "r300_context.h" 33#include "r300_texture.h" 34#include "r300_screen_buffer.h" 35#include "r300_state_inlines.h" 36#include "r300_public.h" 37 38#include "draw/draw_context.h" 39 40/* Return the identifier behind whom the brave coders responsible for this 41 * amalgamation of code, sweat, and duct tape, routinely obscure their names. 42 * 43 * ...I should have just put "Corbin Simpson", but I'm not that cool. 44 * 45 * (Or egotistical. Yet.) */ 46static const char* r300_get_vendor(struct pipe_screen* pscreen) 47{ 48 return "X.Org R300 Project"; 49} 50 51static const char* r300_get_device_vendor(struct pipe_screen* pscreen) 52{ 53 return "ATI"; 54} 55 56static const char* chip_families[] = { 57 "unknown", 58 "ATI R300", 59 "ATI R350", 60 "ATI RV350", 61 "ATI RV370", 62 "ATI RV380", 63 "ATI RS400", 64 "ATI RC410", 65 "ATI RS480", 66 "ATI R420", 67 "ATI R423", 68 "ATI R430", 69 "ATI R480", 70 "ATI R481", 71 "ATI RV410", 72 "ATI RS600", 73 "ATI RS690", 74 "ATI RS740", 75 "ATI RV515", 76 "ATI R520", 77 "ATI RV530", 78 "ATI R580", 79 "ATI RV560", 80 "ATI RV570" 81}; 82 83static const char* r300_get_name(struct pipe_screen* pscreen) 84{ 85 struct r300_screen* r300screen = r300_screen(pscreen); 86 87 return chip_families[r300screen->caps.family]; 88} 89 90static int r300_get_param(struct pipe_screen* pscreen, enum pipe_cap param) 91{ 92 struct r300_screen* r300screen = r300_screen(pscreen); 93 boolean is_r500 = r300screen->caps.is_r500; 94 95 switch (param) { 96 /* Supported features (boolean caps). */ 97 case PIPE_CAP_NPOT_TEXTURES: 98 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES: 99 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS: 100 case PIPE_CAP_ANISOTROPIC_FILTER: 101 case PIPE_CAP_POINT_SPRITE: 102 case PIPE_CAP_OCCLUSION_QUERY: 103 case PIPE_CAP_TEXTURE_MIRROR_CLAMP: 104 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE: 105 case PIPE_CAP_BLEND_EQUATION_SEPARATE: 106 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR: 107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT: 108 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER: 109 case PIPE_CAP_CONDITIONAL_RENDER: 110 case PIPE_CAP_TEXTURE_BARRIER: 111 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS: 112 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER: 113 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT: 114 case PIPE_CAP_CLIP_HALFZ: 115 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: 116 return 1; 117 118 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT: 119 return R300_BUFFER_ALIGNMENT; 120 121 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT: 122 return 16; 123 124 case PIPE_CAP_GLSL_FEATURE_LEVEL: 125 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY: 126 return 120; 127 128 /* r300 cannot do swizzling of compressed textures. Supported otherwise. */ 129 case PIPE_CAP_TEXTURE_SWIZZLE: 130 return r300screen->caps.dxtc_swizzle; 131 132 /* We don't support color clamping on r500, so that we can use color 133 * intepolators for generic varyings. */ 134 case PIPE_CAP_VERTEX_COLOR_CLAMPED: 135 return !is_r500; 136 137 /* Supported on r500 only. */ 138 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED: 139 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS: 140 case PIPE_CAP_SM3: 141 return is_r500 ? 1 : 0; 142 143 /* Unsupported features. */ 144 case PIPE_CAP_QUERY_TIME_ELAPSED: 145 case PIPE_CAP_QUERY_PIPELINE_STATISTICS: 146 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS: 147 case PIPE_CAP_INDEP_BLEND_ENABLE: 148 case PIPE_CAP_INDEP_BLEND_FUNC: 149 case PIPE_CAP_DEPTH_CLIP_DISABLE: 150 case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE: 151 case PIPE_CAP_SHADER_STENCIL_EXPORT: 152 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS: 153 case PIPE_CAP_TGSI_INSTANCEID: 154 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT: 155 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER: 156 case PIPE_CAP_SEAMLESS_CUBE_MAP: 157 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE: 158 case PIPE_CAP_MIN_TEXEL_OFFSET: 159 case PIPE_CAP_MAX_TEXEL_OFFSET: 160 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET: 161 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET: 162 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS: 163 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS: 164 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS: 165 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES: 166 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS: 167 case PIPE_CAP_MAX_VERTEX_STREAMS: 168 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME: 169 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS: 170 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: 171 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION: 172 case PIPE_CAP_COMPUTE: 173 case PIPE_CAP_START_INSTANCE: 174 case PIPE_CAP_QUERY_TIMESTAMP: 175 case PIPE_CAP_TEXTURE_MULTISAMPLE: 176 case PIPE_CAP_CUBE_MAP_ARRAY: 177 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS: 178 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT: 179 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK: 180 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE: 181 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT: 182 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS: 183 case PIPE_CAP_TEXTURE_GATHER_SM5: 184 case PIPE_CAP_TEXTURE_QUERY_LOD: 185 case PIPE_CAP_FAKE_SW_MSAA: 186 case PIPE_CAP_SAMPLE_SHADING: 187 case PIPE_CAP_TEXTURE_GATHER_OFFSETS: 188 case PIPE_CAP_DRAW_INDIRECT: 189 case PIPE_CAP_MULTI_DRAW_INDIRECT: 190 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS: 191 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE: 192 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED: 193 case PIPE_CAP_SAMPLER_VIEW_TARGET: 194 case PIPE_CAP_VERTEXID_NOBASE: 195 case PIPE_CAP_POLYGON_OFFSET_CLAMP: 196 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE: 197 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: 198 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY: 199 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: 200 case PIPE_CAP_TEXTURE_FLOAT_LINEAR: 201 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: 202 case PIPE_CAP_DEPTH_BOUNDS_TEST: 203 case PIPE_CAP_TGSI_TXQS: 204 case PIPE_CAP_FORCE_PERSAMPLE_INTERP: 205 case PIPE_CAP_SHAREABLE_SHADERS: 206 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: 207 case PIPE_CAP_CLEAR_TEXTURE: 208 case PIPE_CAP_DRAW_PARAMETERS: 209 case PIPE_CAP_TGSI_PACK_HALF_FLOAT: 210 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL: 211 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL: 212 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT: 213 case PIPE_CAP_INVALIDATE_BUFFER: 214 case PIPE_CAP_GENERATE_MIPMAP: 215 case PIPE_CAP_STRING_MARKER: 216 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY: 217 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS: 218 case PIPE_CAP_QUERY_BUFFER_OBJECT: 219 case PIPE_CAP_QUERY_MEMORY_INFO: 220 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT: 221 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR: 222 case PIPE_CAP_CULL_DISTANCE: 223 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES: 224 case PIPE_CAP_TGSI_VOTE: 225 case PIPE_CAP_MAX_WINDOW_RECTANGLES: 226 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED: 227 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS: 228 case PIPE_CAP_TGSI_ARRAY_COMPONENTS: 229 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS: 230 case PIPE_CAP_NATIVE_FENCE_FD: 231 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY: 232 case PIPE_CAP_TGSI_FS_FBFETCH: 233 case PIPE_CAP_TGSI_MUL_ZERO_WINS: 234 case PIPE_CAP_DOUBLES: 235 case PIPE_CAP_INT64: 236 case PIPE_CAP_INT64_DIVMOD: 237 case PIPE_CAP_TGSI_TEX_TXF_LZ: 238 case PIPE_CAP_TGSI_CLOCK: 239 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE: 240 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE: 241 case PIPE_CAP_TGSI_BALLOT: 242 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT: 243 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX: 244 case PIPE_CAP_POST_DEPTH_COVERAGE: 245 case PIPE_CAP_BINDLESS_TEXTURE: 246 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF: 247 case PIPE_CAP_QUERY_SO_OVERFLOW: 248 case PIPE_CAP_MEMOBJ: 249 case PIPE_CAP_LOAD_CONSTBUF: 250 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS: 251 case PIPE_CAP_TILE_RASTER_ORDER: 252 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES: 253 case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS: 254 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET: 255 case PIPE_CAP_CONTEXT_PRIORITY_MASK: 256 case PIPE_CAP_FENCE_SIGNAL: 257 case PIPE_CAP_CONSTBUF0_FLAGS: 258 case PIPE_CAP_PACKED_UNIFORMS: 259 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES: 260 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES: 261 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES: 262 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES: 263 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE: 264 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS: 265 case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS: 266 case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET: 267 return 0; 268 269 case PIPE_CAP_MAX_GS_INVOCATIONS: 270 return 32; 271 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE: 272 return 1 << 27; 273 274 /* SWTCL-only features. */ 275 case PIPE_CAP_PRIMITIVE_RESTART: 276 case PIPE_CAP_USER_VERTEX_BUFFERS: 277 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION: 278 return !r300screen->caps.has_tcl; 279 280 /* HWTCL-only features / limitations. */ 281 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY: 282 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY: 283 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY: 284 return r300screen->caps.has_tcl; 285 case PIPE_CAP_TGSI_TEXCOORD: 286 return 0; 287 288 /* Texturing. */ 289 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS: 290 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS: 291 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS: 292 /* 13 == 4096, 12 == 2048 */ 293 return is_r500 ? 13 : 12; 294 295 /* Render targets. */ 296 case PIPE_CAP_MAX_RENDER_TARGETS: 297 return 4; 298 case PIPE_CAP_ENDIANNESS: 299 return PIPE_ENDIAN_LITTLE; 300 301 case PIPE_CAP_MAX_VIEWPORTS: 302 return 1; 303 304 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE: 305 return 2048; 306 307 case PIPE_CAP_MAX_VARYINGS: 308 return 10; 309 310 case PIPE_CAP_VENDOR_ID: 311 return 0x1002; 312 case PIPE_CAP_DEVICE_ID: 313 return r300screen->info.pci_id; 314 case PIPE_CAP_ACCELERATED: 315 return 1; 316 case PIPE_CAP_VIDEO_MEMORY: 317 return r300screen->info.vram_size >> 20; 318 case PIPE_CAP_UMA: 319 return 0; 320 case PIPE_CAP_PCI_GROUP: 321 return r300screen->info.pci_domain; 322 case PIPE_CAP_PCI_BUS: 323 return r300screen->info.pci_bus; 324 case PIPE_CAP_PCI_DEVICE: 325 return r300screen->info.pci_dev; 326 case PIPE_CAP_PCI_FUNCTION: 327 return r300screen->info.pci_func; 328 default: 329 return u_pipe_screen_get_param_defaults(pscreen, param); 330 } 331} 332 333static int r300_get_shader_param(struct pipe_screen *pscreen, 334 enum pipe_shader_type shader, 335 enum pipe_shader_cap param) 336{ 337 struct r300_screen* r300screen = r300_screen(pscreen); 338 boolean is_r400 = r300screen->caps.is_r400; 339 boolean is_r500 = r300screen->caps.is_r500; 340 341 switch (shader) { 342 case PIPE_SHADER_FRAGMENT: 343 switch (param) 344 { 345 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 346 return is_r500 || is_r400 ? 512 : 96; 347 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 348 return is_r500 || is_r400 ? 512 : 64; 349 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 350 return is_r500 || is_r400 ? 512 : 32; 351 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 352 return is_r500 ? 511 : 4; 353 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 354 return is_r500 ? 64 : 0; /* Actually unlimited on r500. */ 355 /* Fragment shader limits. */ 356 case PIPE_SHADER_CAP_MAX_INPUTS: 357 /* 2 colors + 8 texcoords are always supported 358 * (minus fog and wpos). 359 * 360 * R500 has the ability to turn 3rd and 4th color into 361 * additional texcoords but there is no two-sided color 362 * selection then. However the facing bit can be used instead. */ 363 return 10; 364 case PIPE_SHADER_CAP_MAX_OUTPUTS: 365 return 4; 366 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: 367 return (is_r500 ? 256 : 32) * sizeof(float[4]); 368 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 369 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: 370 return 1; 371 case PIPE_SHADER_CAP_MAX_TEMPS: 372 return is_r500 ? 128 : is_r400 ? 64 : 32; 373 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 374 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: 375 return r300screen->caps.num_tex_units; 376 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 377 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: 378 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 379 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 380 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 381 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 382 case PIPE_SHADER_CAP_SUBROUTINES: 383 case PIPE_SHADER_CAP_INTEGERS: 384 case PIPE_SHADER_CAP_INT64_ATOMICS: 385 case PIPE_SHADER_CAP_FP16: 386 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: 387 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: 388 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED: 389 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: 390 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: 391 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: 392 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: 393 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: 394 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: 395 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: 396 return 0; 397 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: 398 return 32; 399 case PIPE_SHADER_CAP_PREFERRED_IR: 400 return PIPE_SHADER_IR_TGSI; 401 case PIPE_SHADER_CAP_SUPPORTED_IRS: 402 return 0; 403 case PIPE_SHADER_CAP_SCALAR_ISA: 404 return 0; 405 } 406 break; 407 case PIPE_SHADER_VERTEX: 408 switch (param) 409 { 410 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 411 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: 412 case PIPE_SHADER_CAP_SUBROUTINES: 413 return 0; 414 default:; 415 } 416 417 if (!r300screen->caps.has_tcl) { 418 return draw_get_shader_param(shader, param); 419 } 420 421 switch (param) 422 { 423 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS: 424 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS: 425 return is_r500 ? 1024 : 256; 426 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: 427 return is_r500 ? 4 : 0; /* For loops; not sure about conditionals. */ 428 case PIPE_SHADER_CAP_MAX_INPUTS: 429 return 16; 430 case PIPE_SHADER_CAP_MAX_OUTPUTS: 431 return 10; 432 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: 433 return 256 * sizeof(float[4]); 434 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: 435 return 1; 436 case PIPE_SHADER_CAP_MAX_TEMPS: 437 return 32; 438 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR: 439 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: 440 return 1; 441 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS: 442 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS: 443 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: 444 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED: 445 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: 446 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR: 447 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR: 448 case PIPE_SHADER_CAP_SUBROUTINES: 449 case PIPE_SHADER_CAP_INTEGERS: 450 case PIPE_SHADER_CAP_FP16: 451 case PIPE_SHADER_CAP_INT64_ATOMICS: 452 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS: 453 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS: 454 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: 455 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: 456 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED: 457 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: 458 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS: 459 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES: 460 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD: 461 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: 462 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS: 463 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS: 464 return 0; 465 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT: 466 return 32; 467 case PIPE_SHADER_CAP_PREFERRED_IR: 468 return PIPE_SHADER_IR_TGSI; 469 case PIPE_SHADER_CAP_SUPPORTED_IRS: 470 return 0; 471 case PIPE_SHADER_CAP_SCALAR_ISA: 472 return 0; 473 } 474 break; 475 default: 476 ; /* nothing */ 477 } 478 return 0; 479} 480 481static float r300_get_paramf(struct pipe_screen* pscreen, 482 enum pipe_capf param) 483{ 484 struct r300_screen* r300screen = r300_screen(pscreen); 485 486 switch (param) { 487 case PIPE_CAPF_MAX_LINE_WIDTH: 488 case PIPE_CAPF_MAX_LINE_WIDTH_AA: 489 case PIPE_CAPF_MAX_POINT_WIDTH: 490 case PIPE_CAPF_MAX_POINT_WIDTH_AA: 491 /* The maximum dimensions of the colorbuffer are our practical 492 * rendering limits. 2048 pixels should be enough for anybody. */ 493 if (r300screen->caps.is_r500) { 494 return 4096.0f; 495 } else if (r300screen->caps.is_r400) { 496 return 4021.0f; 497 } else { 498 return 2560.0f; 499 } 500 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY: 501 return 16.0f; 502 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS: 503 return 16.0f; 504 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE: 505 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE: 506 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY: 507 return 0.0f; 508 default: 509 debug_printf("r300: Warning: Unknown CAP %d in get_paramf.\n", 510 param); 511 return 0.0f; 512 } 513} 514 515static int r300_get_video_param(struct pipe_screen *screen, 516 enum pipe_video_profile profile, 517 enum pipe_video_entrypoint entrypoint, 518 enum pipe_video_cap param) 519{ 520 switch (param) { 521 case PIPE_VIDEO_CAP_SUPPORTED: 522 return vl_profile_supported(screen, profile, entrypoint); 523 case PIPE_VIDEO_CAP_NPOT_TEXTURES: 524 return 0; 525 case PIPE_VIDEO_CAP_MAX_WIDTH: 526 case PIPE_VIDEO_CAP_MAX_HEIGHT: 527 return vl_video_buffer_max_size(screen); 528 case PIPE_VIDEO_CAP_PREFERED_FORMAT: 529 return PIPE_FORMAT_NV12; 530 case PIPE_VIDEO_CAP_PREFERS_INTERLACED: 531 return false; 532 case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED: 533 return false; 534 case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE: 535 return true; 536 case PIPE_VIDEO_CAP_MAX_LEVEL: 537 return vl_level_supported(screen, profile); 538 default: 539 return 0; 540 } 541} 542 543/** 544 * Whether the format matches: 545 * PIPE_FORMAT_?10?10?10?2_UNORM 546 */ 547static inline boolean 548util_format_is_rgba1010102_variant(const struct util_format_description *desc) 549{ 550 static const unsigned size[4] = {10, 10, 10, 2}; 551 unsigned chan; 552 553 if (desc->block.width != 1 || 554 desc->block.height != 1 || 555 desc->block.bits != 32) 556 return FALSE; 557 558 for (chan = 0; chan < 4; ++chan) { 559 if(desc->channel[chan].type != UTIL_FORMAT_TYPE_UNSIGNED && 560 desc->channel[chan].type != UTIL_FORMAT_TYPE_VOID) 561 return FALSE; 562 if (desc->channel[chan].size != size[chan]) 563 return FALSE; 564 } 565 566 return TRUE; 567} 568 569static bool r300_is_blending_supported(struct r300_screen *rscreen, 570 enum pipe_format format) 571{ 572 int c; 573 const struct util_format_description *desc = 574 util_format_description(format); 575 576 if (desc->layout != UTIL_FORMAT_LAYOUT_PLAIN) 577 return false; 578 579 c = util_format_get_first_non_void_channel(format); 580 581 /* RGBA16F */ 582 if (rscreen->caps.is_r500 && 583 desc->nr_channels == 4 && 584 desc->channel[c].size == 16 && 585 desc->channel[c].type == UTIL_FORMAT_TYPE_FLOAT) 586 return true; 587 588 if (desc->channel[c].normalized && 589 desc->channel[c].type == UTIL_FORMAT_TYPE_UNSIGNED && 590 desc->channel[c].size >= 4 && 591 desc->channel[c].size <= 10) { 592 /* RGB10_A2, RGBA8, RGB5_A1, RGBA4, RGB565 */ 593 if (desc->nr_channels >= 3) 594 return true; 595 596 if (format == PIPE_FORMAT_R8G8_UNORM) 597 return true; 598 599 /* R8, I8, L8, A8 */ 600 if (desc->nr_channels == 1) 601 return true; 602 } 603 604 return false; 605} 606 607static boolean r300_is_format_supported(struct pipe_screen* screen, 608 enum pipe_format format, 609 enum pipe_texture_target target, 610 unsigned sample_count, 611 unsigned storage_sample_count, 612 unsigned usage) 613{ 614 uint32_t retval = 0; 615 boolean is_r500 = r300_screen(screen)->caps.is_r500; 616 boolean is_r400 = r300_screen(screen)->caps.is_r400; 617 boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM || 618 format == PIPE_FORMAT_R10G10B10X2_SNORM || 619 format == PIPE_FORMAT_B10G10R10A2_UNORM || 620 format == PIPE_FORMAT_B10G10R10X2_UNORM || 621 format == PIPE_FORMAT_R10SG10SB10SA2U_NORM; 622 boolean is_ati1n = format == PIPE_FORMAT_RGTC1_UNORM || 623 format == PIPE_FORMAT_RGTC1_SNORM || 624 format == PIPE_FORMAT_LATC1_UNORM || 625 format == PIPE_FORMAT_LATC1_SNORM; 626 boolean is_ati2n = format == PIPE_FORMAT_RGTC2_UNORM || 627 format == PIPE_FORMAT_RGTC2_SNORM || 628 format == PIPE_FORMAT_LATC2_UNORM || 629 format == PIPE_FORMAT_LATC2_SNORM; 630 boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT || 631 format == PIPE_FORMAT_R16G16_FLOAT || 632 format == PIPE_FORMAT_R16G16B16_FLOAT || 633 format == PIPE_FORMAT_R16G16B16A16_FLOAT || 634 format == PIPE_FORMAT_R16G16B16X16_FLOAT; 635 const struct util_format_description *desc; 636 637 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count)) 638 return false; 639 640 /* Check multisampling support. */ 641 switch (sample_count) { 642 case 0: 643 case 1: 644 break; 645 case 2: 646 case 4: 647 case 6: 648 /* No texturing and scanout. */ 649 if (usage & (PIPE_BIND_SAMPLER_VIEW | 650 PIPE_BIND_DISPLAY_TARGET | 651 PIPE_BIND_SCANOUT)) { 652 return FALSE; 653 } 654 655 desc = util_format_description(format); 656 657 if (is_r500) { 658 /* Only allow depth/stencil, RGBA8, RGBA1010102, RGBA16F. */ 659 if (!util_format_is_depth_or_stencil(format) && 660 !util_format_is_rgba8_variant(desc) && 661 !util_format_is_rgba1010102_variant(desc) && 662 format != PIPE_FORMAT_R16G16B16A16_FLOAT && 663 format != PIPE_FORMAT_R16G16B16X16_FLOAT) { 664 return FALSE; 665 } 666 } else { 667 /* Only allow depth/stencil, RGBA8. */ 668 if (!util_format_is_depth_or_stencil(format) && 669 !util_format_is_rgba8_variant(desc)) { 670 return FALSE; 671 } 672 } 673 break; 674 default: 675 return FALSE; 676 } 677 678 /* Check sampler format support. */ 679 if ((usage & PIPE_BIND_SAMPLER_VIEW) && 680 /* these two are broken for an unknown reason */ 681 format != PIPE_FORMAT_R8G8B8X8_SNORM && 682 format != PIPE_FORMAT_R16G16B16X16_SNORM && 683 /* ATI1N is r5xx-only. */ 684 (is_r500 || !is_ati1n) && 685 /* ATI2N is supported on r4xx-r5xx. */ 686 (is_r400 || is_r500 || !is_ati2n) && 687 r300_is_sampler_format_supported(format)) { 688 retval |= PIPE_BIND_SAMPLER_VIEW; 689 } 690 691 /* Check colorbuffer format support. */ 692 if ((usage & (PIPE_BIND_RENDER_TARGET | 693 PIPE_BIND_DISPLAY_TARGET | 694 PIPE_BIND_SCANOUT | 695 PIPE_BIND_SHARED | 696 PIPE_BIND_BLENDABLE)) && 697 /* 2101010 cannot be rendered to on non-r5xx. */ 698 (!is_color2101010 || is_r500) && 699 r300_is_colorbuffer_format_supported(format)) { 700 retval |= usage & 701 (PIPE_BIND_RENDER_TARGET | 702 PIPE_BIND_DISPLAY_TARGET | 703 PIPE_BIND_SCANOUT | 704 PIPE_BIND_SHARED); 705 706 if (r300_is_blending_supported(r300_screen(screen), format)) { 707 retval |= usage & PIPE_BIND_BLENDABLE; 708 } 709 } 710 711 /* Check depth-stencil format support. */ 712 if (usage & PIPE_BIND_DEPTH_STENCIL && 713 r300_is_zs_format_supported(format)) { 714 retval |= PIPE_BIND_DEPTH_STENCIL; 715 } 716 717 /* Check vertex buffer format support. */ 718 if (usage & PIPE_BIND_VERTEX_BUFFER) { 719 if (r300_screen(screen)->caps.has_tcl) { 720 /* Half float is supported on >= R400. */ 721 if ((is_r400 || is_r500 || !is_half_float) && 722 r300_translate_vertex_data_type(format) != R300_INVALID_FORMAT) { 723 retval |= PIPE_BIND_VERTEX_BUFFER; 724 } 725 } else { 726 /* SW TCL */ 727 if (!util_format_is_pure_integer(format)) { 728 retval |= PIPE_BIND_VERTEX_BUFFER; 729 } 730 } 731 } 732 733 return retval == usage; 734} 735 736static void r300_destroy_screen(struct pipe_screen* pscreen) 737{ 738 struct r300_screen* r300screen = r300_screen(pscreen); 739 struct radeon_winsys *rws = radeon_winsys(pscreen); 740 741 if (rws && !rws->unref(rws)) 742 return; 743 744 mtx_destroy(&r300screen->cmask_mutex); 745 slab_destroy_parent(&r300screen->pool_transfers); 746 747 if (rws) 748 rws->destroy(rws); 749 750 FREE(r300screen); 751} 752 753static void r300_fence_reference(struct pipe_screen *screen, 754 struct pipe_fence_handle **ptr, 755 struct pipe_fence_handle *fence) 756{ 757 struct radeon_winsys *rws = r300_screen(screen)->rws; 758 759 rws->fence_reference(ptr, fence); 760} 761 762static boolean r300_fence_finish(struct pipe_screen *screen, 763 struct pipe_context *ctx, 764 struct pipe_fence_handle *fence, 765 uint64_t timeout) 766{ 767 struct radeon_winsys *rws = r300_screen(screen)->rws; 768 769 return rws->fence_wait(rws, fence, timeout); 770} 771 772struct pipe_screen* r300_screen_create(struct radeon_winsys *rws, 773 const struct pipe_screen_config *config) 774{ 775 struct r300_screen *r300screen = CALLOC_STRUCT(r300_screen); 776 777 if (!r300screen) { 778 FREE(r300screen); 779 return NULL; 780 } 781 782 rws->query_info(rws, &r300screen->info); 783 784 r300_init_debug(r300screen); 785 r300_parse_chipset(r300screen->info.pci_id, &r300screen->caps); 786 787 if (SCREEN_DBG_ON(r300screen, DBG_NO_ZMASK)) 788 r300screen->caps.zmask_ram = 0; 789 if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ)) 790 r300screen->caps.hiz_ram = 0; 791 792 r300screen->rws = rws; 793 r300screen->screen.destroy = r300_destroy_screen; 794 r300screen->screen.get_name = r300_get_name; 795 r300screen->screen.get_vendor = r300_get_vendor; 796 r300screen->screen.get_device_vendor = r300_get_device_vendor; 797 r300screen->screen.get_param = r300_get_param; 798 r300screen->screen.get_shader_param = r300_get_shader_param; 799 r300screen->screen.get_paramf = r300_get_paramf; 800 r300screen->screen.get_video_param = r300_get_video_param; 801 r300screen->screen.is_format_supported = r300_is_format_supported; 802 r300screen->screen.is_video_format_supported = vl_video_buffer_is_format_supported; 803 r300screen->screen.context_create = r300_create_context; 804 r300screen->screen.fence_reference = r300_fence_reference; 805 r300screen->screen.fence_finish = r300_fence_finish; 806 807 r300_init_screen_resource_functions(r300screen); 808 809 slab_create_parent(&r300screen->pool_transfers, sizeof(struct pipe_transfer), 64); 810 811 (void) mtx_init(&r300screen->cmask_mutex, mtx_plain); 812 813 return &r300screen->screen; 814} 815