1/**************************************************************************** 2 * Copyright (C) 2015 Intel Corporation. All Rights Reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 ***************************************************************************/ 23 24// llvm redefines DEBUG 25#pragma push_macro("DEBUG") 26#undef DEBUG 27#include "JitManager.h" 28#pragma pop_macro("DEBUG") 29 30#include "common/os.h" 31#include "jit_api.h" 32#include "gen_state_llvm.h" 33#include "core/multisample.h" 34#include "core/state_funcs.h" 35 36#include "gallivm/lp_bld_tgsi.h" 37#include "util/u_format.h" 38 39#include "util/u_memory.h" 40#include "util/u_inlines.h" 41#include "util/u_helpers.h" 42#include "util/u_framebuffer.h" 43#include "util/u_viewport.h" 44#include "util/u_prim.h" 45 46#include "swr_state.h" 47#include "swr_context.h" 48#include "gen_swr_context_llvm.h" 49#include "swr_screen.h" 50#include "swr_resource.h" 51#include "swr_tex_sample.h" 52#include "swr_scratch.h" 53#include "swr_shader.h" 54#include "swr_fence.h" 55 56/* These should be pulled out into separate files as necessary 57 * Just initializing everything here to get going. */ 58 59static void * 60swr_create_blend_state(struct pipe_context *pipe, 61 const struct pipe_blend_state *blend) 62{ 63 struct swr_blend_state *state = CALLOC_STRUCT(swr_blend_state); 64 65 memcpy(&state->pipe, blend, sizeof(*blend)); 66 67 struct pipe_blend_state *pipe_blend = &state->pipe; 68 69 for (int target = 0; 70 target < std::min(SWR_NUM_RENDERTARGETS, PIPE_MAX_COLOR_BUFS); 71 target++) { 72 73 struct pipe_rt_blend_state *rt_blend = &pipe_blend->rt[target]; 74 SWR_RENDER_TARGET_BLEND_STATE &blendState = 75 state->blendState.renderTarget[target]; 76 RENDER_TARGET_BLEND_COMPILE_STATE &compileState = 77 state->compileState[target]; 78 79 if (target != 0 && !pipe_blend->independent_blend_enable) { 80 memcpy(&compileState, 81 &state->compileState[0], 82 sizeof(RENDER_TARGET_BLEND_COMPILE_STATE)); 83 continue; 84 } 85 86 compileState.blendEnable = rt_blend->blend_enable; 87 if (compileState.blendEnable) { 88 compileState.sourceAlphaBlendFactor = 89 swr_convert_blend_factor(rt_blend->alpha_src_factor); 90 compileState.destAlphaBlendFactor = 91 swr_convert_blend_factor(rt_blend->alpha_dst_factor); 92 compileState.sourceBlendFactor = 93 swr_convert_blend_factor(rt_blend->rgb_src_factor); 94 compileState.destBlendFactor = 95 swr_convert_blend_factor(rt_blend->rgb_dst_factor); 96 97 compileState.colorBlendFunc = 98 swr_convert_blend_func(rt_blend->rgb_func); 99 compileState.alphaBlendFunc = 100 swr_convert_blend_func(rt_blend->alpha_func); 101 } 102 compileState.logicOpEnable = state->pipe.logicop_enable; 103 if (compileState.logicOpEnable) { 104 compileState.logicOpFunc = 105 swr_convert_logic_op(state->pipe.logicop_func); 106 } 107 108 blendState.writeDisableRed = 109 (rt_blend->colormask & PIPE_MASK_R) ? 0 : 1; 110 blendState.writeDisableGreen = 111 (rt_blend->colormask & PIPE_MASK_G) ? 0 : 1; 112 blendState.writeDisableBlue = 113 (rt_blend->colormask & PIPE_MASK_B) ? 0 : 1; 114 blendState.writeDisableAlpha = 115 (rt_blend->colormask & PIPE_MASK_A) ? 0 : 1; 116 117 if (rt_blend->colormask == 0) 118 compileState.blendEnable = false; 119 } 120 121 return state; 122} 123 124static void 125swr_bind_blend_state(struct pipe_context *pipe, void *blend) 126{ 127 struct swr_context *ctx = swr_context(pipe); 128 129 if (ctx->blend == blend) 130 return; 131 132 ctx->blend = (swr_blend_state *)blend; 133 134 ctx->dirty |= SWR_NEW_BLEND; 135} 136 137static void 138swr_delete_blend_state(struct pipe_context *pipe, void *blend) 139{ 140 FREE(blend); 141} 142 143static void 144swr_set_blend_color(struct pipe_context *pipe, 145 const struct pipe_blend_color *color) 146{ 147 struct swr_context *ctx = swr_context(pipe); 148 149 ctx->blend_color = *color; 150 151 ctx->dirty |= SWR_NEW_BLEND; 152} 153 154static void 155swr_set_stencil_ref(struct pipe_context *pipe, 156 const struct pipe_stencil_ref *ref) 157{ 158 struct swr_context *ctx = swr_context(pipe); 159 160 ctx->stencil_ref = *ref; 161 162 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA; 163} 164 165static void * 166swr_create_depth_stencil_state( 167 struct pipe_context *pipe, 168 const struct pipe_depth_stencil_alpha_state *depth_stencil) 169{ 170 struct pipe_depth_stencil_alpha_state *state; 171 172 state = (pipe_depth_stencil_alpha_state *)mem_dup(depth_stencil, 173 sizeof *depth_stencil); 174 175 return state; 176} 177 178static void 179swr_bind_depth_stencil_state(struct pipe_context *pipe, void *depth_stencil) 180{ 181 struct swr_context *ctx = swr_context(pipe); 182 183 if (ctx->depth_stencil == (pipe_depth_stencil_alpha_state *)depth_stencil) 184 return; 185 186 ctx->depth_stencil = (pipe_depth_stencil_alpha_state *)depth_stencil; 187 188 ctx->dirty |= SWR_NEW_DEPTH_STENCIL_ALPHA; 189} 190 191static void 192swr_delete_depth_stencil_state(struct pipe_context *pipe, void *depth) 193{ 194 FREE(depth); 195} 196 197 198static void * 199swr_create_rasterizer_state(struct pipe_context *pipe, 200 const struct pipe_rasterizer_state *rast) 201{ 202 struct pipe_rasterizer_state *state; 203 state = (pipe_rasterizer_state *)mem_dup(rast, sizeof *rast); 204 205 return state; 206} 207 208static void 209swr_bind_rasterizer_state(struct pipe_context *pipe, void *handle) 210{ 211 struct swr_context *ctx = swr_context(pipe); 212 const struct pipe_rasterizer_state *rasterizer = 213 (const struct pipe_rasterizer_state *)handle; 214 215 if (ctx->rasterizer == (pipe_rasterizer_state *)rasterizer) 216 return; 217 218 ctx->rasterizer = (pipe_rasterizer_state *)rasterizer; 219 220 ctx->dirty |= SWR_NEW_RASTERIZER; 221} 222 223static void 224swr_delete_rasterizer_state(struct pipe_context *pipe, void *rasterizer) 225{ 226 FREE(rasterizer); 227} 228 229 230static void * 231swr_create_sampler_state(struct pipe_context *pipe, 232 const struct pipe_sampler_state *sampler) 233{ 234 struct pipe_sampler_state *state = 235 (pipe_sampler_state *)mem_dup(sampler, sizeof *sampler); 236 237 return state; 238} 239 240static void 241swr_bind_sampler_states(struct pipe_context *pipe, 242 enum pipe_shader_type shader, 243 unsigned start, 244 unsigned num, 245 void **samplers) 246{ 247 struct swr_context *ctx = swr_context(pipe); 248 unsigned i; 249 250 assert(shader < PIPE_SHADER_TYPES); 251 assert(start + num <= ARRAY_SIZE(ctx->samplers[shader])); 252 253 /* set the new samplers */ 254 ctx->num_samplers[shader] = num; 255 for (i = 0; i < num; i++) { 256 ctx->samplers[shader][start + i] = (pipe_sampler_state *)samplers[i]; 257 } 258 259 ctx->dirty |= SWR_NEW_SAMPLER; 260} 261 262static void 263swr_delete_sampler_state(struct pipe_context *pipe, void *sampler) 264{ 265 FREE(sampler); 266} 267 268 269static struct pipe_sampler_view * 270swr_create_sampler_view(struct pipe_context *pipe, 271 struct pipe_resource *texture, 272 const struct pipe_sampler_view *templ) 273{ 274 struct pipe_sampler_view *view = CALLOC_STRUCT(pipe_sampler_view); 275 276 if (view) { 277 *view = *templ; 278 view->reference.count = 1; 279 view->texture = NULL; 280 pipe_resource_reference(&view->texture, texture); 281 view->context = pipe; 282 } 283 284 return view; 285} 286 287static void 288swr_set_sampler_views(struct pipe_context *pipe, 289 enum pipe_shader_type shader, 290 unsigned start, 291 unsigned num, 292 struct pipe_sampler_view **views) 293{ 294 struct swr_context *ctx = swr_context(pipe); 295 uint i; 296 297 assert(num <= PIPE_MAX_SHADER_SAMPLER_VIEWS); 298 299 assert(shader < PIPE_SHADER_TYPES); 300 assert(start + num <= ARRAY_SIZE(ctx->sampler_views[shader])); 301 302 /* set the new sampler views */ 303 ctx->num_sampler_views[shader] = num; 304 for (i = 0; i < num; i++) { 305 pipe_sampler_view_reference(&ctx->sampler_views[shader][start + i], 306 views[i]); 307 } 308 309 ctx->dirty |= SWR_NEW_SAMPLER_VIEW; 310} 311 312static void 313swr_sampler_view_destroy(struct pipe_context *pipe, 314 struct pipe_sampler_view *view) 315{ 316 pipe_resource_reference(&view->texture, NULL); 317 FREE(view); 318} 319 320static void * 321swr_create_vs_state(struct pipe_context *pipe, 322 const struct pipe_shader_state *vs) 323{ 324 struct swr_vertex_shader *swr_vs = new swr_vertex_shader; 325 if (!swr_vs) 326 return NULL; 327 328 swr_vs->pipe.tokens = tgsi_dup_tokens(vs->tokens); 329 swr_vs->pipe.stream_output = vs->stream_output; 330 331 lp_build_tgsi_info(vs->tokens, &swr_vs->info); 332 333 swr_vs->soState = {0}; 334 335 if (swr_vs->pipe.stream_output.num_outputs) { 336 pipe_stream_output_info *stream_output = &swr_vs->pipe.stream_output; 337 338 swr_vs->soState.soEnable = true; 339 // soState.rasterizerDisable set on state dirty 340 // soState.streamToRasterizer not used 341 342 for (uint32_t i = 0; i < stream_output->num_outputs; i++) { 343 unsigned attrib_slot = stream_output->output[i].register_index; 344 attrib_slot = swr_so_adjust_attrib(attrib_slot, swr_vs); 345 swr_vs->soState.streamMasks[stream_output->output[i].stream] |= 346 (1 << attrib_slot); 347 } 348 for (uint32_t i = 0; i < MAX_SO_STREAMS; i++) { 349 swr_vs->soState.streamNumEntries[i] = 350 _mm_popcnt_u32(swr_vs->soState.streamMasks[i]); 351 } 352 } 353 354 return swr_vs; 355} 356 357static void 358swr_bind_vs_state(struct pipe_context *pipe, void *vs) 359{ 360 struct swr_context *ctx = swr_context(pipe); 361 362 if (ctx->vs == vs) 363 return; 364 365 ctx->vs = (swr_vertex_shader *)vs; 366 ctx->dirty |= SWR_NEW_VS; 367} 368 369static void 370swr_delete_vs_state(struct pipe_context *pipe, void *vs) 371{ 372 struct swr_vertex_shader *swr_vs = (swr_vertex_shader *)vs; 373 FREE((void *)swr_vs->pipe.tokens); 374 struct swr_screen *screen = swr_screen(pipe->screen); 375 376 /* Defer deletion of vs state */ 377 swr_fence_work_delete_vs(screen->flush_fence, swr_vs); 378} 379 380static void * 381swr_create_fs_state(struct pipe_context *pipe, 382 const struct pipe_shader_state *fs) 383{ 384 struct swr_fragment_shader *swr_fs = new swr_fragment_shader; 385 if (!swr_fs) 386 return NULL; 387 388 swr_fs->pipe.tokens = tgsi_dup_tokens(fs->tokens); 389 390 lp_build_tgsi_info(fs->tokens, &swr_fs->info); 391 392 return swr_fs; 393} 394 395 396static void 397swr_bind_fs_state(struct pipe_context *pipe, void *fs) 398{ 399 struct swr_context *ctx = swr_context(pipe); 400 401 if (ctx->fs == fs) 402 return; 403 404 ctx->fs = (swr_fragment_shader *)fs; 405 ctx->dirty |= SWR_NEW_FS; 406} 407 408static void 409swr_delete_fs_state(struct pipe_context *pipe, void *fs) 410{ 411 struct swr_fragment_shader *swr_fs = (swr_fragment_shader *)fs; 412 FREE((void *)swr_fs->pipe.tokens); 413 struct swr_screen *screen = swr_screen(pipe->screen); 414 415 /* Defer deleton of fs state */ 416 swr_fence_work_delete_fs(screen->flush_fence, swr_fs); 417} 418 419static void * 420swr_create_gs_state(struct pipe_context *pipe, 421 const struct pipe_shader_state *gs) 422{ 423 struct swr_geometry_shader *swr_gs = new swr_geometry_shader; 424 if (!swr_gs) 425 return NULL; 426 427 swr_gs->pipe.tokens = tgsi_dup_tokens(gs->tokens); 428 429 lp_build_tgsi_info(gs->tokens, &swr_gs->info); 430 431 return swr_gs; 432} 433 434 435static void 436swr_bind_gs_state(struct pipe_context *pipe, void *gs) 437{ 438 struct swr_context *ctx = swr_context(pipe); 439 440 if (ctx->gs == gs) 441 return; 442 443 ctx->gs = (swr_geometry_shader *)gs; 444 ctx->dirty |= SWR_NEW_GS; 445} 446 447static void 448swr_delete_gs_state(struct pipe_context *pipe, void *gs) 449{ 450 struct swr_geometry_shader *swr_gs = (swr_geometry_shader *)gs; 451 FREE((void *)swr_gs->pipe.tokens); 452 struct swr_screen *screen = swr_screen(pipe->screen); 453 454 /* Defer deleton of fs state */ 455 swr_fence_work_delete_gs(screen->flush_fence, swr_gs); 456} 457 458static void 459swr_set_constant_buffer(struct pipe_context *pipe, 460 enum pipe_shader_type shader, 461 uint index, 462 const struct pipe_constant_buffer *cb) 463{ 464 struct swr_context *ctx = swr_context(pipe); 465 struct pipe_resource *constants = cb ? cb->buffer : NULL; 466 467 assert(shader < PIPE_SHADER_TYPES); 468 assert(index < ARRAY_SIZE(ctx->constants[shader])); 469 470 /* note: reference counting */ 471 util_copy_constant_buffer(&ctx->constants[shader][index], cb); 472 473 if (shader == PIPE_SHADER_VERTEX) { 474 ctx->dirty |= SWR_NEW_VSCONSTANTS; 475 } else if (shader == PIPE_SHADER_FRAGMENT) { 476 ctx->dirty |= SWR_NEW_FSCONSTANTS; 477 } else if (shader == PIPE_SHADER_GEOMETRY) { 478 ctx->dirty |= SWR_NEW_GSCONSTANTS; 479 } 480 481 if (cb && cb->user_buffer) { 482 pipe_resource_reference(&constants, NULL); 483 } 484} 485 486 487static void * 488swr_create_vertex_elements_state(struct pipe_context *pipe, 489 unsigned num_elements, 490 const struct pipe_vertex_element *attribs) 491{ 492 struct swr_vertex_element_state *velems; 493 assert(num_elements <= PIPE_MAX_ATTRIBS); 494 velems = new swr_vertex_element_state; 495 if (velems) { 496 memset(&velems->fsState, 0, sizeof(velems->fsState)); 497 velems->fsState.bVertexIDOffsetEnable = true; 498 velems->fsState.numAttribs = num_elements; 499 for (unsigned i = 0; i < num_elements; i++) { 500 // XXX: we should do this keyed on the VS usage info 501 502 const struct util_format_description *desc = 503 util_format_description(attribs[i].src_format); 504 505 velems->fsState.layout[i].AlignedByteOffset = attribs[i].src_offset; 506 velems->fsState.layout[i].Format = 507 mesa_to_swr_format(attribs[i].src_format); 508 velems->fsState.layout[i].StreamIndex = 509 attribs[i].vertex_buffer_index; 510 velems->fsState.layout[i].InstanceEnable = 511 attribs[i].instance_divisor != 0; 512 velems->fsState.layout[i].ComponentControl0 = 513 desc->channel[0].type != UTIL_FORMAT_TYPE_VOID 514 ? ComponentControl::StoreSrc 515 : ComponentControl::Store0; 516 velems->fsState.layout[i].ComponentControl1 = 517 desc->channel[1].type != UTIL_FORMAT_TYPE_VOID 518 ? ComponentControl::StoreSrc 519 : ComponentControl::Store0; 520 velems->fsState.layout[i].ComponentControl2 = 521 desc->channel[2].type != UTIL_FORMAT_TYPE_VOID 522 ? ComponentControl::StoreSrc 523 : ComponentControl::Store0; 524 velems->fsState.layout[i].ComponentControl3 = 525 desc->channel[3].type != UTIL_FORMAT_TYPE_VOID 526 ? ComponentControl::StoreSrc 527 : ComponentControl::Store1Fp; 528 velems->fsState.layout[i].ComponentPacking = ComponentEnable::XYZW; 529 velems->fsState.layout[i].InstanceAdvancementState = 530 attribs[i].instance_divisor; 531 532 /* Calculate the pitch of each stream */ 533 const SWR_FORMAT_INFO &swr_desc = GetFormatInfo( 534 mesa_to_swr_format(attribs[i].src_format)); 535 velems->stream_pitch[attribs[i].vertex_buffer_index] += swr_desc.Bpp; 536 537 if (attribs[i].instance_divisor != 0) { 538 velems->instanced_bufs |= 1U << attribs[i].vertex_buffer_index; 539 uint32_t *min_instance_div = 540 &velems->min_instance_div[attribs[i].vertex_buffer_index]; 541 if (!*min_instance_div || 542 attribs[i].instance_divisor < *min_instance_div) 543 *min_instance_div = attribs[i].instance_divisor; 544 } 545 } 546 } 547 548 return velems; 549} 550 551static void 552swr_bind_vertex_elements_state(struct pipe_context *pipe, void *velems) 553{ 554 struct swr_context *ctx = swr_context(pipe); 555 struct swr_vertex_element_state *swr_velems = 556 (struct swr_vertex_element_state *)velems; 557 558 ctx->velems = swr_velems; 559 ctx->dirty |= SWR_NEW_VERTEX; 560} 561 562static void 563swr_delete_vertex_elements_state(struct pipe_context *pipe, void *velems) 564{ 565 struct swr_vertex_element_state *swr_velems = 566 (struct swr_vertex_element_state *) velems; 567 /* XXX Need to destroy fetch shader? */ 568 delete swr_velems; 569} 570 571 572static void 573swr_set_vertex_buffers(struct pipe_context *pipe, 574 unsigned start_slot, 575 unsigned num_elements, 576 const struct pipe_vertex_buffer *buffers) 577{ 578 struct swr_context *ctx = swr_context(pipe); 579 580 assert(num_elements <= PIPE_MAX_ATTRIBS); 581 582 util_set_vertex_buffers_count(ctx->vertex_buffer, 583 &ctx->num_vertex_buffers, 584 buffers, 585 start_slot, 586 num_elements); 587 588 ctx->dirty |= SWR_NEW_VERTEX; 589} 590 591 592static void 593swr_set_polygon_stipple(struct pipe_context *pipe, 594 const struct pipe_poly_stipple *stipple) 595{ 596 struct swr_context *ctx = swr_context(pipe); 597 598 ctx->poly_stipple.pipe = *stipple; /* struct copy */ 599 ctx->dirty |= SWR_NEW_STIPPLE; 600} 601 602static void 603swr_set_clip_state(struct pipe_context *pipe, 604 const struct pipe_clip_state *clip) 605{ 606 struct swr_context *ctx = swr_context(pipe); 607 608 ctx->clip = *clip; 609 /* XXX Unimplemented, but prevents crash */ 610 611 ctx->dirty |= SWR_NEW_CLIP; 612} 613 614 615static void 616swr_set_scissor_states(struct pipe_context *pipe, 617 unsigned start_slot, 618 unsigned num_viewports, 619 const struct pipe_scissor_state *scissor) 620{ 621 struct swr_context *ctx = swr_context(pipe); 622 623 ctx->scissor = *scissor; 624 ctx->swr_scissor.xmin = scissor->minx; 625 ctx->swr_scissor.xmax = scissor->maxx; 626 ctx->swr_scissor.ymin = scissor->miny; 627 ctx->swr_scissor.ymax = scissor->maxy; 628 ctx->dirty |= SWR_NEW_SCISSOR; 629} 630 631static void 632swr_set_viewport_states(struct pipe_context *pipe, 633 unsigned start_slot, 634 unsigned num_viewports, 635 const struct pipe_viewport_state *vpt) 636{ 637 struct swr_context *ctx = swr_context(pipe); 638 639 ctx->viewport = *vpt; 640 ctx->dirty |= SWR_NEW_VIEWPORT; 641} 642 643 644static void 645swr_set_framebuffer_state(struct pipe_context *pipe, 646 const struct pipe_framebuffer_state *fb) 647{ 648 struct swr_context *ctx = swr_context(pipe); 649 650 boolean changed = !util_framebuffer_state_equal(&ctx->framebuffer, fb); 651 652 assert(fb->width <= KNOB_GUARDBAND_WIDTH); 653 assert(fb->height <= KNOB_GUARDBAND_HEIGHT); 654 655 if (changed) { 656 util_copy_framebuffer_state(&ctx->framebuffer, fb); 657 658 /* 0 and 1 both indicate no msaa. Core doesn't understand 0 samples */ 659 ctx->framebuffer.samples = std::max((ubyte)1, ctx->framebuffer.samples); 660 661 ctx->dirty |= SWR_NEW_FRAMEBUFFER; 662 } 663} 664 665 666static void 667swr_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask) 668{ 669 struct swr_context *ctx = swr_context(pipe); 670 671 if (sample_mask != ctx->sample_mask) { 672 ctx->sample_mask = sample_mask; 673 ctx->dirty |= SWR_NEW_RASTERIZER; 674 } 675} 676 677/* 678 * MSAA fixed sample position table 679 * used by update_derived and get_sample_position 680 * (integer locations on a 16x16 grid) 681 */ 682static const uint8_t swr_sample_positions[][2] = 683{ /* 1x*/ { 8, 8}, 684 /* 2x*/ {12,12},{ 4, 4}, 685 /* 4x*/ { 6, 2},{14, 6},{ 2,10},{10,14}, 686 /* 8x*/ { 9, 5},{ 7,11},{13, 9},{ 5, 3}, 687 { 3,13},{ 1, 7},{11,15},{15, 1}, 688 /*16x*/ { 9, 9},{ 7, 5},{ 5,10},{12, 7}, 689 { 3, 6},{10,13},{13,11},{11, 3}, 690 { 6,14},{ 8, 1},{ 4, 2},{ 2,12}, 691 { 0, 8},{15, 4},{14,15},{ 1, 0} }; 692 693static void 694swr_get_sample_position(struct pipe_context *pipe, 695 unsigned sample_count, unsigned sample_index, 696 float *out_value) 697{ 698 /* validate sample_count */ 699 sample_count = GetNumSamples(GetSampleCount(sample_count)); 700 701 const uint8_t *sample = swr_sample_positions[sample_count-1 + sample_index]; 702 out_value[0] = sample[0] / 16.0f; 703 out_value[1] = sample[1] / 16.0f; 704} 705 706 707/* 708 * Update resource in-use status 709 * All resources bound to color or depth targets marked as WRITE resources. 710 * VBO Vertex/index buffers and texture views marked as READ resources. 711 */ 712void 713swr_update_resource_status(struct pipe_context *pipe, 714 const struct pipe_draw_info *p_draw_info) 715{ 716 struct swr_context *ctx = swr_context(pipe); 717 struct pipe_framebuffer_state *fb = &ctx->framebuffer; 718 719 /* colorbuffer targets */ 720 if (fb->nr_cbufs) 721 for (uint32_t i = 0; i < fb->nr_cbufs; ++i) 722 if (fb->cbufs[i]) 723 swr_resource_write(fb->cbufs[i]->texture); 724 725 /* depth/stencil target */ 726 if (fb->zsbuf) 727 swr_resource_write(fb->zsbuf->texture); 728 729 /* VBO vertex buffers */ 730 for (uint32_t i = 0; i < ctx->num_vertex_buffers; i++) { 731 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i]; 732 if (!vb->is_user_buffer && vb->buffer.resource) 733 swr_resource_read(vb->buffer.resource); 734 } 735 736 /* VBO index buffer */ 737 if (p_draw_info && p_draw_info->index_size) { 738 if (!p_draw_info->has_user_indices) 739 swr_resource_read(p_draw_info->index.resource); 740 } 741 742 /* transform feedback buffers */ 743 for (uint32_t i = 0; i < ctx->num_so_targets; i++) { 744 struct pipe_stream_output_target *target = ctx->so_targets[i]; 745 if (target && target->buffer) 746 swr_resource_write(target->buffer); 747 } 748 749 /* texture sampler views */ 750 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) { 751 for (uint32_t i = 0; i < ctx->num_sampler_views[j]; i++) { 752 struct pipe_sampler_view *view = ctx->sampler_views[j][i]; 753 if (view) 754 swr_resource_read(view->texture); 755 } 756 } 757 758 /* constant buffers */ 759 for (uint32_t j : {PIPE_SHADER_VERTEX, PIPE_SHADER_FRAGMENT}) { 760 for (uint32_t i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) { 761 struct pipe_constant_buffer *cb = &ctx->constants[j][i]; 762 if (cb->buffer) 763 swr_resource_read(cb->buffer); 764 } 765 } 766} 767 768static void 769swr_update_texture_state(struct swr_context *ctx, 770 enum pipe_shader_type shader_type, 771 unsigned num_sampler_views, 772 swr_jit_texture *textures) 773{ 774 for (unsigned i = 0; i < num_sampler_views; i++) { 775 struct pipe_sampler_view *view = 776 ctx->sampler_views[shader_type][i]; 777 struct swr_jit_texture *jit_tex = &textures[i]; 778 779 memset(jit_tex, 0, sizeof(*jit_tex)); 780 if (view) { 781 struct pipe_resource *res = view->texture; 782 struct swr_resource *swr_res = swr_resource(res); 783 SWR_SURFACE_STATE *swr = &swr_res->swr; 784 size_t *mip_offsets = swr_res->mip_offsets; 785 if (swr_res->has_depth && swr_res->has_stencil && 786 !util_format_has_depth(util_format_description(view->format))) { 787 swr = &swr_res->secondary; 788 mip_offsets = swr_res->secondary_mip_offsets; 789 } 790 791 jit_tex->width = res->width0; 792 jit_tex->height = res->height0; 793 jit_tex->base_ptr = (uint8_t*)swr->xpBaseAddress; 794 if (view->target != PIPE_BUFFER) { 795 jit_tex->first_level = view->u.tex.first_level; 796 jit_tex->last_level = view->u.tex.last_level; 797 if (view->target == PIPE_TEXTURE_3D) 798 jit_tex->depth = res->depth0; 799 else 800 jit_tex->depth = 801 view->u.tex.last_layer - view->u.tex.first_layer + 1; 802 jit_tex->base_ptr += view->u.tex.first_layer * 803 swr->qpitch * swr->pitch; 804 } else { 805 unsigned view_blocksize = util_format_get_blocksize(view->format); 806 jit_tex->base_ptr += view->u.buf.offset; 807 jit_tex->width = view->u.buf.size / view_blocksize; 808 jit_tex->depth = 1; 809 } 810 811 for (unsigned level = jit_tex->first_level; 812 level <= jit_tex->last_level; 813 level++) { 814 jit_tex->row_stride[level] = swr->pitch; 815 jit_tex->img_stride[level] = swr->qpitch * swr->pitch; 816 jit_tex->mip_offsets[level] = mip_offsets[level]; 817 } 818 } 819 } 820} 821 822static void 823swr_update_sampler_state(struct swr_context *ctx, 824 enum pipe_shader_type shader_type, 825 unsigned num_samplers, 826 swr_jit_sampler *samplers) 827{ 828 for (unsigned i = 0; i < num_samplers; i++) { 829 const struct pipe_sampler_state *sampler = 830 ctx->samplers[shader_type][i]; 831 832 if (sampler) { 833 samplers[i].min_lod = sampler->min_lod; 834 samplers[i].max_lod = sampler->max_lod; 835 samplers[i].lod_bias = sampler->lod_bias; 836 COPY_4V(samplers[i].border_color, sampler->border_color.f); 837 } 838 } 839} 840 841static void 842swr_update_constants(struct swr_context *ctx, enum pipe_shader_type shaderType) 843{ 844 swr_draw_context *pDC = &ctx->swrDC; 845 846 const float **constant; 847 uint32_t *num_constants; 848 struct swr_scratch_space *scratch; 849 850 switch (shaderType) { 851 case PIPE_SHADER_VERTEX: 852 constant = pDC->constantVS; 853 num_constants = pDC->num_constantsVS; 854 scratch = &ctx->scratch->vs_constants; 855 break; 856 case PIPE_SHADER_FRAGMENT: 857 constant = pDC->constantFS; 858 num_constants = pDC->num_constantsFS; 859 scratch = &ctx->scratch->fs_constants; 860 break; 861 case PIPE_SHADER_GEOMETRY: 862 constant = pDC->constantGS; 863 num_constants = pDC->num_constantsGS; 864 scratch = &ctx->scratch->gs_constants; 865 break; 866 default: 867 debug_printf("Unsupported shader type constants\n"); 868 return; 869 } 870 871 for (UINT i = 0; i < PIPE_MAX_CONSTANT_BUFFERS; i++) { 872 const pipe_constant_buffer *cb = &ctx->constants[shaderType][i]; 873 num_constants[i] = cb->buffer_size; 874 if (cb->buffer) { 875 constant[i] = 876 (const float *)(swr_resource_data(cb->buffer) + 877 cb->buffer_offset); 878 } else { 879 /* Need to copy these constants to scratch space */ 880 if (cb->user_buffer && cb->buffer_size) { 881 const void *ptr = 882 ((const uint8_t *)cb->user_buffer + cb->buffer_offset); 883 uint32_t size = AlignUp(cb->buffer_size, 4); 884 ptr = swr_copy_to_scratch_space(ctx, scratch, ptr, size); 885 constant[i] = (const float *)ptr; 886 } 887 } 888 } 889} 890 891static bool 892swr_change_rt(struct swr_context *ctx, 893 unsigned attachment, 894 const struct pipe_surface *sf) 895{ 896 swr_draw_context *pDC = &ctx->swrDC; 897 struct SWR_SURFACE_STATE *rt = &pDC->renderTargets[attachment]; 898 899 /* Do nothing if the render target hasn't changed */ 900 if ((!sf || !sf->texture) && (void*)(rt->xpBaseAddress) == nullptr) 901 return false; 902 903 /* Deal with disabling RT up front */ 904 if (!sf || !sf->texture) { 905 /* If detaching attachment, mark tiles as RESOLVED so core 906 * won't try to load from non-existent target. */ 907 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_RESOLVED); 908 *rt = {0}; 909 return true; 910 } 911 912 const struct swr_resource *swr = swr_resource(sf->texture); 913 const SWR_SURFACE_STATE *swr_surface = &swr->swr; 914 SWR_FORMAT fmt = mesa_to_swr_format(sf->format); 915 916 if (attachment == SWR_ATTACHMENT_STENCIL && swr->secondary.xpBaseAddress) { 917 swr_surface = &swr->secondary; 918 fmt = swr_surface->format; 919 } 920 921 if (rt->xpBaseAddress == swr_surface->xpBaseAddress && 922 rt->format == fmt && 923 rt->lod == sf->u.tex.level && 924 rt->arrayIndex == sf->u.tex.first_layer) 925 return false; 926 927 bool need_fence = false; 928 929 /* StoreTile for changed target */ 930 if (rt->xpBaseAddress) { 931 /* If changing attachment to a new target, mark tiles as 932 * INVALID so they are reloaded from surface. */ 933 swr_store_render_target(&ctx->pipe, attachment, SWR_TILE_INVALID); 934 need_fence = true; 935 } else { 936 /* if no previous attachment, invalidate tiles that may be marked 937 * RESOLVED because of an old attachment */ 938 swr_invalidate_render_target(&ctx->pipe, attachment, sf->width, sf->height); 939 /* no need to set fence here */ 940 } 941 942 /* Make new attachment */ 943 *rt = *swr_surface; 944 rt->format = fmt; 945 rt->lod = sf->u.tex.level; 946 rt->arrayIndex = sf->u.tex.first_layer; 947 948 return need_fence; 949} 950 951/* 952 * for cases where resources are shared between contexts, invalidate 953 * this ctx's resource. so it can be fetched fresh. Old ctx's resource 954 * is already stored during a flush 955 */ 956static inline void 957swr_invalidate_buffers_after_ctx_change(struct pipe_context *pipe) 958{ 959 struct swr_context *ctx = swr_context(pipe); 960 961 for (uint32_t i = 0; i < ctx->framebuffer.nr_cbufs; i++) { 962 struct pipe_surface *cb = ctx->framebuffer.cbufs[i]; 963 if (cb) { 964 struct swr_resource *res = swr_resource(cb->texture); 965 if (res->curr_pipe != pipe) { 966 /* if curr_pipe is NULL (first use), status should not be WRITE */ 967 assert(res->curr_pipe || !(res->status & SWR_RESOURCE_WRITE)); 968 if (res->status & SWR_RESOURCE_WRITE) { 969 swr_invalidate_render_target(pipe, i, cb->width, cb->height); 970 } 971 } 972 res->curr_pipe = pipe; 973 } 974 } 975 if (ctx->framebuffer.zsbuf) { 976 struct pipe_surface *zb = ctx->framebuffer.zsbuf; 977 if (zb) { 978 struct swr_resource *res = swr_resource(zb->texture); 979 if (res->curr_pipe != pipe) { 980 /* if curr_pipe is NULL (first use), status should not be WRITE */ 981 assert(res->curr_pipe || !(res->status & SWR_RESOURCE_WRITE)); 982 if (res->status & SWR_RESOURCE_WRITE) { 983 swr_invalidate_render_target(pipe, SWR_ATTACHMENT_DEPTH, zb->width, zb->height); 984 swr_invalidate_render_target(pipe, SWR_ATTACHMENT_STENCIL, zb->width, zb->height); 985 } 986 } 987 res->curr_pipe = pipe; 988 } 989 } 990} 991 992static inline void 993swr_user_vbuf_range(const struct pipe_draw_info *info, 994 const struct swr_vertex_element_state *velems, 995 const struct pipe_vertex_buffer *vb, 996 uint32_t i, 997 uint32_t *totelems, 998 uint32_t *base, 999 uint32_t *size) 1000{ 1001 /* FIXME: The size is too large - we don't access the full extra stride. */ 1002 unsigned elems; 1003 if (velems->instanced_bufs & (1U << i)) { 1004 elems = info->instance_count / velems->min_instance_div[i] + 1; 1005 *totelems = info->start_instance + elems; 1006 *base = info->start_instance * vb->stride; 1007 *size = elems * vb->stride; 1008 } else if (vb->stride) { 1009 elems = info->max_index - info->min_index + 1; 1010 *totelems = (info->max_index + info->index_bias) + 1; 1011 *base = (info->min_index + info->index_bias) * vb->stride; 1012 *size = elems * vb->stride; 1013 } else { 1014 *totelems = 1; 1015 *base = 0; 1016 *size = velems->stream_pitch[i]; 1017 } 1018} 1019 1020static void 1021swr_update_poly_stipple(struct swr_context *ctx) 1022{ 1023 struct swr_draw_context *pDC = &ctx->swrDC; 1024 1025 assert(sizeof(ctx->poly_stipple.pipe.stipple) == sizeof(pDC->polyStipple)); 1026 memcpy(pDC->polyStipple, 1027 ctx->poly_stipple.pipe.stipple, 1028 sizeof(ctx->poly_stipple.pipe.stipple)); 1029} 1030 1031void 1032swr_update_derived(struct pipe_context *pipe, 1033 const struct pipe_draw_info *p_draw_info) 1034{ 1035 struct swr_context *ctx = swr_context(pipe); 1036 struct swr_screen *screen = swr_screen(pipe->screen); 1037 1038 /* When called from swr_clear (p_draw_info = null), set any null 1039 * state-objects to the dummy state objects to prevent nullptr dereference 1040 * in validation below. 1041 * 1042 * Important that this remains static for zero initialization. These 1043 * aren't meant to be proper state objects, just empty structs. They will 1044 * not be written to. 1045 * 1046 * Shaders can't be part of the union since they contain std::unordered_map 1047 */ 1048 static struct { 1049 union { 1050 struct pipe_rasterizer_state rasterizer; 1051 struct pipe_depth_stencil_alpha_state depth_stencil; 1052 struct swr_blend_state blend; 1053 } state; 1054 struct swr_vertex_shader vs; 1055 struct swr_fragment_shader fs; 1056 } swr_dummy; 1057 1058 if (!p_draw_info) { 1059 if (!ctx->rasterizer) 1060 ctx->rasterizer = &swr_dummy.state.rasterizer; 1061 if (!ctx->depth_stencil) 1062 ctx->depth_stencil = &swr_dummy.state.depth_stencil; 1063 if (!ctx->blend) 1064 ctx->blend = &swr_dummy.state.blend; 1065 if (!ctx->vs) 1066 ctx->vs = &swr_dummy.vs; 1067 if (!ctx->fs) 1068 ctx->fs = &swr_dummy.fs; 1069 } 1070 1071 /* Update screen->pipe to current pipe context. */ 1072 screen->pipe = pipe; 1073 1074 /* Any state that requires dirty flags to be re-triggered sets this mask */ 1075 /* For example, user_buffer vertex and index buffers. */ 1076 unsigned post_update_dirty_flags = 0; 1077 1078 /* bring resources that changed context up-to-date */ 1079 swr_invalidate_buffers_after_ctx_change(pipe); 1080 1081 /* Render Targets */ 1082 if (ctx->dirty & SWR_NEW_FRAMEBUFFER) { 1083 struct pipe_framebuffer_state *fb = &ctx->framebuffer; 1084 const struct util_format_description *desc = NULL; 1085 bool need_fence = false; 1086 1087 /* colorbuffer targets */ 1088 if (fb->nr_cbufs) { 1089 for (unsigned i = 0; i < fb->nr_cbufs; ++i) 1090 need_fence |= swr_change_rt( 1091 ctx, SWR_ATTACHMENT_COLOR0 + i, fb->cbufs[i]); 1092 } 1093 for (unsigned i = fb->nr_cbufs; i < SWR_NUM_RENDERTARGETS; ++i) 1094 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_COLOR0 + i, NULL); 1095 1096 /* depth/stencil target */ 1097 if (fb->zsbuf) 1098 desc = util_format_description(fb->zsbuf->format); 1099 if (fb->zsbuf && util_format_has_depth(desc)) 1100 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, fb->zsbuf); 1101 else 1102 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_DEPTH, NULL); 1103 1104 if (fb->zsbuf && util_format_has_stencil(desc)) 1105 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, fb->zsbuf); 1106 else 1107 need_fence |= swr_change_rt(ctx, SWR_ATTACHMENT_STENCIL, NULL); 1108 1109 /* This fence ensures any attachment changes are resolved before the 1110 * next draw */ 1111 if (need_fence) 1112 swr_fence_submit(ctx, screen->flush_fence); 1113 } 1114 1115 /* Raster state */ 1116 if (ctx->dirty & (SWR_NEW_RASTERIZER | 1117 SWR_NEW_VS | // clipping 1118 SWR_NEW_FRAMEBUFFER)) { 1119 pipe_rasterizer_state *rasterizer = ctx->rasterizer; 1120 pipe_framebuffer_state *fb = &ctx->framebuffer; 1121 1122 SWR_RASTSTATE *rastState = &ctx->derived.rastState; 1123 rastState->cullMode = swr_convert_cull_mode(rasterizer->cull_face); 1124 rastState->frontWinding = rasterizer->front_ccw 1125 ? SWR_FRONTWINDING_CCW 1126 : SWR_FRONTWINDING_CW; 1127 rastState->scissorEnable = rasterizer->scissor; 1128 rastState->pointSize = rasterizer->point_size > 0.0f 1129 ? rasterizer->point_size 1130 : 1.0f; 1131 rastState->lineWidth = rasterizer->line_width > 0.0f 1132 ? rasterizer->line_width 1133 : 1.0f; 1134 1135 rastState->pointParam = rasterizer->point_size_per_vertex; 1136 1137 rastState->pointSpriteEnable = rasterizer->sprite_coord_enable; 1138 rastState->pointSpriteTopOrigin = 1139 rasterizer->sprite_coord_mode == PIPE_SPRITE_COORD_UPPER_LEFT; 1140 1141 /* If SWR_MSAA_FORCE_ENABLE is set, turn msaa on */ 1142 if (screen->msaa_force_enable && !rasterizer->multisample) { 1143 /* Force enable and use the value the surface was created with */ 1144 rasterizer->multisample = true; 1145 fb->samples = swr_resource(fb->cbufs[0]->texture)->swr.numSamples; 1146 fprintf(stderr,"msaa force enable: %d samples\n", fb->samples); 1147 } 1148 1149 rastState->sampleCount = GetSampleCount(fb->samples); 1150 rastState->forcedSampleCount = false; 1151 rastState->bIsCenterPattern = !rasterizer->multisample; 1152 rastState->pixelLocation = SWR_PIXEL_LOCATION_CENTER; 1153 1154 /* Only initialize sample positions if msaa is enabled */ 1155 if (rasterizer->multisample) { 1156 for (uint32_t i = 0; i < fb->samples; i++) { 1157 const uint8_t *sample = swr_sample_positions[fb->samples-1 + i]; 1158 rastState->samplePositions.SetXi(i, sample[0] << 4); 1159 rastState->samplePositions.SetYi(i, sample[1] << 4); 1160 rastState->samplePositions.SetX (i, sample[0] / 16.0f); 1161 rastState->samplePositions.SetY (i, sample[1] / 16.0f); 1162 } 1163 rastState->samplePositions.PrecalcSampleData(fb->samples); 1164 } 1165 1166 bool do_offset = false; 1167 switch (rasterizer->fill_front) { 1168 case PIPE_POLYGON_MODE_FILL: 1169 do_offset = rasterizer->offset_tri; 1170 break; 1171 case PIPE_POLYGON_MODE_LINE: 1172 do_offset = rasterizer->offset_line; 1173 break; 1174 case PIPE_POLYGON_MODE_POINT: 1175 do_offset = rasterizer->offset_point; 1176 break; 1177 } 1178 1179 if (do_offset) { 1180 rastState->depthBias = rasterizer->offset_units; 1181 rastState->slopeScaledDepthBias = rasterizer->offset_scale; 1182 rastState->depthBiasClamp = rasterizer->offset_clamp; 1183 } else { 1184 rastState->depthBias = 0; 1185 rastState->slopeScaledDepthBias = 0; 1186 rastState->depthBiasClamp = 0; 1187 } 1188 1189 /* translate polygon mode, at least for the front==back case */ 1190 rastState->fillMode = swr_convert_fill_mode(rasterizer->fill_front); 1191 1192 struct pipe_surface *zb = fb->zsbuf; 1193 if (zb && swr_resource(zb->texture)->has_depth) 1194 rastState->depthFormat = swr_resource(zb->texture)->swr.format; 1195 1196 rastState->depthClipEnable = rasterizer->depth_clip_near; 1197 rastState->clipHalfZ = rasterizer->clip_halfz; 1198 1199 ctx->api.pfnSwrSetRastState(ctx->swrContext, rastState); 1200 } 1201 1202 /* Viewport */ 1203 if (ctx->dirty & (SWR_NEW_VIEWPORT | SWR_NEW_FRAMEBUFFER 1204 | SWR_NEW_RASTERIZER)) { 1205 pipe_viewport_state *state = &ctx->viewport; 1206 pipe_framebuffer_state *fb = &ctx->framebuffer; 1207 pipe_rasterizer_state *rasterizer = ctx->rasterizer; 1208 1209 SWR_VIEWPORT *vp = &ctx->derived.vp; 1210 SWR_VIEWPORT_MATRICES *vpm = &ctx->derived.vpm; 1211 1212 vp->x = state->translate[0] - state->scale[0]; 1213 vp->width = 2 * state->scale[0]; 1214 vp->y = state->translate[1] - fabs(state->scale[1]); 1215 vp->height = 2 * fabs(state->scale[1]); 1216 util_viewport_zmin_zmax(state, rasterizer->clip_halfz, 1217 &vp->minZ, &vp->maxZ); 1218 1219 vpm->m00[0] = state->scale[0]; 1220 vpm->m11[0] = state->scale[1]; 1221 vpm->m22[0] = state->scale[2]; 1222 vpm->m30[0] = state->translate[0]; 1223 vpm->m31[0] = state->translate[1]; 1224 vpm->m32[0] = state->translate[2]; 1225 1226 /* Now that the matrix is calculated, clip the view coords to screen 1227 * size. OpenGL allows for -ve x,y in the viewport. */ 1228 if (vp->x < 0.0f) { 1229 vp->width += vp->x; 1230 vp->x = 0.0f; 1231 } 1232 if (vp->y < 0.0f) { 1233 vp->height += vp->y; 1234 vp->y = 0.0f; 1235 } 1236 vp->width = std::min(vp->width, (float)fb->width - vp->x); 1237 vp->height = std::min(vp->height, (float)fb->height - vp->y); 1238 1239 ctx->api.pfnSwrSetViewports(ctx->swrContext, 1, vp, vpm); 1240 } 1241 1242 /* When called from swr_clear (p_draw_info = null), render targets, 1243 * rasterState and viewports (dependent on render targets) are the only 1244 * necessary validation. Defer remaining validation by setting 1245 * post_update_dirty_flags and clear all dirty flags. BackendState is 1246 * still unconditionally validated below */ 1247 if (!p_draw_info) { 1248 post_update_dirty_flags = ctx->dirty & ~(SWR_NEW_FRAMEBUFFER | 1249 SWR_NEW_RASTERIZER | 1250 SWR_NEW_VIEWPORT); 1251 ctx->dirty = 0; 1252 } 1253 1254 /* Scissor */ 1255 if (ctx->dirty & SWR_NEW_SCISSOR) { 1256 ctx->api.pfnSwrSetScissorRects(ctx->swrContext, 1, &ctx->swr_scissor); 1257 } 1258 1259 /* Set vertex & index buffers */ 1260 if (ctx->dirty & SWR_NEW_VERTEX) { 1261 const struct pipe_draw_info &info = *p_draw_info; 1262 1263 /* vertex buffers */ 1264 SWR_VERTEX_BUFFER_STATE swrVertexBuffers[PIPE_MAX_ATTRIBS]; 1265 for (UINT i = 0; i < ctx->num_vertex_buffers; i++) { 1266 uint32_t size, pitch, elems, partial_inbounds; 1267 uint32_t min_vertex_index; 1268 const uint8_t *p_data; 1269 struct pipe_vertex_buffer *vb = &ctx->vertex_buffer[i]; 1270 1271 pitch = vb->stride; 1272 if (vb->is_user_buffer) { 1273 /* Client buffer 1274 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to 1275 * revalidate on each draw */ 1276 post_update_dirty_flags |= SWR_NEW_VERTEX; 1277 1278 uint32_t base; 1279 swr_user_vbuf_range(&info, ctx->velems, vb, i, &elems, &base, &size); 1280 partial_inbounds = 0; 1281 min_vertex_index = info.min_index + info.index_bias; 1282 1283 size = AlignUp(size, 4); 1284 /* If size of client memory copy is too large, don't copy. The 1285 * draw will access user-buffer directly and then block. This is 1286 * faster than queuing many large client draws. */ 1287 if (size >= screen->client_copy_limit) { 1288 post_update_dirty_flags |= SWR_LARGE_CLIENT_DRAW; 1289 p_data = (const uint8_t *) vb->buffer.user; 1290 } else { 1291 /* Copy only needed vertices to scratch space */ 1292 const void *ptr = (const uint8_t *) vb->buffer.user + base; 1293 ptr = (uint8_t *)swr_copy_to_scratch_space( 1294 ctx, &ctx->scratch->vertex_buffer, ptr, size); 1295 p_data = (const uint8_t *)ptr - base; 1296 } 1297 } else if (vb->buffer.resource) { 1298 /* VBO */ 1299 if (!pitch) { 1300 /* If pitch=0 (ie vb->stride), buffer contains a single 1301 * constant attribute. Use the stream_pitch which was 1302 * calculated during creation of vertex_elements_state for the 1303 * size of the attribute. */ 1304 size = ctx->velems->stream_pitch[i]; 1305 elems = 1; 1306 partial_inbounds = 0; 1307 min_vertex_index = 0; 1308 } else { 1309 /* size is based on buffer->width0 rather than info.max_index 1310 * to prevent having to validate VBO on each draw. */ 1311 size = vb->buffer.resource->width0; 1312 elems = size / pitch; 1313 partial_inbounds = size % pitch; 1314 min_vertex_index = 0; 1315 } 1316 1317 p_data = swr_resource_data(vb->buffer.resource) + vb->buffer_offset; 1318 } else 1319 p_data = NULL; 1320 1321 swrVertexBuffers[i] = {0}; 1322 swrVertexBuffers[i].index = i; 1323 swrVertexBuffers[i].pitch = pitch; 1324 swrVertexBuffers[i].xpData = (gfxptr_t) p_data; 1325 swrVertexBuffers[i].size = size; 1326 swrVertexBuffers[i].minVertex = min_vertex_index; 1327 swrVertexBuffers[i].maxVertex = elems; 1328 swrVertexBuffers[i].partialInboundsSize = partial_inbounds; 1329 } 1330 1331 ctx->api.pfnSwrSetVertexBuffers( 1332 ctx->swrContext, ctx->num_vertex_buffers, swrVertexBuffers); 1333 1334 /* index buffer, if required (info passed in by swr_draw_vbo) */ 1335 SWR_FORMAT index_type = R32_UINT; /* Default for non-indexed draws */ 1336 if (info.index_size) { 1337 const uint8_t *p_data; 1338 uint32_t size, pitch; 1339 1340 pitch = info.index_size ? info.index_size : sizeof(uint32_t); 1341 index_type = swr_convert_index_type(pitch); 1342 1343 if (!info.has_user_indices) { 1344 /* VBO 1345 * size is based on buffer->width0 rather than info.count 1346 * to prevent having to validate VBO on each draw */ 1347 size = info.index.resource->width0; 1348 p_data = swr_resource_data(info.index.resource); 1349 } else { 1350 /* Client buffer 1351 * client memory is one-time use, re-trigger SWR_NEW_VERTEX to 1352 * revalidate on each draw */ 1353 post_update_dirty_flags |= SWR_NEW_VERTEX; 1354 1355 size = info.count * pitch; 1356 size = AlignUp(size, 4); 1357 /* If size of client memory copy is too large, don't copy. The 1358 * draw will access user-buffer directly and then block. This is 1359 * faster than queuing many large client draws. */ 1360 if (size >= screen->client_copy_limit) { 1361 post_update_dirty_flags |= SWR_LARGE_CLIENT_DRAW; 1362 p_data = (const uint8_t *) info.index.user; 1363 } else { 1364 /* Copy indices to scratch space */ 1365 const void *ptr = info.index.user; 1366 ptr = swr_copy_to_scratch_space( 1367 ctx, &ctx->scratch->index_buffer, ptr, size); 1368 p_data = (const uint8_t *)ptr; 1369 } 1370 } 1371 1372 SWR_INDEX_BUFFER_STATE swrIndexBuffer; 1373 swrIndexBuffer.format = swr_convert_index_type(info.index_size); 1374 swrIndexBuffer.xpIndices = (gfxptr_t) p_data; 1375 swrIndexBuffer.size = size; 1376 1377 ctx->api.pfnSwrSetIndexBuffer(ctx->swrContext, &swrIndexBuffer); 1378 } 1379 1380 struct swr_vertex_element_state *velems = ctx->velems; 1381 if (velems && velems->fsState.indexType != index_type) { 1382 velems->fsFunc = NULL; 1383 velems->fsState.indexType = index_type; 1384 } 1385 } 1386 1387 /* GeometryShader */ 1388 if (ctx->dirty & (SWR_NEW_GS | 1389 SWR_NEW_VS | 1390 SWR_NEW_SAMPLER | 1391 SWR_NEW_SAMPLER_VIEW)) { 1392 if (ctx->gs) { 1393 swr_jit_gs_key key; 1394 swr_generate_gs_key(key, ctx, ctx->gs); 1395 auto search = ctx->gs->map.find(key); 1396 PFN_GS_FUNC func; 1397 if (search != ctx->gs->map.end()) { 1398 func = search->second->shader; 1399 } else { 1400 func = swr_compile_gs(ctx, key); 1401 } 1402 ctx->api.pfnSwrSetGsFunc(ctx->swrContext, func); 1403 1404 /* JIT sampler state */ 1405 if (ctx->dirty & SWR_NEW_SAMPLER) { 1406 swr_update_sampler_state(ctx, 1407 PIPE_SHADER_GEOMETRY, 1408 key.nr_samplers, 1409 ctx->swrDC.samplersGS); 1410 } 1411 1412 /* JIT sampler view state */ 1413 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) { 1414 swr_update_texture_state(ctx, 1415 PIPE_SHADER_GEOMETRY, 1416 key.nr_sampler_views, 1417 ctx->swrDC.texturesGS); 1418 } 1419 1420 ctx->api.pfnSwrSetGsState(ctx->swrContext, &ctx->gs->gsState); 1421 } else { 1422 SWR_GS_STATE state = { 0 }; 1423 ctx->api.pfnSwrSetGsState(ctx->swrContext, &state); 1424 ctx->api.pfnSwrSetGsFunc(ctx->swrContext, NULL); 1425 } 1426 } 1427 1428 /* VertexShader */ 1429 if (ctx->dirty & (SWR_NEW_VS | 1430 SWR_NEW_RASTERIZER | // for clip planes 1431 SWR_NEW_SAMPLER | 1432 SWR_NEW_SAMPLER_VIEW | 1433 SWR_NEW_FRAMEBUFFER)) { 1434 swr_jit_vs_key key; 1435 swr_generate_vs_key(key, ctx, ctx->vs); 1436 auto search = ctx->vs->map.find(key); 1437 PFN_VERTEX_FUNC func; 1438 if (search != ctx->vs->map.end()) { 1439 func = search->second->shader; 1440 } else { 1441 func = swr_compile_vs(ctx, key); 1442 } 1443 ctx->api.pfnSwrSetVertexFunc(ctx->swrContext, func); 1444 1445 /* JIT sampler state */ 1446 if (ctx->dirty & SWR_NEW_SAMPLER) { 1447 swr_update_sampler_state(ctx, 1448 PIPE_SHADER_VERTEX, 1449 key.nr_samplers, 1450 ctx->swrDC.samplersVS); 1451 } 1452 1453 /* JIT sampler view state */ 1454 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | SWR_NEW_FRAMEBUFFER)) { 1455 swr_update_texture_state(ctx, 1456 PIPE_SHADER_VERTEX, 1457 key.nr_sampler_views, 1458 ctx->swrDC.texturesVS); 1459 } 1460 } 1461 1462 /* work around the fact that poly stipple also affects lines */ 1463 /* and points, since we rasterize them as triangles, too */ 1464 /* Has to be before fragment shader, since it sets SWR_NEW_FS */ 1465 if (p_draw_info) { 1466 bool new_prim_is_poly = 1467 (u_reduced_prim(p_draw_info->mode) == PIPE_PRIM_TRIANGLES) && 1468 (ctx->derived.rastState.fillMode == SWR_FILLMODE_SOLID); 1469 if (new_prim_is_poly != ctx->poly_stipple.prim_is_poly) { 1470 ctx->dirty |= SWR_NEW_FS; 1471 ctx->poly_stipple.prim_is_poly = new_prim_is_poly; 1472 } 1473 } 1474 1475 /* FragmentShader */ 1476 if (ctx->dirty & (SWR_NEW_FS | 1477 SWR_NEW_VS | 1478 SWR_NEW_GS | 1479 SWR_NEW_RASTERIZER | 1480 SWR_NEW_SAMPLER | 1481 SWR_NEW_SAMPLER_VIEW | 1482 SWR_NEW_FRAMEBUFFER)) { 1483 swr_jit_fs_key key; 1484 swr_generate_fs_key(key, ctx, ctx->fs); 1485 auto search = ctx->fs->map.find(key); 1486 PFN_PIXEL_KERNEL func; 1487 if (search != ctx->fs->map.end()) { 1488 func = search->second->shader; 1489 } else { 1490 func = swr_compile_fs(ctx, key); 1491 } 1492 SWR_PS_STATE psState = {0}; 1493 psState.pfnPixelShader = func; 1494 psState.killsPixel = ctx->fs->info.base.uses_kill; 1495 psState.inputCoverage = SWR_INPUT_COVERAGE_NORMAL; 1496 psState.writesODepth = ctx->fs->info.base.writes_z; 1497 psState.usesSourceDepth = ctx->fs->info.base.reads_z; 1498 psState.shadingRate = SWR_SHADING_RATE_PIXEL; 1499 psState.renderTargetMask = (1 << ctx->framebuffer.nr_cbufs) - 1; 1500 psState.posOffset = SWR_PS_POSITION_SAMPLE_NONE; 1501 uint32_t barycentricsMask = 0; 1502#if 0 1503 // when we switch to mesa-master 1504 if (ctx->fs->info.base.uses_persp_center || 1505 ctx->fs->info.base.uses_linear_center) 1506 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK; 1507 if (ctx->fs->info.base.uses_persp_centroid || 1508 ctx->fs->info.base.uses_linear_centroid) 1509 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK; 1510 if (ctx->fs->info.base.uses_persp_sample || 1511 ctx->fs->info.base.uses_linear_sample) 1512 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK; 1513#else 1514 for (unsigned i = 0; i < ctx->fs->info.base.num_inputs; i++) { 1515 switch (ctx->fs->info.base.input_interpolate_loc[i]) { 1516 case TGSI_INTERPOLATE_LOC_CENTER: 1517 barycentricsMask |= SWR_BARYCENTRIC_PER_PIXEL_MASK; 1518 break; 1519 case TGSI_INTERPOLATE_LOC_CENTROID: 1520 barycentricsMask |= SWR_BARYCENTRIC_CENTROID_MASK; 1521 break; 1522 case TGSI_INTERPOLATE_LOC_SAMPLE: 1523 barycentricsMask |= SWR_BARYCENTRIC_PER_SAMPLE_MASK; 1524 break; 1525 } 1526 } 1527#endif 1528 psState.barycentricsMask = barycentricsMask; 1529 psState.usesUAV = false; // XXX 1530 psState.forceEarlyZ = false; 1531 ctx->api.pfnSwrSetPixelShaderState(ctx->swrContext, &psState); 1532 1533 /* JIT sampler state */ 1534 if (ctx->dirty & (SWR_NEW_SAMPLER | 1535 SWR_NEW_FS)) { 1536 swr_update_sampler_state(ctx, 1537 PIPE_SHADER_FRAGMENT, 1538 key.nr_samplers, 1539 ctx->swrDC.samplersFS); 1540 } 1541 1542 /* JIT sampler view state */ 1543 if (ctx->dirty & (SWR_NEW_SAMPLER_VIEW | 1544 SWR_NEW_FRAMEBUFFER | 1545 SWR_NEW_FS)) { 1546 swr_update_texture_state(ctx, 1547 PIPE_SHADER_FRAGMENT, 1548 key.nr_sampler_views, 1549 ctx->swrDC.texturesFS); 1550 } 1551 } 1552 1553 1554 /* VertexShader Constants */ 1555 if (ctx->dirty & SWR_NEW_VSCONSTANTS) { 1556 swr_update_constants(ctx, PIPE_SHADER_VERTEX); 1557 } 1558 1559 /* FragmentShader Constants */ 1560 if (ctx->dirty & SWR_NEW_FSCONSTANTS) { 1561 swr_update_constants(ctx, PIPE_SHADER_FRAGMENT); 1562 } 1563 1564 /* GeometryShader Constants */ 1565 if (ctx->dirty & SWR_NEW_GSCONSTANTS) { 1566 swr_update_constants(ctx, PIPE_SHADER_GEOMETRY); 1567 } 1568 1569 /* Depth/stencil state */ 1570 if (ctx->dirty & (SWR_NEW_DEPTH_STENCIL_ALPHA | SWR_NEW_FRAMEBUFFER)) { 1571 struct pipe_depth_state *depth = &(ctx->depth_stencil->depth); 1572 struct pipe_stencil_state *stencil = ctx->depth_stencil->stencil; 1573 SWR_DEPTH_STENCIL_STATE depthStencilState = {{0}}; 1574 SWR_DEPTH_BOUNDS_STATE depthBoundsState = {0}; 1575 1576 /* XXX, incomplete. Need to flesh out stencil & alpha test state 1577 struct pipe_stencil_state *front_stencil = 1578 ctx->depth_stencil.stencil[0]; 1579 struct pipe_stencil_state *back_stencil = ctx->depth_stencil.stencil[1]; 1580 struct pipe_alpha_state alpha; 1581 */ 1582 if (stencil[0].enabled) { 1583 depthStencilState.stencilWriteEnable = 1; 1584 depthStencilState.stencilTestEnable = 1; 1585 depthStencilState.stencilTestFunc = 1586 swr_convert_depth_func(stencil[0].func); 1587 1588 depthStencilState.stencilPassDepthPassOp = 1589 swr_convert_stencil_op(stencil[0].zpass_op); 1590 depthStencilState.stencilPassDepthFailOp = 1591 swr_convert_stencil_op(stencil[0].zfail_op); 1592 depthStencilState.stencilFailOp = 1593 swr_convert_stencil_op(stencil[0].fail_op); 1594 depthStencilState.stencilWriteMask = stencil[0].writemask; 1595 depthStencilState.stencilTestMask = stencil[0].valuemask; 1596 depthStencilState.stencilRefValue = ctx->stencil_ref.ref_value[0]; 1597 } 1598 if (stencil[1].enabled) { 1599 depthStencilState.doubleSidedStencilTestEnable = 1; 1600 1601 depthStencilState.backfaceStencilTestFunc = 1602 swr_convert_depth_func(stencil[1].func); 1603 1604 depthStencilState.backfaceStencilPassDepthPassOp = 1605 swr_convert_stencil_op(stencil[1].zpass_op); 1606 depthStencilState.backfaceStencilPassDepthFailOp = 1607 swr_convert_stencil_op(stencil[1].zfail_op); 1608 depthStencilState.backfaceStencilFailOp = 1609 swr_convert_stencil_op(stencil[1].fail_op); 1610 depthStencilState.backfaceStencilWriteMask = stencil[1].writemask; 1611 depthStencilState.backfaceStencilTestMask = stencil[1].valuemask; 1612 1613 depthStencilState.backfaceStencilRefValue = 1614 ctx->stencil_ref.ref_value[1]; 1615 } 1616 1617 depthStencilState.depthTestEnable = depth->enabled; 1618 depthStencilState.depthTestFunc = swr_convert_depth_func(depth->func); 1619 depthStencilState.depthWriteEnable = depth->writemask; 1620 ctx->api.pfnSwrSetDepthStencilState(ctx->swrContext, &depthStencilState); 1621 1622 depthBoundsState.depthBoundsTestEnable = depth->bounds_test; 1623 depthBoundsState.depthBoundsTestMinValue = depth->bounds_min; 1624 depthBoundsState.depthBoundsTestMaxValue = depth->bounds_max; 1625 ctx->api.pfnSwrSetDepthBoundsState(ctx->swrContext, &depthBoundsState); 1626 } 1627 1628 /* Blend State */ 1629 if (ctx->dirty & (SWR_NEW_BLEND | 1630 SWR_NEW_RASTERIZER | 1631 SWR_NEW_FRAMEBUFFER | 1632 SWR_NEW_DEPTH_STENCIL_ALPHA)) { 1633 struct pipe_framebuffer_state *fb = &ctx->framebuffer; 1634 1635 SWR_BLEND_STATE blendState; 1636 memcpy(&blendState, &ctx->blend->blendState, sizeof(blendState)); 1637 blendState.constantColor[0] = ctx->blend_color.color[0]; 1638 blendState.constantColor[1] = ctx->blend_color.color[1]; 1639 blendState.constantColor[2] = ctx->blend_color.color[2]; 1640 blendState.constantColor[3] = ctx->blend_color.color[3]; 1641 blendState.alphaTestReference = 1642 *((uint32_t*)&ctx->depth_stencil->alpha.ref_value); 1643 1644 blendState.sampleMask = ctx->sample_mask; 1645 blendState.sampleCount = GetSampleCount(fb->samples); 1646 1647 /* If there are no color buffers bound, disable writes on RT0 1648 * and skip loop */ 1649 if (fb->nr_cbufs == 0) { 1650 blendState.renderTarget[0].writeDisableRed = 1; 1651 blendState.renderTarget[0].writeDisableGreen = 1; 1652 blendState.renderTarget[0].writeDisableBlue = 1; 1653 blendState.renderTarget[0].writeDisableAlpha = 1; 1654 ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, 0, NULL); 1655 } 1656 else 1657 for (int target = 0; 1658 target < std::min(SWR_NUM_RENDERTARGETS, 1659 PIPE_MAX_COLOR_BUFS); 1660 target++) { 1661 if (!fb->cbufs[target]) 1662 continue; 1663 1664 struct swr_resource *colorBuffer = 1665 swr_resource(fb->cbufs[target]->texture); 1666 1667 BLEND_COMPILE_STATE compileState; 1668 memset(&compileState, 0, sizeof(compileState)); 1669 compileState.format = colorBuffer->swr.format; 1670 memcpy(&compileState.blendState, 1671 &ctx->blend->compileState[target], 1672 sizeof(compileState.blendState)); 1673 1674 const SWR_FORMAT_INFO& info = GetFormatInfo(compileState.format); 1675 if (compileState.blendState.logicOpEnable && 1676 ((info.type[0] == SWR_TYPE_FLOAT) || info.isSRGB)) { 1677 compileState.blendState.logicOpEnable = false; 1678 } 1679 1680 if (info.type[0] == SWR_TYPE_SINT || info.type[0] == SWR_TYPE_UINT) 1681 compileState.blendState.blendEnable = false; 1682 1683 if (compileState.blendState.blendEnable == false && 1684 compileState.blendState.logicOpEnable == false && 1685 ctx->depth_stencil->alpha.enabled == 0) { 1686 ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, target, NULL); 1687 continue; 1688 } 1689 1690 compileState.desc.alphaTestEnable = 1691 ctx->depth_stencil->alpha.enabled; 1692 compileState.desc.independentAlphaBlendEnable = 1693 (compileState.blendState.sourceBlendFactor != 1694 compileState.blendState.sourceAlphaBlendFactor) || 1695 (compileState.blendState.destBlendFactor != 1696 compileState.blendState.destAlphaBlendFactor) || 1697 (compileState.blendState.colorBlendFunc != 1698 compileState.blendState.alphaBlendFunc); 1699 compileState.desc.alphaToCoverageEnable = 1700 ctx->blend->pipe.alpha_to_coverage; 1701 compileState.desc.sampleMaskEnable = (blendState.sampleMask != 0); 1702 compileState.desc.numSamples = fb->samples; 1703 1704 compileState.alphaTestFunction = 1705 swr_convert_depth_func(ctx->depth_stencil->alpha.func); 1706 compileState.alphaTestFormat = ALPHA_TEST_FLOAT32; // xxx 1707 1708 compileState.Canonicalize(); 1709 1710 PFN_BLEND_JIT_FUNC func = NULL; 1711 auto search = ctx->blendJIT->find(compileState); 1712 if (search != ctx->blendJIT->end()) { 1713 func = search->second; 1714 } else { 1715 HANDLE hJitMgr = screen->hJitMgr; 1716 func = JitCompileBlend(hJitMgr, compileState); 1717 debug_printf("BLEND shader %p\n", func); 1718 assert(func && "Error: BlendShader = NULL"); 1719 1720 ctx->blendJIT->insert(std::make_pair(compileState, func)); 1721 } 1722 ctx->api.pfnSwrSetBlendFunc(ctx->swrContext, target, func); 1723 } 1724 1725 ctx->api.pfnSwrSetBlendState(ctx->swrContext, &blendState); 1726 } 1727 1728 if (ctx->dirty & SWR_NEW_STIPPLE) { 1729 swr_update_poly_stipple(ctx); 1730 } 1731 1732 if (ctx->dirty & (SWR_NEW_VS | SWR_NEW_SO | SWR_NEW_RASTERIZER)) { 1733 ctx->vs->soState.rasterizerDisable = 1734 ctx->rasterizer->rasterizer_discard; 1735 ctx->api.pfnSwrSetSoState(ctx->swrContext, &ctx->vs->soState); 1736 1737 pipe_stream_output_info *stream_output = &ctx->vs->pipe.stream_output; 1738 1739 for (uint32_t i = 0; i < ctx->num_so_targets; i++) { 1740 SWR_STREAMOUT_BUFFER buffer = {0}; 1741 if (!ctx->so_targets[i]) 1742 continue; 1743 buffer.enable = true; 1744 buffer.pBuffer = 1745 (gfxptr_t)(swr_resource_data(ctx->so_targets[i]->buffer) + 1746 ctx->so_targets[i]->buffer_offset); 1747 buffer.bufferSize = ctx->so_targets[i]->buffer_size >> 2; 1748 buffer.pitch = stream_output->stride[i]; 1749 buffer.streamOffset = 0; 1750 1751 ctx->api.pfnSwrSetSoBuffers(ctx->swrContext, &buffer, i); 1752 } 1753 } 1754 1755 if (ctx->dirty & (SWR_NEW_CLIP | SWR_NEW_RASTERIZER | SWR_NEW_VS)) { 1756 // shader exporting clip distances overrides all user clip planes 1757 if (ctx->rasterizer->clip_plane_enable && 1758 !ctx->vs->info.base.num_written_clipdistance) 1759 { 1760 swr_draw_context *pDC = &ctx->swrDC; 1761 memcpy(pDC->userClipPlanes, 1762 ctx->clip.ucp, 1763 sizeof(pDC->userClipPlanes)); 1764 } 1765 } 1766 1767 // set up backend state 1768 SWR_BACKEND_STATE backendState = {0}; 1769 if (ctx->gs) { 1770 backendState.numAttributes = ctx->gs->info.base.num_outputs - 1; 1771 } else { 1772 backendState.numAttributes = ctx->vs->info.base.num_outputs - 1; 1773 if (ctx->fs->info.base.uses_primid) { 1774 backendState.numAttributes++; 1775 backendState.swizzleEnable = true; 1776 for (unsigned i = 0; i < sizeof(backendState.numComponents); i++) { 1777 backendState.swizzleMap[i].sourceAttrib = i; 1778 } 1779 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].constantSource = 1780 SWR_CONSTANT_SOURCE_PRIM_ID; 1781 backendState.swizzleMap[ctx->vs->info.base.num_outputs - 1].componentOverrideMask = 1; 1782 } 1783 } 1784 if (ctx->rasterizer->sprite_coord_enable) 1785 backendState.numAttributes++; 1786 1787 backendState.numAttributes = std::min((size_t)backendState.numAttributes, 1788 sizeof(backendState.numComponents)); 1789 for (unsigned i = 0; i < backendState.numAttributes; i++) 1790 backendState.numComponents[i] = 4; 1791 backendState.constantInterpolationMask = ctx->fs->constantMask | 1792 (ctx->rasterizer->flatshade ? ctx->fs->flatConstantMask : 0); 1793 backendState.pointSpriteTexCoordMask = ctx->fs->pointSpriteMask; 1794 1795 struct tgsi_shader_info *pLastFE = 1796 ctx->gs ? 1797 &ctx->gs->info.base : 1798 &ctx->vs->info.base; 1799 backendState.readRenderTargetArrayIndex = pLastFE->writes_layer; 1800 backendState.readViewportArrayIndex = pLastFE->writes_viewport_index; 1801 backendState.vertexAttribOffset = VERTEX_ATTRIB_START_SLOT; // TODO: optimize 1802 1803 backendState.clipDistanceMask = 1804 ctx->vs->info.base.num_written_clipdistance ? 1805 ctx->vs->info.base.clipdist_writemask & ctx->rasterizer->clip_plane_enable : 1806 ctx->rasterizer->clip_plane_enable; 1807 1808 backendState.cullDistanceMask = 1809 ctx->vs->info.base.culldist_writemask << ctx->vs->info.base.num_written_clipdistance; 1810 1811 // Assume old layout of SGV, POSITION, CLIPCULL, ATTRIB 1812 backendState.vertexClipCullOffset = backendState.vertexAttribOffset - 2; 1813 1814 ctx->api.pfnSwrSetBackendState(ctx->swrContext, &backendState); 1815 1816 /* Ensure that any in-progress attachment change StoreTiles finish */ 1817 if (swr_is_fence_pending(screen->flush_fence)) 1818 swr_fence_finish(pipe->screen, NULL, screen->flush_fence, 0); 1819 1820 /* Finally, update the in-use status of all resources involved in draw */ 1821 swr_update_resource_status(pipe, p_draw_info); 1822 1823 ctx->dirty = post_update_dirty_flags; 1824} 1825 1826 1827static struct pipe_stream_output_target * 1828swr_create_so_target(struct pipe_context *pipe, 1829 struct pipe_resource *buffer, 1830 unsigned buffer_offset, 1831 unsigned buffer_size) 1832{ 1833 struct pipe_stream_output_target *target; 1834 1835 target = CALLOC_STRUCT(pipe_stream_output_target); 1836 if (!target) 1837 return NULL; 1838 1839 target->context = pipe; 1840 target->reference.count = 1; 1841 pipe_resource_reference(&target->buffer, buffer); 1842 target->buffer_offset = buffer_offset; 1843 target->buffer_size = buffer_size; 1844 return target; 1845} 1846 1847static void 1848swr_destroy_so_target(struct pipe_context *pipe, 1849 struct pipe_stream_output_target *target) 1850{ 1851 pipe_resource_reference(&target->buffer, NULL); 1852 FREE(target); 1853} 1854 1855static void 1856swr_set_so_targets(struct pipe_context *pipe, 1857 unsigned num_targets, 1858 struct pipe_stream_output_target **targets, 1859 const unsigned *offsets) 1860{ 1861 struct swr_context *swr = swr_context(pipe); 1862 uint32_t i; 1863 1864 assert(num_targets <= MAX_SO_STREAMS); 1865 1866 for (i = 0; i < num_targets; i++) { 1867 pipe_so_target_reference( 1868 (struct pipe_stream_output_target **)&swr->so_targets[i], 1869 targets[i]); 1870 } 1871 1872 for (/* fall-through */; i < swr->num_so_targets; i++) { 1873 pipe_so_target_reference( 1874 (struct pipe_stream_output_target **)&swr->so_targets[i], NULL); 1875 } 1876 1877 swr->num_so_targets = num_targets; 1878 1879 swr->dirty |= SWR_NEW_SO; 1880} 1881 1882 1883void 1884swr_state_init(struct pipe_context *pipe) 1885{ 1886 pipe->create_blend_state = swr_create_blend_state; 1887 pipe->bind_blend_state = swr_bind_blend_state; 1888 pipe->delete_blend_state = swr_delete_blend_state; 1889 1890 pipe->create_depth_stencil_alpha_state = swr_create_depth_stencil_state; 1891 pipe->bind_depth_stencil_alpha_state = swr_bind_depth_stencil_state; 1892 pipe->delete_depth_stencil_alpha_state = swr_delete_depth_stencil_state; 1893 1894 pipe->create_rasterizer_state = swr_create_rasterizer_state; 1895 pipe->bind_rasterizer_state = swr_bind_rasterizer_state; 1896 pipe->delete_rasterizer_state = swr_delete_rasterizer_state; 1897 1898 pipe->create_sampler_state = swr_create_sampler_state; 1899 pipe->bind_sampler_states = swr_bind_sampler_states; 1900 pipe->delete_sampler_state = swr_delete_sampler_state; 1901 1902 pipe->create_sampler_view = swr_create_sampler_view; 1903 pipe->set_sampler_views = swr_set_sampler_views; 1904 pipe->sampler_view_destroy = swr_sampler_view_destroy; 1905 1906 pipe->create_vs_state = swr_create_vs_state; 1907 pipe->bind_vs_state = swr_bind_vs_state; 1908 pipe->delete_vs_state = swr_delete_vs_state; 1909 1910 pipe->create_fs_state = swr_create_fs_state; 1911 pipe->bind_fs_state = swr_bind_fs_state; 1912 pipe->delete_fs_state = swr_delete_fs_state; 1913 1914 pipe->create_gs_state = swr_create_gs_state; 1915 pipe->bind_gs_state = swr_bind_gs_state; 1916 pipe->delete_gs_state = swr_delete_gs_state; 1917 1918 pipe->set_constant_buffer = swr_set_constant_buffer; 1919 1920 pipe->create_vertex_elements_state = swr_create_vertex_elements_state; 1921 pipe->bind_vertex_elements_state = swr_bind_vertex_elements_state; 1922 pipe->delete_vertex_elements_state = swr_delete_vertex_elements_state; 1923 1924 pipe->set_vertex_buffers = swr_set_vertex_buffers; 1925 1926 pipe->set_polygon_stipple = swr_set_polygon_stipple; 1927 pipe->set_clip_state = swr_set_clip_state; 1928 pipe->set_scissor_states = swr_set_scissor_states; 1929 pipe->set_viewport_states = swr_set_viewport_states; 1930 1931 pipe->set_framebuffer_state = swr_set_framebuffer_state; 1932 1933 pipe->set_blend_color = swr_set_blend_color; 1934 pipe->set_stencil_ref = swr_set_stencil_ref; 1935 1936 pipe->set_sample_mask = swr_set_sample_mask; 1937 pipe->get_sample_position = swr_get_sample_position; 1938 1939 pipe->create_stream_output_target = swr_create_so_target; 1940 pipe->stream_output_target_destroy = swr_destroy_so_target; 1941 pipe->set_stream_output_targets = swr_set_so_targets; 1942} 1943