1/* 2 Copyright (C) Intel Corp. 2006. All Rights Reserved. 3 Intel funded Tungsten Graphics to 4 develop this 3D driver. 5 6 Permission is hereby granted, free of charge, to any person obtaining 7 a copy of this software and associated documentation files (the 8 "Software"), to deal in the Software without restriction, including 9 without limitation the rights to use, copy, modify, merge, publish, 10 distribute, sublicense, and/or sell copies of the Software, and to 11 permit persons to whom the Software is furnished to do so, subject to 12 the following conditions: 13 14 The above copyright notice and this permission notice (including the 15 next paragraph) shall be included in all copies or substantial 16 portions of the Software. 17 18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 26 **********************************************************************/ 27 /* 28 * Authors: 29 * Keith Whitwell <keithw@vmware.com> 30 */ 31 32 33#include "main/compiler.h" 34#include "main/context.h" 35#include "brw_context.h" 36#include "brw_vs.h" 37#include "brw_util.h" 38#include "brw_state.h" 39#include "program/prog_print.h" 40#include "program/prog_parameter.h" 41#include "compiler/brw_nir.h" 42#include "brw_program.h" 43 44#include "util/ralloc.h" 45 46/** 47 * Decide which set of clip planes should be used when clipping via 48 * gl_Position or gl_ClipVertex. 49 */ 50gl_clip_plane * 51brw_select_clip_planes(struct gl_context *ctx) 52{ 53 if (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]) { 54 /* There is currently a GLSL vertex shader, so clip according to GLSL 55 * rules, which means compare gl_ClipVertex (or gl_Position, if 56 * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes 57 * that were stored in EyeUserPlane at the time the clip planes were 58 * specified. 59 */ 60 return ctx->Transform.EyeUserPlane; 61 } else { 62 /* Either we are using fixed function or an ARB vertex program. In 63 * either case the clip planes are going to be compared against 64 * gl_Position (which is in clip coordinates) so we have to clip using 65 * _ClipUserPlane, which was transformed into clip coordinates by Mesa 66 * core. 67 */ 68 return ctx->Transform._ClipUserPlane; 69 } 70} 71 72static GLbitfield64 73brw_vs_outputs_written(struct brw_context *brw, struct brw_vs_prog_key *key, 74 GLbitfield64 user_varyings) 75{ 76 const struct gen_device_info *devinfo = &brw->screen->devinfo; 77 GLbitfield64 outputs_written = user_varyings; 78 79 if (key->copy_edgeflag) { 80 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE); 81 } 82 83 if (devinfo->gen < 6) { 84 /* Put dummy slots into the VUE for the SF to put the replaced 85 * point sprite coords in. We shouldn't need these dummy slots, 86 * which take up precious URB space, but it would mean that the SF 87 * doesn't get nice aligned pairs of input coords into output 88 * coords, which would be a pain to handle. 89 */ 90 for (unsigned i = 0; i < 8; i++) { 91 if (key->point_coord_replace & (1 << i)) 92 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i); 93 } 94 95 /* if back colors are written, allocate slots for front colors too */ 96 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0)) 97 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0); 98 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1)) 99 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1); 100 } 101 102 /* In order for legacy clipping to work, we need to populate the clip 103 * distance varying slots whenever clipping is enabled, even if the vertex 104 * shader doesn't write to gl_ClipDistance. 105 */ 106 if (key->nr_userclip_plane_consts > 0) { 107 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0); 108 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1); 109 } 110 111 return outputs_written; 112} 113 114static bool 115brw_codegen_vs_prog(struct brw_context *brw, 116 struct brw_program *vp, 117 struct brw_vs_prog_key *key) 118{ 119 const struct brw_compiler *compiler = brw->screen->compiler; 120 const struct gen_device_info *devinfo = &brw->screen->devinfo; 121 const GLuint *program; 122 struct brw_vs_prog_data prog_data; 123 struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base; 124 void *mem_ctx; 125 bool start_busy = false; 126 double start_time = 0; 127 128 memset(&prog_data, 0, sizeof(prog_data)); 129 130 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */ 131 if (vp->program.is_arb_asm) 132 stage_prog_data->use_alt_mode = true; 133 134 mem_ctx = ralloc_context(NULL); 135 136 nir_shader *nir = nir_shader_clone(mem_ctx, vp->program.nir); 137 138 brw_assign_common_binding_table_offsets(devinfo, &vp->program, 139 &prog_data.base.base, 0); 140 141 if (!vp->program.is_arb_asm) { 142 brw_nir_setup_glsl_uniforms(mem_ctx, nir, &vp->program, 143 &prog_data.base.base, 144 compiler->scalar_stage[MESA_SHADER_VERTEX]); 145 brw_nir_analyze_ubo_ranges(compiler, nir, key, 146 prog_data.base.base.ubo_ranges); 147 } else { 148 brw_nir_setup_arb_uniforms(mem_ctx, nir, &vp->program, 149 &prog_data.base.base); 150 } 151 152 uint64_t outputs_written = 153 brw_vs_outputs_written(brw, key, nir->info.outputs_written); 154 155 brw_compute_vue_map(devinfo, 156 &prog_data.base.vue_map, outputs_written, 157 nir->info.separate_shader); 158 159 if (0) { 160 _mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true); 161 } 162 163 if (unlikely(brw->perf_debug)) { 164 start_busy = (brw->batch.last_bo && 165 brw_bo_busy(brw->batch.last_bo)); 166 start_time = get_time(); 167 } 168 169 if (unlikely(INTEL_DEBUG & DEBUG_VS)) { 170 if (vp->program.is_arb_asm) 171 brw_dump_arb_asm("vertex", &vp->program); 172 } 173 174 int st_index = -1; 175 if (INTEL_DEBUG & DEBUG_SHADER_TIME) { 176 st_index = brw_get_shader_time_index(brw, &vp->program, ST_VS, 177 !vp->program.is_arb_asm); 178 } 179 180 /* Emit GEN4 code. 181 */ 182 char *error_str; 183 program = brw_compile_vs(compiler, brw, mem_ctx, key, &prog_data, 184 nir, st_index, &error_str); 185 if (program == NULL) { 186 if (!vp->program.is_arb_asm) { 187 vp->program.sh.data->LinkStatus = LINKING_FAILURE; 188 ralloc_strcat(&vp->program.sh.data->InfoLog, error_str); 189 } 190 191 _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", error_str); 192 193 ralloc_free(mem_ctx); 194 return false; 195 } 196 197 if (unlikely(brw->perf_debug)) { 198 if (vp->compiled_once) { 199 brw_debug_recompile(brw, MESA_SHADER_VERTEX, vp->program.Id, 200 key->program_string_id, key); 201 } 202 if (start_busy && !brw_bo_busy(brw->batch.last_bo)) { 203 perf_debug("VS compile took %.03f ms and stalled the GPU\n", 204 (get_time() - start_time) * 1000); 205 } 206 vp->compiled_once = true; 207 } 208 209 /* Scratch space is used for register spilling */ 210 brw_alloc_stage_scratch(brw, &brw->vs.base, 211 prog_data.base.base.total_scratch); 212 213 /* The param and pull_param arrays will be freed by the shader cache. */ 214 ralloc_steal(NULL, prog_data.base.base.param); 215 ralloc_steal(NULL, prog_data.base.base.pull_param); 216 brw_upload_cache(&brw->cache, BRW_CACHE_VS_PROG, 217 key, sizeof(struct brw_vs_prog_key), 218 program, prog_data.base.base.program_size, 219 &prog_data, sizeof(prog_data), 220 &brw->vs.base.prog_offset, &brw->vs.base.prog_data); 221 ralloc_free(mem_ctx); 222 223 return true; 224} 225 226static bool 227brw_vs_state_dirty(const struct brw_context *brw) 228{ 229 return brw_state_dirty(brw, 230 _NEW_BUFFERS | 231 _NEW_LIGHT | 232 _NEW_POINT | 233 _NEW_POLYGON | 234 _NEW_TEXTURE | 235 _NEW_TRANSFORM, 236 BRW_NEW_VERTEX_PROGRAM | 237 BRW_NEW_VS_ATTRIB_WORKAROUNDS); 238} 239 240void 241brw_vs_populate_key(struct brw_context *brw, 242 struct brw_vs_prog_key *key) 243{ 244 struct gl_context *ctx = &brw->ctx; 245 /* BRW_NEW_VERTEX_PROGRAM */ 246 struct gl_program *prog = brw->programs[MESA_SHADER_VERTEX]; 247 struct brw_program *vp = (struct brw_program *) prog; 248 const struct gen_device_info *devinfo = &brw->screen->devinfo; 249 250 memset(key, 0, sizeof(*key)); 251 252 /* Just upload the program verbatim for now. Always send it all 253 * the inputs it asks for, whether they are varying or not. 254 */ 255 key->program_string_id = vp->id; 256 257 if (ctx->Transform.ClipPlanesEnabled != 0 && 258 (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGLES) && 259 vp->program.info.clip_distance_array_size == 0) { 260 key->nr_userclip_plane_consts = 261 _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1; 262 } 263 264 if (devinfo->gen < 6) { 265 /* _NEW_POLYGON */ 266 key->copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL || 267 ctx->Polygon.BackMode != GL_FILL); 268 269 /* _NEW_POINT */ 270 if (ctx->Point.PointSprite) { 271 key->point_coord_replace = ctx->Point.CoordReplace & 0xff; 272 } 273 } 274 275 if (prog->info.outputs_written & 276 (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 | 277 VARYING_BIT_BFC1)) { 278 /* _NEW_LIGHT | _NEW_BUFFERS */ 279 key->clamp_vertex_color = ctx->Light._ClampVertexColor; 280 } 281 282 /* _NEW_TEXTURE */ 283 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex); 284 285 /* BRW_NEW_VS_ATTRIB_WORKAROUNDS */ 286 if (devinfo->gen < 8 && !devinfo->is_haswell) { 287 memcpy(key->gl_attrib_wa_flags, brw->vb.attrib_wa_flags, 288 sizeof(brw->vb.attrib_wa_flags)); 289 } 290} 291 292void 293brw_upload_vs_prog(struct brw_context *brw) 294{ 295 struct brw_vs_prog_key key; 296 /* BRW_NEW_VERTEX_PROGRAM */ 297 struct brw_program *vp = 298 (struct brw_program *) brw->programs[MESA_SHADER_VERTEX]; 299 300 if (!brw_vs_state_dirty(brw)) 301 return; 302 303 brw_vs_populate_key(brw, &key); 304 305 if (brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG, &key, sizeof(key), 306 &brw->vs.base.prog_offset, &brw->vs.base.prog_data, 307 true)) 308 return; 309 310 if (brw_disk_cache_upload_program(brw, MESA_SHADER_VERTEX)) 311 return; 312 313 vp = (struct brw_program *) brw->programs[MESA_SHADER_VERTEX]; 314 vp->id = key.program_string_id; 315 316 MAYBE_UNUSED bool success = brw_codegen_vs_prog(brw, vp, &key); 317 assert(success); 318} 319 320void 321brw_vs_populate_default_key(const struct gen_device_info *devinfo, 322 struct brw_vs_prog_key *key, 323 struct gl_program *prog) 324{ 325 struct brw_program *bvp = brw_program(prog); 326 327 memset(key, 0, sizeof(*key)); 328 329 brw_setup_tex_for_precompile(devinfo, &key->tex, prog); 330 key->program_string_id = bvp->id; 331 key->clamp_vertex_color = 332 (prog->info.outputs_written & 333 (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 | 334 VARYING_BIT_BFC1)); 335} 336 337bool 338brw_vs_precompile(struct gl_context *ctx, struct gl_program *prog) 339{ 340 struct brw_context *brw = brw_context(ctx); 341 struct brw_vs_prog_key key; 342 uint32_t old_prog_offset = brw->vs.base.prog_offset; 343 struct brw_stage_prog_data *old_prog_data = brw->vs.base.prog_data; 344 bool success; 345 346 struct brw_program *bvp = brw_program(prog); 347 348 brw_vs_populate_default_key(&brw->screen->devinfo, &key, prog); 349 350 success = brw_codegen_vs_prog(brw, bvp, &key); 351 352 brw->vs.base.prog_offset = old_prog_offset; 353 brw->vs.base.prog_data = old_prog_data; 354 355 return success; 356} 357