1/* 2 * Copyright © 2018 Valve Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25#include "aco_builder.h" 26#include "aco_ir.h" 27 28#include "common/ac_shader_util.h" 29#include "common/sid.h" 30 31#include <array> 32 33namespace aco { 34 35const std::array<const char*, num_reduce_ops> reduce_ops = []() 36{ 37 std::array<const char*, num_reduce_ops> ret{}; 38 ret[iadd8] = "iadd8"; 39 ret[iadd16] = "iadd16"; 40 ret[iadd32] = "iadd32"; 41 ret[iadd64] = "iadd64"; 42 ret[imul8] = "imul8"; 43 ret[imul16] = "imul16"; 44 ret[imul32] = "imul32"; 45 ret[imul64] = "imul64"; 46 ret[fadd16] = "fadd16"; 47 ret[fadd32] = "fadd32"; 48 ret[fadd64] = "fadd64"; 49 ret[fmul16] = "fmul16"; 50 ret[fmul32] = "fmul32"; 51 ret[fmul64] = "fmul64"; 52 ret[imin8] = "imin8"; 53 ret[imin16] = "imin16"; 54 ret[imin32] = "imin32"; 55 ret[imin64] = "imin64"; 56 ret[imax8] = "imax8"; 57 ret[imax16] = "imax16"; 58 ret[imax32] = "imax32"; 59 ret[imax64] = "imax64"; 60 ret[umin8] = "umin8"; 61 ret[umin16] = "umin16"; 62 ret[umin32] = "umin32"; 63 ret[umin64] = "umin64"; 64 ret[umax8] = "umax8"; 65 ret[umax16] = "umax16"; 66 ret[umax32] = "umax32"; 67 ret[umax64] = "umax64"; 68 ret[fmin16] = "fmin16"; 69 ret[fmin32] = "fmin32"; 70 ret[fmin64] = "fmin64"; 71 ret[fmax16] = "fmax16"; 72 ret[fmax32] = "fmax32"; 73 ret[fmax64] = "fmax64"; 74 ret[iand8] = "iand8"; 75 ret[iand16] = "iand16"; 76 ret[iand32] = "iand32"; 77 ret[iand64] = "iand64"; 78 ret[ior8] = "ior8"; 79 ret[ior16] = "ior16"; 80 ret[ior32] = "ior32"; 81 ret[ior64] = "ior64"; 82 ret[ixor8] = "ixor8"; 83 ret[ixor16] = "ixor16"; 84 ret[ixor32] = "ixor32"; 85 ret[ixor64] = "ixor64"; 86 return ret; 87}(); 88 89static void 90print_reg_class(const RegClass rc, FILE* output) 91{ 92 if (rc.is_subdword()) { 93 fprintf(output, " v%ub: ", rc.bytes()); 94 } else if (rc.type() == RegType::sgpr) { 95 fprintf(output, " s%u: ", rc.size()); 96 } else if (rc.is_linear()) { 97 fprintf(output, " lv%u: ", rc.size()); 98 } else { 99 fprintf(output, " v%u: ", rc.size()); 100 } 101} 102 103void 104print_physReg(PhysReg reg, unsigned bytes, FILE* output, unsigned flags) 105{ 106 if (reg == 124) { 107 fprintf(output, "m0"); 108 } else if (reg == 106) { 109 fprintf(output, "vcc"); 110 } else if (reg == 253) { 111 fprintf(output, "scc"); 112 } else if (reg == 126) { 113 fprintf(output, "exec"); 114 } else { 115 bool is_vgpr = reg / 256; 116 unsigned r = reg % 256; 117 unsigned size = DIV_ROUND_UP(bytes, 4); 118 if (size == 1 && (flags & print_no_ssa)) { 119 fprintf(output, "%c%d", is_vgpr ? 'v' : 's', r); 120 } else { 121 fprintf(output, "%c[%d", is_vgpr ? 'v' : 's', r); 122 if (size > 1) 123 fprintf(output, "-%d]", r + size - 1); 124 else 125 fprintf(output, "]"); 126 } 127 if (reg.byte() || bytes % 4) 128 fprintf(output, "[%d:%d]", reg.byte() * 8, (reg.byte() + bytes) * 8); 129 } 130} 131 132static void 133print_constant(uint8_t reg, FILE* output) 134{ 135 if (reg >= 128 && reg <= 192) { 136 fprintf(output, "%d", reg - 128); 137 return; 138 } else if (reg >= 192 && reg <= 208) { 139 fprintf(output, "%d", 192 - reg); 140 return; 141 } 142 143 switch (reg) { 144 case 240: fprintf(output, "0.5"); break; 145 case 241: fprintf(output, "-0.5"); break; 146 case 242: fprintf(output, "1.0"); break; 147 case 243: fprintf(output, "-1.0"); break; 148 case 244: fprintf(output, "2.0"); break; 149 case 245: fprintf(output, "-2.0"); break; 150 case 246: fprintf(output, "4.0"); break; 151 case 247: fprintf(output, "-4.0"); break; 152 case 248: fprintf(output, "1/(2*PI)"); break; 153 } 154} 155 156void 157aco_print_operand(const Operand* operand, FILE* output, unsigned flags) 158{ 159 if (operand->isLiteral() || (operand->isConstant() && operand->bytes() == 1)) { 160 if (operand->bytes() == 1) 161 fprintf(output, "0x%.2x", operand->constantValue()); 162 else if (operand->bytes() == 2) 163 fprintf(output, "0x%.4x", operand->constantValue()); 164 else 165 fprintf(output, "0x%x", operand->constantValue()); 166 } else if (operand->isConstant()) { 167 print_constant(operand->physReg().reg(), output); 168 } else if (operand->isUndefined()) { 169 print_reg_class(operand->regClass(), output); 170 fprintf(output, "undef"); 171 } else { 172 if (operand->isLateKill()) 173 fprintf(output, "(latekill)"); 174 if (operand->is16bit()) 175 fprintf(output, "(is16bit)"); 176 if (operand->is24bit()) 177 fprintf(output, "(is24bit)"); 178 if ((flags & print_kill) && operand->isKill()) 179 fprintf(output, "(kill)"); 180 181 if (!(flags & print_no_ssa)) 182 fprintf(output, "%%%d%s", operand->tempId(), operand->isFixed() ? ":" : ""); 183 184 if (operand->isFixed()) 185 print_physReg(operand->physReg(), operand->bytes(), output, flags); 186 } 187} 188 189static void 190print_definition(const Definition* definition, FILE* output, unsigned flags) 191{ 192 if (!(flags & print_no_ssa)) 193 print_reg_class(definition->regClass(), output); 194 if (definition->isPrecise()) 195 fprintf(output, "(precise)"); 196 if (definition->isNUW()) 197 fprintf(output, "(nuw)"); 198 if (definition->isNoCSE()) 199 fprintf(output, "(noCSE)"); 200 if ((flags & print_kill) && definition->isKill()) 201 fprintf(output, "(kill)"); 202 if (!(flags & print_no_ssa)) 203 fprintf(output, "%%%d%s", definition->tempId(), definition->isFixed() ? ":" : ""); 204 205 if (definition->isFixed()) 206 print_physReg(definition->physReg(), definition->bytes(), output, flags); 207} 208 209static void 210print_storage(storage_class storage, FILE* output) 211{ 212 fprintf(output, " storage:"); 213 int printed = 0; 214 if (storage & storage_buffer) 215 printed += fprintf(output, "%sbuffer", printed ? "," : ""); 216 if (storage & storage_atomic_counter) 217 printed += fprintf(output, "%satomic_counter", printed ? "," : ""); 218 if (storage & storage_image) 219 printed += fprintf(output, "%simage", printed ? "," : ""); 220 if (storage & storage_shared) 221 printed += fprintf(output, "%sshared", printed ? "," : ""); 222 if (storage & storage_vmem_output) 223 printed += fprintf(output, "%svmem_output", printed ? "," : ""); 224 if (storage & storage_scratch) 225 printed += fprintf(output, "%sscratch", printed ? "," : ""); 226 if (storage & storage_vgpr_spill) 227 printed += fprintf(output, "%svgpr_spill", printed ? "," : ""); 228} 229 230static void 231print_semantics(memory_semantics sem, FILE* output) 232{ 233 fprintf(output, " semantics:"); 234 int printed = 0; 235 if (sem & semantic_acquire) 236 printed += fprintf(output, "%sacquire", printed ? "," : ""); 237 if (sem & semantic_release) 238 printed += fprintf(output, "%srelease", printed ? "," : ""); 239 if (sem & semantic_volatile) 240 printed += fprintf(output, "%svolatile", printed ? "," : ""); 241 if (sem & semantic_private) 242 printed += fprintf(output, "%sprivate", printed ? "," : ""); 243 if (sem & semantic_can_reorder) 244 printed += fprintf(output, "%sreorder", printed ? "," : ""); 245 if (sem & semantic_atomic) 246 printed += fprintf(output, "%satomic", printed ? "," : ""); 247 if (sem & semantic_rmw) 248 printed += fprintf(output, "%srmw", printed ? "," : ""); 249} 250 251static void 252print_scope(sync_scope scope, FILE* output, const char* prefix = "scope") 253{ 254 fprintf(output, " %s:", prefix); 255 switch (scope) { 256 case scope_invocation: fprintf(output, "invocation"); break; 257 case scope_subgroup: fprintf(output, "subgroup"); break; 258 case scope_workgroup: fprintf(output, "workgroup"); break; 259 case scope_queuefamily: fprintf(output, "queuefamily"); break; 260 case scope_device: fprintf(output, "device"); break; 261 } 262} 263 264static void 265print_sync(memory_sync_info sync, FILE* output) 266{ 267 print_storage(sync.storage, output); 268 print_semantics(sync.semantics, output); 269 print_scope(sync.scope, output); 270} 271 272static void 273print_instr_format_specific(const Instruction* instr, FILE* output) 274{ 275 switch (instr->format) { 276 case Format::SOPK: { 277 const SOPK_instruction& sopk = instr->sopk(); 278 fprintf(output, " imm:%d", sopk.imm & 0x8000 ? (sopk.imm - 65536) : sopk.imm); 279 break; 280 } 281 case Format::SOPP: { 282 uint16_t imm = instr->sopp().imm; 283 switch (instr->opcode) { 284 case aco_opcode::s_waitcnt: { 285 /* we usually should check the chip class for vmcnt/lgkm, but 286 * insert_waitcnt() should fill it in regardless. */ 287 unsigned vmcnt = (imm & 0xF) | ((imm & (0x3 << 14)) >> 10); 288 if (vmcnt != 63) 289 fprintf(output, " vmcnt(%d)", vmcnt); 290 if (((imm >> 4) & 0x7) < 0x7) 291 fprintf(output, " expcnt(%d)", (imm >> 4) & 0x7); 292 if (((imm >> 8) & 0x3F) < 0x3F) 293 fprintf(output, " lgkmcnt(%d)", (imm >> 8) & 0x3F); 294 break; 295 } 296 case aco_opcode::s_endpgm: 297 case aco_opcode::s_endpgm_saved: 298 case aco_opcode::s_endpgm_ordered_ps_done: 299 case aco_opcode::s_wakeup: 300 case aco_opcode::s_barrier: 301 case aco_opcode::s_icache_inv: 302 case aco_opcode::s_ttracedata: 303 case aco_opcode::s_set_gpr_idx_off: { 304 break; 305 } 306 case aco_opcode::s_sendmsg: { 307 unsigned id = imm & sendmsg_id_mask; 308 switch (id) { 309 case sendmsg_none: fprintf(output, " sendmsg(MSG_NONE)"); break; 310 case _sendmsg_gs: 311 fprintf(output, " sendmsg(gs%s%s, %u)", imm & 0x10 ? ", cut" : "", 312 imm & 0x20 ? ", emit" : "", imm >> 8); 313 break; 314 case _sendmsg_gs_done: 315 fprintf(output, " sendmsg(gs_done%s%s, %u)", imm & 0x10 ? ", cut" : "", 316 imm & 0x20 ? ", emit" : "", imm >> 8); 317 break; 318 case sendmsg_save_wave: fprintf(output, " sendmsg(save_wave)"); break; 319 case sendmsg_stall_wave_gen: fprintf(output, " sendmsg(stall_wave_gen)"); break; 320 case sendmsg_halt_waves: fprintf(output, " sendmsg(halt_waves)"); break; 321 case sendmsg_ordered_ps_done: fprintf(output, " sendmsg(ordered_ps_done)"); break; 322 case sendmsg_early_prim_dealloc: fprintf(output, " sendmsg(early_prim_dealloc)"); break; 323 case sendmsg_gs_alloc_req: fprintf(output, " sendmsg(gs_alloc_req)"); break; 324 } 325 break; 326 } 327 default: { 328 if (imm) 329 fprintf(output, " imm:%u", imm); 330 break; 331 } 332 } 333 if (instr->sopp().block != -1) 334 fprintf(output, " block:BB%d", instr->sopp().block); 335 break; 336 } 337 case Format::SMEM: { 338 const SMEM_instruction& smem = instr->smem(); 339 if (smem.glc) 340 fprintf(output, " glc"); 341 if (smem.dlc) 342 fprintf(output, " dlc"); 343 if (smem.nv) 344 fprintf(output, " nv"); 345 print_sync(smem.sync, output); 346 break; 347 } 348 case Format::VINTRP: { 349 const Interp_instruction& vintrp = instr->vintrp(); 350 fprintf(output, " attr%d.%c", vintrp.attribute, "xyzw"[vintrp.component]); 351 break; 352 } 353 case Format::DS: { 354 const DS_instruction& ds = instr->ds(); 355 if (ds.offset0) 356 fprintf(output, " offset0:%u", ds.offset0); 357 if (ds.offset1) 358 fprintf(output, " offset1:%u", ds.offset1); 359 if (ds.gds) 360 fprintf(output, " gds"); 361 print_sync(ds.sync, output); 362 break; 363 } 364 case Format::MUBUF: { 365 const MUBUF_instruction& mubuf = instr->mubuf(); 366 if (mubuf.offset) 367 fprintf(output, " offset:%u", mubuf.offset); 368 if (mubuf.offen) 369 fprintf(output, " offen"); 370 if (mubuf.idxen) 371 fprintf(output, " idxen"); 372 if (mubuf.addr64) 373 fprintf(output, " addr64"); 374 if (mubuf.glc) 375 fprintf(output, " glc"); 376 if (mubuf.dlc) 377 fprintf(output, " dlc"); 378 if (mubuf.slc) 379 fprintf(output, " slc"); 380 if (mubuf.tfe) 381 fprintf(output, " tfe"); 382 if (mubuf.lds) 383 fprintf(output, " lds"); 384 if (mubuf.disable_wqm) 385 fprintf(output, " disable_wqm"); 386 print_sync(mubuf.sync, output); 387 break; 388 } 389 case Format::MIMG: { 390 const MIMG_instruction& mimg = instr->mimg(); 391 unsigned identity_dmask = 392 !instr->definitions.empty() ? (1 << instr->definitions[0].size()) - 1 : 0xf; 393 if ((mimg.dmask & identity_dmask) != identity_dmask) 394 fprintf(output, " dmask:%s%s%s%s", mimg.dmask & 0x1 ? "x" : "", 395 mimg.dmask & 0x2 ? "y" : "", mimg.dmask & 0x4 ? "z" : "", 396 mimg.dmask & 0x8 ? "w" : ""); 397 switch (mimg.dim) { 398 case ac_image_1d: fprintf(output, " 1d"); break; 399 case ac_image_2d: fprintf(output, " 2d"); break; 400 case ac_image_3d: fprintf(output, " 3d"); break; 401 case ac_image_cube: fprintf(output, " cube"); break; 402 case ac_image_1darray: fprintf(output, " 1darray"); break; 403 case ac_image_2darray: fprintf(output, " 2darray"); break; 404 case ac_image_2dmsaa: fprintf(output, " 2dmsaa"); break; 405 case ac_image_2darraymsaa: fprintf(output, " 2darraymsaa"); break; 406 } 407 if (mimg.unrm) 408 fprintf(output, " unrm"); 409 if (mimg.glc) 410 fprintf(output, " glc"); 411 if (mimg.dlc) 412 fprintf(output, " dlc"); 413 if (mimg.slc) 414 fprintf(output, " slc"); 415 if (mimg.tfe) 416 fprintf(output, " tfe"); 417 if (mimg.da) 418 fprintf(output, " da"); 419 if (mimg.lwe) 420 fprintf(output, " lwe"); 421 if (mimg.r128 || mimg.a16) 422 fprintf(output, " r128/a16"); 423 if (mimg.d16) 424 fprintf(output, " d16"); 425 if (mimg.disable_wqm) 426 fprintf(output, " disable_wqm"); 427 print_sync(mimg.sync, output); 428 break; 429 } 430 case Format::EXP: { 431 const Export_instruction& exp = instr->exp(); 432 unsigned identity_mask = exp.compressed ? 0x5 : 0xf; 433 if ((exp.enabled_mask & identity_mask) != identity_mask) 434 fprintf(output, " en:%c%c%c%c", exp.enabled_mask & 0x1 ? 'r' : '*', 435 exp.enabled_mask & 0x2 ? 'g' : '*', exp.enabled_mask & 0x4 ? 'b' : '*', 436 exp.enabled_mask & 0x8 ? 'a' : '*'); 437 if (exp.compressed) 438 fprintf(output, " compr"); 439 if (exp.done) 440 fprintf(output, " done"); 441 if (exp.valid_mask) 442 fprintf(output, " vm"); 443 444 if (exp.dest <= V_008DFC_SQ_EXP_MRT + 7) 445 fprintf(output, " mrt%d", exp.dest - V_008DFC_SQ_EXP_MRT); 446 else if (exp.dest == V_008DFC_SQ_EXP_MRTZ) 447 fprintf(output, " mrtz"); 448 else if (exp.dest == V_008DFC_SQ_EXP_NULL) 449 fprintf(output, " null"); 450 else if (exp.dest >= V_008DFC_SQ_EXP_POS && exp.dest <= V_008DFC_SQ_EXP_POS + 3) 451 fprintf(output, " pos%d", exp.dest - V_008DFC_SQ_EXP_POS); 452 else if (exp.dest >= V_008DFC_SQ_EXP_PARAM && exp.dest <= V_008DFC_SQ_EXP_PARAM + 31) 453 fprintf(output, " param%d", exp.dest - V_008DFC_SQ_EXP_PARAM); 454 break; 455 } 456 case Format::PSEUDO_BRANCH: { 457 const Pseudo_branch_instruction& branch = instr->branch(); 458 /* Note: BB0 cannot be a branch target */ 459 if (branch.target[0] != 0) 460 fprintf(output, " BB%d", branch.target[0]); 461 if (branch.target[1] != 0) 462 fprintf(output, ", BB%d", branch.target[1]); 463 break; 464 } 465 case Format::PSEUDO_REDUCTION: { 466 const Pseudo_reduction_instruction& reduce = instr->reduction(); 467 fprintf(output, " op:%s", reduce_ops[reduce.reduce_op]); 468 if (reduce.cluster_size) 469 fprintf(output, " cluster_size:%u", reduce.cluster_size); 470 break; 471 } 472 case Format::PSEUDO_BARRIER: { 473 const Pseudo_barrier_instruction& barrier = instr->barrier(); 474 print_sync(barrier.sync, output); 475 print_scope(barrier.exec_scope, output, "exec_scope"); 476 break; 477 } 478 case Format::FLAT: 479 case Format::GLOBAL: 480 case Format::SCRATCH: { 481 const FLAT_instruction& flat = instr->flatlike(); 482 if (flat.offset) 483 fprintf(output, " offset:%u", flat.offset); 484 if (flat.glc) 485 fprintf(output, " glc"); 486 if (flat.dlc) 487 fprintf(output, " dlc"); 488 if (flat.slc) 489 fprintf(output, " slc"); 490 if (flat.lds) 491 fprintf(output, " lds"); 492 if (flat.nv) 493 fprintf(output, " nv"); 494 if (flat.disable_wqm) 495 fprintf(output, " disable_wqm"); 496 print_sync(flat.sync, output); 497 break; 498 } 499 case Format::MTBUF: { 500 const MTBUF_instruction& mtbuf = instr->mtbuf(); 501 fprintf(output, " dfmt:"); 502 switch (mtbuf.dfmt) { 503 case V_008F0C_BUF_DATA_FORMAT_8: fprintf(output, "8"); break; 504 case V_008F0C_BUF_DATA_FORMAT_16: fprintf(output, "16"); break; 505 case V_008F0C_BUF_DATA_FORMAT_8_8: fprintf(output, "8_8"); break; 506 case V_008F0C_BUF_DATA_FORMAT_32: fprintf(output, "32"); break; 507 case V_008F0C_BUF_DATA_FORMAT_16_16: fprintf(output, "16_16"); break; 508 case V_008F0C_BUF_DATA_FORMAT_10_11_11: fprintf(output, "10_11_11"); break; 509 case V_008F0C_BUF_DATA_FORMAT_11_11_10: fprintf(output, "11_11_10"); break; 510 case V_008F0C_BUF_DATA_FORMAT_10_10_10_2: fprintf(output, "10_10_10_2"); break; 511 case V_008F0C_BUF_DATA_FORMAT_2_10_10_10: fprintf(output, "2_10_10_10"); break; 512 case V_008F0C_BUF_DATA_FORMAT_8_8_8_8: fprintf(output, "8_8_8_8"); break; 513 case V_008F0C_BUF_DATA_FORMAT_32_32: fprintf(output, "32_32"); break; 514 case V_008F0C_BUF_DATA_FORMAT_16_16_16_16: fprintf(output, "16_16_16_16"); break; 515 case V_008F0C_BUF_DATA_FORMAT_32_32_32: fprintf(output, "32_32_32"); break; 516 case V_008F0C_BUF_DATA_FORMAT_32_32_32_32: fprintf(output, "32_32_32_32"); break; 517 case V_008F0C_BUF_DATA_FORMAT_RESERVED_15: fprintf(output, "reserved15"); break; 518 } 519 fprintf(output, " nfmt:"); 520 switch (mtbuf.nfmt) { 521 case V_008F0C_BUF_NUM_FORMAT_UNORM: fprintf(output, "unorm"); break; 522 case V_008F0C_BUF_NUM_FORMAT_SNORM: fprintf(output, "snorm"); break; 523 case V_008F0C_BUF_NUM_FORMAT_USCALED: fprintf(output, "uscaled"); break; 524 case V_008F0C_BUF_NUM_FORMAT_SSCALED: fprintf(output, "sscaled"); break; 525 case V_008F0C_BUF_NUM_FORMAT_UINT: fprintf(output, "uint"); break; 526 case V_008F0C_BUF_NUM_FORMAT_SINT: fprintf(output, "sint"); break; 527 case V_008F0C_BUF_NUM_FORMAT_SNORM_OGL: fprintf(output, "snorm"); break; 528 case V_008F0C_BUF_NUM_FORMAT_FLOAT: fprintf(output, "float"); break; 529 } 530 if (mtbuf.offset) 531 fprintf(output, " offset:%u", mtbuf.offset); 532 if (mtbuf.offen) 533 fprintf(output, " offen"); 534 if (mtbuf.idxen) 535 fprintf(output, " idxen"); 536 if (mtbuf.glc) 537 fprintf(output, " glc"); 538 if (mtbuf.dlc) 539 fprintf(output, " dlc"); 540 if (mtbuf.slc) 541 fprintf(output, " slc"); 542 if (mtbuf.tfe) 543 fprintf(output, " tfe"); 544 if (mtbuf.disable_wqm) 545 fprintf(output, " disable_wqm"); 546 print_sync(mtbuf.sync, output); 547 break; 548 } 549 case Format::VOP3P: { 550 if (instr->vop3p().clamp) 551 fprintf(output, " clamp"); 552 break; 553 } 554 default: { 555 break; 556 } 557 } 558 if (instr->isVOP3()) { 559 const VOP3_instruction& vop3 = instr->vop3(); 560 switch (vop3.omod) { 561 case 1: fprintf(output, " *2"); break; 562 case 2: fprintf(output, " *4"); break; 563 case 3: fprintf(output, " *0.5"); break; 564 } 565 if (vop3.clamp) 566 fprintf(output, " clamp"); 567 if (vop3.opsel & (1 << 3)) 568 fprintf(output, " opsel_hi"); 569 } else if (instr->isDPP()) { 570 const DPP_instruction& dpp = instr->dpp(); 571 if (dpp.dpp_ctrl <= 0xff) { 572 fprintf(output, " quad_perm:[%d,%d,%d,%d]", dpp.dpp_ctrl & 0x3, (dpp.dpp_ctrl >> 2) & 0x3, 573 (dpp.dpp_ctrl >> 4) & 0x3, (dpp.dpp_ctrl >> 6) & 0x3); 574 } else if (dpp.dpp_ctrl >= 0x101 && dpp.dpp_ctrl <= 0x10f) { 575 fprintf(output, " row_shl:%d", dpp.dpp_ctrl & 0xf); 576 } else if (dpp.dpp_ctrl >= 0x111 && dpp.dpp_ctrl <= 0x11f) { 577 fprintf(output, " row_shr:%d", dpp.dpp_ctrl & 0xf); 578 } else if (dpp.dpp_ctrl >= 0x121 && dpp.dpp_ctrl <= 0x12f) { 579 fprintf(output, " row_ror:%d", dpp.dpp_ctrl & 0xf); 580 } else if (dpp.dpp_ctrl == dpp_wf_sl1) { 581 fprintf(output, " wave_shl:1"); 582 } else if (dpp.dpp_ctrl == dpp_wf_rl1) { 583 fprintf(output, " wave_rol:1"); 584 } else if (dpp.dpp_ctrl == dpp_wf_sr1) { 585 fprintf(output, " wave_shr:1"); 586 } else if (dpp.dpp_ctrl == dpp_wf_rr1) { 587 fprintf(output, " wave_ror:1"); 588 } else if (dpp.dpp_ctrl == dpp_row_mirror) { 589 fprintf(output, " row_mirror"); 590 } else if (dpp.dpp_ctrl == dpp_row_half_mirror) { 591 fprintf(output, " row_half_mirror"); 592 } else if (dpp.dpp_ctrl == dpp_row_bcast15) { 593 fprintf(output, " row_bcast:15"); 594 } else if (dpp.dpp_ctrl == dpp_row_bcast31) { 595 fprintf(output, " row_bcast:31"); 596 } else { 597 fprintf(output, " dpp_ctrl:0x%.3x", dpp.dpp_ctrl); 598 } 599 if (dpp.row_mask != 0xf) 600 fprintf(output, " row_mask:0x%.1x", dpp.row_mask); 601 if (dpp.bank_mask != 0xf) 602 fprintf(output, " bank_mask:0x%.1x", dpp.bank_mask); 603 if (dpp.bound_ctrl) 604 fprintf(output, " bound_ctrl:1"); 605 } else if (instr->isSDWA()) { 606 const SDWA_instruction& sdwa = instr->sdwa(); 607 switch (sdwa.omod) { 608 case 1: fprintf(output, " *2"); break; 609 case 2: fprintf(output, " *4"); break; 610 case 3: fprintf(output, " *0.5"); break; 611 } 612 if (sdwa.clamp) 613 fprintf(output, " clamp"); 614 if (!instr->isVOPC()) { 615 char sext = sdwa.dst_sel.sign_extend() ? 's' : 'u'; 616 unsigned offset = sdwa.dst_sel.offset(); 617 if (instr->definitions[0].isFixed()) 618 offset += instr->definitions[0].physReg().byte(); 619 switch (sdwa.dst_sel.size()) { 620 case 1: fprintf(output, " dst_sel:%cbyte%u", sext, offset); break; 621 case 2: fprintf(output, " dst_sel:%cword%u", sext, offset >> 1); break; 622 case 4: fprintf(output, " dst_sel:dword"); break; 623 default: break; 624 } 625 if (instr->definitions[0].bytes() < 4) 626 fprintf(output, " dst_preserve"); 627 } 628 for (unsigned i = 0; i < std::min<unsigned>(2, instr->operands.size()); i++) { 629 char sext = sdwa.sel[i].sign_extend() ? 's' : 'u'; 630 unsigned offset = sdwa.sel[i].offset(); 631 if (instr->operands[i].isFixed()) 632 offset += instr->operands[i].physReg().byte(); 633 switch (sdwa.sel[i].size()) { 634 case 1: fprintf(output, " src%d_sel:%cbyte%u", i, sext, offset); break; 635 case 2: fprintf(output, " src%d_sel:%cword%u", i, sext, offset >> 1); break; 636 case 4: fprintf(output, " src%d_sel:dword", i); break; 637 default: break; 638 } 639 } 640 } 641} 642 643void 644aco_print_instr(const Instruction* instr, FILE* output, unsigned flags) 645{ 646 if (!instr->definitions.empty()) { 647 for (unsigned i = 0; i < instr->definitions.size(); ++i) { 648 print_definition(&instr->definitions[i], output, flags); 649 if (i + 1 != instr->definitions.size()) 650 fprintf(output, ", "); 651 } 652 fprintf(output, " = "); 653 } 654 fprintf(output, "%s", instr_info.name[(int)instr->opcode]); 655 if (instr->operands.size()) { 656 bool* const abs = (bool*)alloca(instr->operands.size() * sizeof(bool)); 657 bool* const neg = (bool*)alloca(instr->operands.size() * sizeof(bool)); 658 bool* const opsel = (bool*)alloca(instr->operands.size() * sizeof(bool)); 659 for (unsigned i = 0; i < instr->operands.size(); ++i) { 660 abs[i] = false; 661 neg[i] = false; 662 opsel[i] = false; 663 } 664 if (instr->isVOP3()) { 665 const VOP3_instruction& vop3 = instr->vop3(); 666 for (unsigned i = 0; i < 3; ++i) { 667 abs[i] = vop3.abs[i]; 668 neg[i] = vop3.neg[i]; 669 opsel[i] = vop3.opsel & (1 << i); 670 } 671 } else if (instr->isDPP()) { 672 const DPP_instruction& dpp = instr->dpp(); 673 for (unsigned i = 0; i < 2; ++i) { 674 abs[i] = dpp.abs[i]; 675 neg[i] = dpp.neg[i]; 676 opsel[i] = false; 677 } 678 } else if (instr->isSDWA()) { 679 const SDWA_instruction& sdwa = instr->sdwa(); 680 for (unsigned i = 0; i < 2; ++i) { 681 abs[i] = sdwa.abs[i]; 682 neg[i] = sdwa.neg[i]; 683 opsel[i] = false; 684 } 685 } 686 for (unsigned i = 0; i < instr->operands.size(); ++i) { 687 if (i) 688 fprintf(output, ", "); 689 else 690 fprintf(output, " "); 691 692 if (neg[i]) 693 fprintf(output, "-"); 694 if (abs[i]) 695 fprintf(output, "|"); 696 if (opsel[i]) 697 fprintf(output, "hi("); 698 aco_print_operand(&instr->operands[i], output, flags); 699 if (opsel[i]) 700 fprintf(output, ")"); 701 if (abs[i]) 702 fprintf(output, "|"); 703 704 if (instr->isVOP3P()) { 705 const VOP3P_instruction& vop3 = instr->vop3p(); 706 if ((vop3.opsel_lo & (1 << i)) || !(vop3.opsel_hi & (1 << i))) { 707 fprintf(output, ".%c%c", vop3.opsel_lo & (1 << i) ? 'y' : 'x', 708 vop3.opsel_hi & (1 << i) ? 'y' : 'x'); 709 } 710 if (vop3.neg_lo[i] && vop3.neg_hi[i]) 711 fprintf(output, "*[-1,-1]"); 712 else if (vop3.neg_lo[i]) 713 fprintf(output, "*[-1,1]"); 714 else if (vop3.neg_hi[i]) 715 fprintf(output, "*[1,-1]"); 716 } 717 } 718 } 719 print_instr_format_specific(instr, output); 720} 721 722static void 723print_block_kind(uint16_t kind, FILE* output) 724{ 725 if (kind & block_kind_uniform) 726 fprintf(output, "uniform, "); 727 if (kind & block_kind_top_level) 728 fprintf(output, "top-level, "); 729 if (kind & block_kind_loop_preheader) 730 fprintf(output, "loop-preheader, "); 731 if (kind & block_kind_loop_header) 732 fprintf(output, "loop-header, "); 733 if (kind & block_kind_loop_exit) 734 fprintf(output, "loop-exit, "); 735 if (kind & block_kind_continue) 736 fprintf(output, "continue, "); 737 if (kind & block_kind_break) 738 fprintf(output, "break, "); 739 if (kind & block_kind_continue_or_break) 740 fprintf(output, "continue_or_break, "); 741 if (kind & block_kind_discard) 742 fprintf(output, "discard, "); 743 if (kind & block_kind_branch) 744 fprintf(output, "branch, "); 745 if (kind & block_kind_merge) 746 fprintf(output, "merge, "); 747 if (kind & block_kind_invert) 748 fprintf(output, "invert, "); 749 if (kind & block_kind_uses_discard_if) 750 fprintf(output, "discard_if, "); 751 if (kind & block_kind_needs_lowering) 752 fprintf(output, "needs_lowering, "); 753 if (kind & block_kind_uses_demote) 754 fprintf(output, "uses_demote, "); 755 if (kind & block_kind_export_end) 756 fprintf(output, "export_end, "); 757} 758 759static void 760print_stage(Stage stage, FILE* output) 761{ 762 fprintf(output, "ACO shader stage: "); 763 764 if (stage == compute_cs) 765 fprintf(output, "compute_cs"); 766 else if (stage == fragment_fs) 767 fprintf(output, "fragment_fs"); 768 else if (stage == gs_copy_vs) 769 fprintf(output, "gs_copy_vs"); 770 else if (stage == vertex_ls) 771 fprintf(output, "vertex_ls"); 772 else if (stage == vertex_es) 773 fprintf(output, "vertex_es"); 774 else if (stage == vertex_vs) 775 fprintf(output, "vertex_vs"); 776 else if (stage == tess_control_hs) 777 fprintf(output, "tess_control_hs"); 778 else if (stage == vertex_tess_control_hs) 779 fprintf(output, "vertex_tess_control_hs"); 780 else if (stage == tess_eval_es) 781 fprintf(output, "tess_eval_es"); 782 else if (stage == tess_eval_vs) 783 fprintf(output, "tess_eval_vs"); 784 else if (stage == geometry_gs) 785 fprintf(output, "geometry_gs"); 786 else if (stage == vertex_geometry_gs) 787 fprintf(output, "vertex_geometry_gs"); 788 else if (stage == tess_eval_geometry_gs) 789 fprintf(output, "tess_eval_geometry_gs"); 790 else if (stage == vertex_ngg) 791 fprintf(output, "vertex_ngg"); 792 else if (stage == tess_eval_ngg) 793 fprintf(output, "tess_eval_ngg"); 794 else if (stage == vertex_geometry_ngg) 795 fprintf(output, "vertex_geometry_ngg"); 796 else if (stage == tess_eval_geometry_ngg) 797 fprintf(output, "tess_eval_geometry_ngg"); 798 else 799 fprintf(output, "unknown"); 800 801 fprintf(output, "\n"); 802} 803 804void 805aco_print_block(const Block* block, FILE* output, unsigned flags, const live& live_vars) 806{ 807 fprintf(output, "BB%d\n", block->index); 808 fprintf(output, "/* logical preds: "); 809 for (unsigned pred : block->logical_preds) 810 fprintf(output, "BB%d, ", pred); 811 fprintf(output, "/ linear preds: "); 812 for (unsigned pred : block->linear_preds) 813 fprintf(output, "BB%d, ", pred); 814 fprintf(output, "/ kind: "); 815 print_block_kind(block->kind, output); 816 fprintf(output, "*/\n"); 817 818 if (flags & print_live_vars) { 819 fprintf(output, "\tlive out:"); 820 for (unsigned id : live_vars.live_out[block->index]) 821 fprintf(output, " %%%d", id); 822 fprintf(output, "\n"); 823 824 RegisterDemand demand = block->register_demand; 825 fprintf(output, "\tdemand: %u vgpr, %u sgpr\n", demand.vgpr, demand.sgpr); 826 } 827 828 unsigned index = 0; 829 for (auto const& instr : block->instructions) { 830 fprintf(output, "\t"); 831 if (flags & print_live_vars) { 832 RegisterDemand demand = live_vars.register_demand[block->index][index]; 833 fprintf(output, "(%3u vgpr, %3u sgpr) ", demand.vgpr, demand.sgpr); 834 } 835 if (flags & print_perf_info) 836 fprintf(output, "(%3u clk) ", instr->pass_flags); 837 838 aco_print_instr(instr.get(), output, flags); 839 fprintf(output, "\n"); 840 index++; 841 } 842} 843 844void 845aco_print_program(const Program* program, FILE* output, const live& live_vars, unsigned flags) 846{ 847 switch (program->progress) { 848 case CompilationProgress::after_isel: fprintf(output, "After Instruction Selection:\n"); break; 849 case CompilationProgress::after_spilling: 850 fprintf(output, "After Spilling:\n"); 851 flags |= print_kill; 852 break; 853 case CompilationProgress::after_ra: fprintf(output, "After RA:\n"); break; 854 } 855 856 print_stage(program->stage, output); 857 858 for (Block const& block : program->blocks) 859 aco_print_block(&block, output, flags, live_vars); 860 861 if (program->constant_data.size()) { 862 fprintf(output, "\n/* constant data */\n"); 863 for (unsigned i = 0; i < program->constant_data.size(); i += 32) { 864 fprintf(output, "[%06d] ", i); 865 unsigned line_size = std::min<size_t>(program->constant_data.size() - i, 32); 866 for (unsigned j = 0; j < line_size; j += 4) { 867 unsigned size = std::min<size_t>(program->constant_data.size() - (i + j), 4); 868 uint32_t v = 0; 869 memcpy(&v, &program->constant_data[i + j], size); 870 fprintf(output, " %08x", v); 871 } 872 fprintf(output, "\n"); 873 } 874 } 875 876 fprintf(output, "\n"); 877} 878 879void 880aco_print_program(const Program* program, FILE* output, unsigned flags) 881{ 882 aco_print_program(program, output, live(), flags); 883} 884 885} // namespace aco 886