1/* 2 * Copyright © 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#include "nir.h" 25#include "nir_builder.h" 26 27static nir_ssa_def * 28load_frag_coord(const nir_input_attachment_options *options, nir_builder *b) 29{ 30 if (options->use_fragcoord_sysval) 31 return nir_load_frag_coord(b); 32 33 nir_variable *pos = 34 nir_find_variable_with_location(b->shader, nir_var_shader_in, 35 VARYING_SLOT_POS); 36 if (pos == NULL) { 37 pos = nir_variable_create(b->shader, nir_var_shader_in, 38 glsl_vec4_type(), NULL); 39 pos->data.location = VARYING_SLOT_POS; 40 } 41 /** 42 * From Vulkan spec: 43 * "The OriginLowerLeft execution mode must not be used; fragment entry 44 * points must declare OriginUpperLeft." 45 * 46 * So at this point origin_upper_left should be true 47 */ 48 assert(b->shader->info.fs.origin_upper_left == true); 49 50 return nir_load_var(b, pos); 51} 52 53static nir_ssa_def * 54load_layer_id(const nir_input_attachment_options *options, nir_builder *b) 55{ 56 if (options->use_layer_id_sysval) { 57 if (options->use_view_id_for_layer) 58 return nir_load_view_index(b); 59 else 60 return nir_load_layer_id(b); 61 } 62 63 gl_varying_slot slot = options->use_view_id_for_layer ? 64 VARYING_SLOT_VIEW_INDEX : VARYING_SLOT_LAYER; 65 nir_variable *layer_id = 66 nir_find_variable_with_location(b->shader, nir_var_shader_in, slot); 67 68 if (layer_id == NULL) { 69 layer_id = nir_variable_create(b->shader, nir_var_shader_in, 70 glsl_int_type(), NULL); 71 layer_id->data.location = slot; 72 layer_id->data.interpolation = INTERP_MODE_FLAT; 73 layer_id->data.driver_location = b->shader->num_inputs++; 74 } 75 76 return nir_load_var(b, layer_id); 77} 78 79static bool 80try_lower_input_load(nir_function_impl *impl, nir_intrinsic_instr *load, 81 const nir_input_attachment_options *options) 82{ 83 nir_deref_instr *deref = nir_src_as_deref(load->src[0]); 84 assert(glsl_type_is_image(deref->type)); 85 86 enum glsl_sampler_dim image_dim = glsl_get_sampler_dim(deref->type); 87 if (image_dim != GLSL_SAMPLER_DIM_SUBPASS && 88 image_dim != GLSL_SAMPLER_DIM_SUBPASS_MS) 89 return false; 90 91 const bool multisampled = (image_dim == GLSL_SAMPLER_DIM_SUBPASS_MS); 92 93 nir_builder b; 94 nir_builder_init(&b, impl); 95 b.cursor = nir_instr_remove(&load->instr); 96 97 nir_ssa_def *frag_coord = load_frag_coord(options, &b); 98 frag_coord = nir_f2i32(&b, frag_coord); 99 nir_ssa_def *offset = nir_ssa_for_src(&b, load->src[1], 2); 100 nir_ssa_def *pos = nir_iadd(&b, frag_coord, offset); 101 102 nir_ssa_def *layer = load_layer_id(options, &b); 103 nir_ssa_def *coord = 104 nir_vec3(&b, nir_channel(&b, pos, 0), nir_channel(&b, pos, 1), layer); 105 106 nir_tex_instr *tex = nir_tex_instr_create(b.shader, 3 + multisampled); 107 108 tex->op = nir_texop_txf; 109 tex->sampler_dim = image_dim; 110 111 tex->dest_type = 112 nir_get_nir_type_for_glsl_base_type(glsl_get_sampler_result_type(deref->type)); 113 tex->is_array = true; 114 tex->is_shadow = false; 115 tex->is_sparse = load->intrinsic == nir_intrinsic_image_deref_sparse_load; 116 117 tex->texture_index = 0; 118 tex->sampler_index = 0; 119 120 tex->src[0].src_type = nir_tex_src_texture_deref; 121 tex->src[0].src = nir_src_for_ssa(&deref->dest.ssa); 122 123 tex->src[1].src_type = nir_tex_src_coord; 124 tex->src[1].src = nir_src_for_ssa(coord); 125 tex->coord_components = 3; 126 127 tex->src[2].src_type = nir_tex_src_lod; 128 tex->src[2].src = nir_src_for_ssa(nir_imm_int(&b, 0)); 129 130 if (image_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) { 131 tex->op = nir_texop_txf_ms; 132 tex->src[3].src_type = nir_tex_src_ms_index; 133 tex->src[3].src = load->src[2]; 134 } 135 136 tex->texture_non_uniform = nir_intrinsic_access(load) & ACCESS_NON_UNIFORM; 137 138 nir_ssa_dest_init(&tex->instr, &tex->dest, nir_tex_instr_dest_size(tex), 32, NULL); 139 nir_builder_instr_insert(&b, &tex->instr); 140 141 if (tex->is_sparse) { 142 unsigned load_result_size = load->dest.ssa.num_components - 1; 143 unsigned load_result_mask = BITFIELD_MASK(load_result_size); 144 nir_ssa_def *res = nir_channels( 145 &b, &tex->dest.ssa, load_result_mask | 0x10); 146 147 nir_ssa_def_rewrite_uses(&load->dest.ssa, res); 148 } else { 149 nir_ssa_def_rewrite_uses(&load->dest.ssa, 150 &tex->dest.ssa); 151 } 152 153 return true; 154} 155 156static bool 157try_lower_input_texop(nir_function_impl *impl, nir_tex_instr *tex, 158 const nir_input_attachment_options *options) 159{ 160 nir_deref_instr *deref = nir_src_as_deref(tex->src[0].src); 161 162 if (glsl_get_sampler_dim(deref->type) != GLSL_SAMPLER_DIM_SUBPASS_MS) 163 return false; 164 165 nir_builder b; 166 nir_builder_init(&b, impl); 167 b.cursor = nir_before_instr(&tex->instr); 168 169 nir_ssa_def *frag_coord = load_frag_coord(options, &b); 170 frag_coord = nir_f2i32(&b, frag_coord); 171 172 nir_ssa_def *layer = load_layer_id(options, &b); 173 nir_ssa_def *coord = nir_vec3(&b, nir_channel(&b, frag_coord, 0), 174 nir_channel(&b, frag_coord, 1), layer); 175 176 tex->coord_components = 3; 177 178 nir_instr_rewrite_src(&tex->instr, &tex->src[1].src, nir_src_for_ssa(coord)); 179 180 return true; 181} 182 183bool 184nir_lower_input_attachments(nir_shader *shader, 185 const nir_input_attachment_options *options) 186{ 187 assert(shader->info.stage == MESA_SHADER_FRAGMENT); 188 bool progress = false; 189 190 nir_foreach_function(function, shader) { 191 if (!function->impl) 192 continue; 193 194 nir_foreach_block(block, function->impl) { 195 nir_foreach_instr_safe(instr, block) { 196 switch (instr->type) { 197 case nir_instr_type_tex: { 198 nir_tex_instr *tex = nir_instr_as_tex(instr); 199 200 if (tex->op == nir_texop_fragment_mask_fetch_amd || 201 tex->op == nir_texop_fragment_fetch_amd) { 202 progress |= try_lower_input_texop(function->impl, tex, 203 options); 204 } 205 break; 206 } 207 case nir_instr_type_intrinsic: { 208 nir_intrinsic_instr *load = nir_instr_as_intrinsic(instr); 209 210 if (load->intrinsic == nir_intrinsic_image_deref_load || 211 load->intrinsic == nir_intrinsic_image_deref_sparse_load) { 212 progress |= try_lower_input_load(function->impl, load, 213 options); 214 } 215 break; 216 } 217 default: 218 break; 219 } 220 } 221 } 222 } 223 224 return progress; 225} 226