1/*
2 * Copyright (C) 2012-2018 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 *    Rob Clark <robclark@freedesktop.org>
25 */
26
27#ifndef MSM_PRIV_H_
28#define MSM_PRIV_H_
29
30#include "freedreno_priv.h"
31
32#include "util/slab.h"
33#include "util/timespec.h"
34
35#include "pipe/p_defines.h"
36
37#ifndef __user
38#define __user
39#endif
40
41#include "drm-uapi/msm_drm.h"
42
43struct msm_device {
44   struct fd_device base;
45   struct util_queue submit_queue;
46};
47FD_DEFINE_CAST(fd_device, msm_device);
48
49struct fd_device *msm_device_new(int fd, drmVersionPtr version);
50
51struct msm_pipe {
52   struct fd_pipe base;
53   uint32_t pipe;
54   uint32_t gpu_id;
55   uint64_t chip_id;
56   uint64_t gmem_base;
57   uint32_t gmem;
58   uint32_t queue_id;
59   struct slab_parent_pool ring_pool;
60
61   /* BO for suballocating long-lived objects on the pipe. */
62   struct fd_bo *suballoc_bo;
63   uint32_t suballoc_offset;
64
65   /**
66    * The last fence seqno that was flushed to kernel (doesn't mean that it
67    * is complete, just that the kernel knows about it)
68    */
69   uint32_t last_submit_fence;
70
71   uint32_t last_enqueue_fence;   /* just for debugging */
72
73   /**
74    * If we *ever* see an in-fence-fd, assume that userspace is
75    * not relying on implicit fences.
76    */
77   bool no_implicit_sync;
78};
79FD_DEFINE_CAST(fd_pipe, msm_pipe);
80
81struct fd_pipe *msm_pipe_new(struct fd_device *dev, enum fd_pipe_id id,
82                             uint32_t prio);
83
84struct fd_ringbuffer *msm_ringbuffer_new_object(struct fd_pipe *pipe,
85                                                uint32_t size);
86struct fd_ringbuffer *msm_ringbuffer_sp_new_object(struct fd_pipe *pipe,
87                                                   uint32_t size);
88
89struct fd_submit *msm_submit_new(struct fd_pipe *pipe);
90struct fd_submit *msm_submit_sp_new(struct fd_pipe *pipe);
91void msm_pipe_sp_flush(struct fd_pipe *pipe, uint32_t fence);
92
93void msm_pipe_sp_ringpool_init(struct msm_pipe *msm_pipe);
94void msm_pipe_sp_ringpool_fini(struct msm_pipe *msm_pipe);
95
96struct msm_bo {
97   struct fd_bo base;
98   uint64_t offset;
99   uint32_t idx;
100};
101FD_DEFINE_CAST(fd_bo, msm_bo);
102
103int msm_bo_new_handle(struct fd_device *dev, uint32_t size, uint32_t flags,
104                      uint32_t *handle);
105struct fd_bo *msm_bo_from_handle(struct fd_device *dev, uint32_t size,
106                                 uint32_t handle);
107
108static inline void
109msm_dump_submit(struct drm_msm_gem_submit *req)
110{
111   for (unsigned i = 0; i < req->nr_bos; i++) {
112      struct drm_msm_gem_submit_bo *bos = U642VOID(req->bos);
113      struct drm_msm_gem_submit_bo *bo = &bos[i];
114      ERROR_MSG("  bos[%d]: handle=%u, flags=%x", i, bo->handle, bo->flags);
115   }
116   for (unsigned i = 0; i < req->nr_cmds; i++) {
117      struct drm_msm_gem_submit_cmd *cmds = U642VOID(req->cmds);
118      struct drm_msm_gem_submit_cmd *cmd = &cmds[i];
119      struct drm_msm_gem_submit_reloc *relocs = U642VOID(cmd->relocs);
120      ERROR_MSG("  cmd[%d]: type=%u, submit_idx=%u, submit_offset=%u, size=%u",
121                i, cmd->type, cmd->submit_idx, cmd->submit_offset, cmd->size);
122      for (unsigned j = 0; j < cmd->nr_relocs; j++) {
123         struct drm_msm_gem_submit_reloc *r = &relocs[j];
124         ERROR_MSG(
125            "    reloc[%d]: submit_offset=%u, or=%08x, shift=%d, reloc_idx=%u"
126            ", reloc_offset=%" PRIu64,
127            j, r->submit_offset, r->or, r->shift, r->reloc_idx,
128            (uint64_t)r->reloc_offset);
129      }
130   }
131}
132
133static inline void
134get_abs_timeout(struct drm_msm_timespec *tv, uint64_t ns)
135{
136   struct timespec t;
137
138   if (ns == PIPE_TIMEOUT_INFINITE)
139      ns = 3600ULL * NSEC_PER_SEC; /* 1 hour timeout is almost infinite */
140
141   clock_gettime(CLOCK_MONOTONIC, &t);
142   tv->tv_sec = t.tv_sec + ns / NSEC_PER_SEC;
143   tv->tv_nsec = t.tv_nsec + ns % NSEC_PER_SEC;
144   if (tv->tv_nsec >= NSEC_PER_SEC) { /* handle nsec overflow */
145      tv->tv_nsec -= NSEC_PER_SEC;
146      tv->tv_sec++;
147   }
148}
149
150#endif /* MSM_PRIV_H_ */
151