1/*
2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 *    Rob Clark <robclark@freedesktop.org>
25 */
26
27#include "freedreno_blitter.h"
28#include "freedreno_resource.h"
29
30#include "fd5_blitter.h"
31#include "fd5_emit.h"
32#include "fd5_format.h"
33
34/* Make sure none of the requested dimensions extend beyond the size of the
35 * resource.  Not entirely sure why this happens, but sometimes it does, and
36 * w/ 2d blt doesn't have wrap modes like a sampler, so force those cases
37 * back to u_blitter
38 */
39static bool
40ok_dims(const struct pipe_resource *r, const struct pipe_box *b, int lvl)
41{
42   return (b->x >= 0) && (b->x + b->width <= u_minify(r->width0, lvl)) &&
43          (b->y >= 0) && (b->y + b->height <= u_minify(r->height0, lvl)) &&
44          (b->z >= 0) && (b->z + b->depth <= u_minify(r->depth0, lvl));
45}
46
47/* Not sure if format restrictions differ for src and dst, or if
48 * they only matter when src fmt != dst fmt..  but there appear to
49 * be *some* limitations so let's just start rejecting stuff that
50 * piglit complains about
51 */
52static bool
53ok_format(enum pipe_format fmt)
54{
55   if (util_format_is_compressed(fmt))
56      return false;
57
58   switch (fmt) {
59   case PIPE_FORMAT_R10G10B10A2_SSCALED:
60   case PIPE_FORMAT_R10G10B10A2_SNORM:
61   case PIPE_FORMAT_B10G10R10A2_USCALED:
62   case PIPE_FORMAT_B10G10R10A2_SSCALED:
63   case PIPE_FORMAT_B10G10R10A2_SNORM:
64   case PIPE_FORMAT_R10G10B10A2_UNORM:
65   case PIPE_FORMAT_R10G10B10A2_USCALED:
66   case PIPE_FORMAT_B10G10R10A2_UNORM:
67   case PIPE_FORMAT_R10SG10SB10SA2U_NORM:
68   case PIPE_FORMAT_B10G10R10A2_UINT:
69   case PIPE_FORMAT_R10G10B10A2_UINT:
70      return false;
71   default:
72      break;
73   }
74
75   if (fd5_pipe2color(fmt) == RB5_NONE)
76      return false;
77
78   return true;
79}
80
81static bool
82can_do_blit(const struct pipe_blit_info *info)
83{
84   /* I think we can do scaling, but not in z dimension since that would
85    * require blending..
86    */
87   if (info->dst.box.depth != info->src.box.depth)
88      return false;
89
90   if (!ok_format(info->dst.format))
91      return false;
92
93   if (!ok_format(info->src.format))
94      return false;
95
96   /* hw ignores {SRC,DST}_INFO.COLOR_SWAP if {SRC,DST}_INFO.TILE_MODE
97    * is set (not linear).  We can kind of get around that when tiling/
98    * untiling by setting both src and dst COLOR_SWAP=WZYX, but that
99    * means the formats must match:
100    */
101   if ((fd_resource(info->dst.resource)->layout.tile_mode ||
102        fd_resource(info->src.resource)->layout.tile_mode) &&
103       info->dst.format != info->src.format)
104      return false;
105
106   /* until we figure out a few more registers: */
107   if ((info->dst.box.width != info->src.box.width) ||
108       (info->dst.box.height != info->src.box.height))
109      return false;
110
111   /* src box can be inverted, which we don't support.. dst box cannot: */
112   if ((info->src.box.width < 0) || (info->src.box.height < 0))
113      return false;
114
115   if (!ok_dims(info->src.resource, &info->src.box, info->src.level))
116      return false;
117
118   if (!ok_dims(info->dst.resource, &info->dst.box, info->dst.level))
119      return false;
120
121   debug_assert(info->dst.box.width >= 0);
122   debug_assert(info->dst.box.height >= 0);
123   debug_assert(info->dst.box.depth >= 0);
124
125   if ((info->dst.resource->nr_samples > 1) ||
126       (info->src.resource->nr_samples > 1))
127      return false;
128
129   if (info->scissor_enable)
130      return false;
131
132   if (info->window_rectangle_include)
133      return false;
134
135   if (info->render_condition_enable)
136      return false;
137
138   if (info->alpha_blend)
139      return false;
140
141   if (info->filter != PIPE_TEX_FILTER_NEAREST)
142      return false;
143
144   if (info->mask != util_format_get_mask(info->src.format))
145      return false;
146
147   if (info->mask != util_format_get_mask(info->dst.format))
148      return false;
149
150   return true;
151}
152
153static void
154emit_setup(struct fd_ringbuffer *ring)
155{
156   OUT_PKT4(ring, REG_A5XX_RB_RENDER_CNTL, 1);
157   OUT_RING(ring, 0x00000008);
158
159   OUT_PKT4(ring, REG_A5XX_UNKNOWN_2100, 1);
160   OUT_RING(ring, 0x86000000); /* UNKNOWN_2100 */
161
162   OUT_PKT4(ring, REG_A5XX_UNKNOWN_2180, 1);
163   OUT_RING(ring, 0x86000000); /* UNKNOWN_2180 */
164
165   OUT_PKT4(ring, REG_A5XX_UNKNOWN_2184, 1);
166   OUT_RING(ring, 0x00000009); /* UNKNOWN_2184 */
167
168   OUT_PKT4(ring, REG_A5XX_RB_CNTL, 1);
169   OUT_RING(ring, A5XX_RB_CNTL_BYPASS);
170
171   OUT_PKT4(ring, REG_A5XX_RB_MODE_CNTL, 1);
172   OUT_RING(ring, 0x00000004); /* RB_MODE_CNTL */
173
174   OUT_PKT4(ring, REG_A5XX_SP_MODE_CNTL, 1);
175   OUT_RING(ring, 0x0000000c); /* SP_MODE_CNTL */
176
177   OUT_PKT4(ring, REG_A5XX_TPL1_MODE_CNTL, 1);
178   OUT_RING(ring, 0x00000344); /* TPL1_MODE_CNTL */
179
180   OUT_PKT4(ring, REG_A5XX_HLSQ_MODE_CNTL, 1);
181   OUT_RING(ring, 0x00000002); /* HLSQ_MODE_CNTL */
182
183   OUT_PKT4(ring, REG_A5XX_GRAS_CL_CNTL, 1);
184   OUT_RING(ring, 0x00000181); /* GRAS_CL_CNTL */
185}
186
187/* buffers need to be handled specially since x/width can exceed the bounds
188 * supported by hw.. if necessary decompose into (potentially) two 2D blits
189 */
190static void
191emit_blit_buffer(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
192{
193   const struct pipe_box *sbox = &info->src.box;
194   const struct pipe_box *dbox = &info->dst.box;
195   struct fd_resource *src, *dst;
196   unsigned sshift, dshift;
197
198   src = fd_resource(info->src.resource);
199   dst = fd_resource(info->dst.resource);
200
201   debug_assert(src->layout.cpp == 1);
202   debug_assert(dst->layout.cpp == 1);
203   debug_assert(info->src.resource->format == info->dst.resource->format);
204   debug_assert((sbox->y == 0) && (sbox->height == 1));
205   debug_assert((dbox->y == 0) && (dbox->height == 1));
206   debug_assert((sbox->z == 0) && (sbox->depth == 1));
207   debug_assert((dbox->z == 0) && (dbox->depth == 1));
208   debug_assert(sbox->width == dbox->width);
209   debug_assert(info->src.level == 0);
210   debug_assert(info->dst.level == 0);
211
212   /*
213    * Buffers can have dimensions bigger than max width, remap into
214    * multiple 1d blits to fit within max dimension
215    *
216    * Note that blob uses .ARRAY_PITCH=128 for blitting buffers, which
217    * seems to prevent overfetch related faults.  Not quite sure what
218    * the deal is there.
219    *
220    * Low 6 bits of SRC/DST addresses need to be zero (ie. address
221    * aligned to 64) so we need to shift src/dst x1/x2 to make up the
222    * difference.  On top of already splitting up the blit so width
223    * isn't > 16k.
224    *
225    * We perhaps could do a bit better, if src and dst are aligned but
226    * in the worst case this means we have to split the copy up into
227    * 16k (0x4000) minus 64 (0x40).
228    */
229
230   sshift = sbox->x & 0x3f;
231   dshift = dbox->x & 0x3f;
232
233   for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
234      unsigned soff, doff, w, p;
235
236      soff = (sbox->x + off) & ~0x3f;
237      doff = (dbox->x + off) & ~0x3f;
238
239      w = MIN2(sbox->width - off, (0x4000 - 0x40));
240      p = align(w, 64);
241
242      debug_assert((soff + w) <= fd_bo_size(src->bo));
243      debug_assert((doff + w) <= fd_bo_size(dst->bo));
244
245      OUT_PKT7(ring, CP_SET_RENDER_MODE, 1);
246      OUT_RING(ring, CP_SET_RENDER_MODE_0_MODE(BLIT2D));
247
248      /*
249       * Emit source:
250       */
251      OUT_PKT4(ring, REG_A5XX_RB_2D_SRC_INFO, 9);
252      OUT_RING(ring, A5XX_RB_2D_SRC_INFO_COLOR_FORMAT(RB5_R8_UNORM) |
253                        A5XX_RB_2D_SRC_INFO_TILE_MODE(TILE5_LINEAR) |
254                        A5XX_RB_2D_SRC_INFO_COLOR_SWAP(WZYX));
255      OUT_RELOC(ring, src->bo, soff, 0, 0); /* RB_2D_SRC_LO/HI */
256      OUT_RING(ring, A5XX_RB_2D_SRC_SIZE_PITCH(p) |
257                        A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH(128));
258      OUT_RING(ring, 0x00000000);
259      OUT_RING(ring, 0x00000000);
260      OUT_RING(ring, 0x00000000);
261      OUT_RING(ring, 0x00000000);
262      OUT_RING(ring, 0x00000000);
263
264      OUT_PKT4(ring, REG_A5XX_GRAS_2D_SRC_INFO, 1);
265      OUT_RING(ring, A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT(RB5_R8_UNORM) |
266                        A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP(WZYX));
267
268      /*
269       * Emit destination:
270       */
271      OUT_PKT4(ring, REG_A5XX_RB_2D_DST_INFO, 9);
272      OUT_RING(ring, A5XX_RB_2D_DST_INFO_COLOR_FORMAT(RB5_R8_UNORM) |
273                        A5XX_RB_2D_DST_INFO_TILE_MODE(TILE5_LINEAR) |
274                        A5XX_RB_2D_DST_INFO_COLOR_SWAP(WZYX));
275      OUT_RELOC(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
276      OUT_RING(ring, A5XX_RB_2D_DST_SIZE_PITCH(p) |
277                        A5XX_RB_2D_DST_SIZE_ARRAY_PITCH(128));
278      OUT_RING(ring, 0x00000000);
279      OUT_RING(ring, 0x00000000);
280      OUT_RING(ring, 0x00000000);
281      OUT_RING(ring, 0x00000000);
282      OUT_RING(ring, 0x00000000);
283
284      OUT_PKT4(ring, REG_A5XX_GRAS_2D_DST_INFO, 1);
285      OUT_RING(ring, A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT(RB5_R8_UNORM) |
286                        A5XX_GRAS_2D_DST_INFO_COLOR_SWAP(WZYX));
287
288      /*
289       * Blit command:
290       */
291      OUT_PKT7(ring, CP_BLIT, 5);
292      OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_COPY));
293      OUT_RING(ring, CP_BLIT_1_SRC_X1(sshift) | CP_BLIT_1_SRC_Y1(0));
294      OUT_RING(ring, CP_BLIT_2_SRC_X2(sshift + w - 1) | CP_BLIT_2_SRC_Y2(0));
295      OUT_RING(ring, CP_BLIT_3_DST_X1(dshift) | CP_BLIT_3_DST_Y1(0));
296      OUT_RING(ring, CP_BLIT_4_DST_X2(dshift + w - 1) | CP_BLIT_4_DST_Y2(0));
297
298      OUT_PKT7(ring, CP_SET_RENDER_MODE, 1);
299      OUT_RING(ring, CP_SET_RENDER_MODE_0_MODE(END2D));
300
301      OUT_WFI5(ring);
302   }
303}
304
305static void
306emit_blit(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
307{
308   const struct pipe_box *sbox = &info->src.box;
309   const struct pipe_box *dbox = &info->dst.box;
310   struct fd_resource *src, *dst;
311   struct fdl_slice *sslice, *dslice;
312   enum a5xx_color_fmt sfmt, dfmt;
313   enum a5xx_tile_mode stile, dtile;
314   enum a3xx_color_swap sswap, dswap;
315   unsigned ssize, dsize, spitch, dpitch;
316   unsigned sx1, sy1, sx2, sy2;
317   unsigned dx1, dy1, dx2, dy2;
318
319   src = fd_resource(info->src.resource);
320   dst = fd_resource(info->dst.resource);
321
322   sslice = fd_resource_slice(src, info->src.level);
323   dslice = fd_resource_slice(dst, info->dst.level);
324
325   sfmt = fd5_pipe2color(info->src.format);
326   dfmt = fd5_pipe2color(info->dst.format);
327
328   stile = fd_resource_tile_mode(info->src.resource, info->src.level);
329   dtile = fd_resource_tile_mode(info->dst.resource, info->dst.level);
330
331   sswap = fd5_pipe2swap(info->src.format);
332   dswap = fd5_pipe2swap(info->dst.format);
333
334   spitch = fd_resource_pitch(src, info->src.level);
335   dpitch = fd_resource_pitch(dst, info->dst.level);
336
337   /* if dtile, then dswap ignored by hw, and likewise if stile then sswap
338    * ignored by hw.. but in this case we have already rejected the blit
339    * if src and dst formats differ, so juse use WZYX for both src and
340    * dst swap mode (so we don't change component order)
341    */
342   if (stile || dtile) {
343      debug_assert(info->src.format == info->dst.format);
344      sswap = dswap = WZYX;
345   }
346
347   sx1 = sbox->x;
348   sy1 = sbox->y;
349   sx2 = sbox->x + sbox->width - 1;
350   sy2 = sbox->y + sbox->height - 1;
351
352   dx1 = dbox->x;
353   dy1 = dbox->y;
354   dx2 = dbox->x + dbox->width - 1;
355   dy2 = dbox->y + dbox->height - 1;
356
357   if (info->src.resource->target == PIPE_TEXTURE_3D)
358      ssize = sslice->size0;
359   else
360      ssize = src->layout.layer_size;
361
362   if (info->dst.resource->target == PIPE_TEXTURE_3D)
363      dsize = dslice->size0;
364   else
365      dsize = dst->layout.layer_size;
366
367   for (unsigned i = 0; i < info->dst.box.depth; i++) {
368      unsigned soff = fd_resource_offset(src, info->src.level, sbox->z + i);
369      unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i);
370
371      debug_assert((soff + (sbox->height * spitch)) <= fd_bo_size(src->bo));
372      debug_assert((doff + (dbox->height * dpitch)) <= fd_bo_size(dst->bo));
373
374      OUT_PKT7(ring, CP_SET_RENDER_MODE, 1);
375      OUT_RING(ring, CP_SET_RENDER_MODE_0_MODE(BLIT2D));
376
377      /*
378       * Emit source:
379       */
380      OUT_PKT4(ring, REG_A5XX_RB_2D_SRC_INFO, 9);
381      OUT_RING(ring, A5XX_RB_2D_SRC_INFO_COLOR_FORMAT(sfmt) |
382                        A5XX_RB_2D_SRC_INFO_TILE_MODE(stile) |
383                        A5XX_RB_2D_SRC_INFO_COLOR_SWAP(sswap));
384      OUT_RELOC(ring, src->bo, soff, 0, 0); /* RB_2D_SRC_LO/HI */
385      OUT_RING(ring, A5XX_RB_2D_SRC_SIZE_PITCH(spitch) |
386                        A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH(ssize));
387      OUT_RING(ring, 0x00000000);
388      OUT_RING(ring, 0x00000000);
389      OUT_RING(ring, 0x00000000);
390      OUT_RING(ring, 0x00000000);
391      OUT_RING(ring, 0x00000000);
392
393      OUT_PKT4(ring, REG_A5XX_GRAS_2D_SRC_INFO, 1);
394      OUT_RING(ring, A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT(sfmt) |
395                        A5XX_GRAS_2D_SRC_INFO_TILE_MODE(stile) |
396                        A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP(sswap));
397
398      /*
399       * Emit destination:
400       */
401      OUT_PKT4(ring, REG_A5XX_RB_2D_DST_INFO, 9);
402      OUT_RING(ring, A5XX_RB_2D_DST_INFO_COLOR_FORMAT(dfmt) |
403                        A5XX_RB_2D_DST_INFO_TILE_MODE(dtile) |
404                        A5XX_RB_2D_DST_INFO_COLOR_SWAP(dswap));
405      OUT_RELOC(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
406      OUT_RING(ring, A5XX_RB_2D_DST_SIZE_PITCH(dpitch) |
407                        A5XX_RB_2D_DST_SIZE_ARRAY_PITCH(dsize));
408      OUT_RING(ring, 0x00000000);
409      OUT_RING(ring, 0x00000000);
410      OUT_RING(ring, 0x00000000);
411      OUT_RING(ring, 0x00000000);
412      OUT_RING(ring, 0x00000000);
413
414      OUT_PKT4(ring, REG_A5XX_GRAS_2D_DST_INFO, 1);
415      OUT_RING(ring, A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT(dfmt) |
416                        A5XX_GRAS_2D_DST_INFO_TILE_MODE(dtile) |
417                        A5XX_GRAS_2D_DST_INFO_COLOR_SWAP(dswap));
418
419      /*
420       * Blit command:
421       */
422      OUT_PKT7(ring, CP_BLIT, 5);
423      OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_COPY));
424      OUT_RING(ring, CP_BLIT_1_SRC_X1(sx1) | CP_BLIT_1_SRC_Y1(sy1));
425      OUT_RING(ring, CP_BLIT_2_SRC_X2(sx2) | CP_BLIT_2_SRC_Y2(sy2));
426      OUT_RING(ring, CP_BLIT_3_DST_X1(dx1) | CP_BLIT_3_DST_Y1(dy1));
427      OUT_RING(ring, CP_BLIT_4_DST_X2(dx2) | CP_BLIT_4_DST_Y2(dy2));
428
429      OUT_PKT7(ring, CP_SET_RENDER_MODE, 1);
430      OUT_RING(ring, CP_SET_RENDER_MODE_0_MODE(END2D));
431   }
432}
433
434bool
435fd5_blitter_blit(struct fd_context *ctx,
436                 const struct pipe_blit_info *info) assert_dt
437{
438   struct fd_batch *batch;
439
440   if (!can_do_blit(info)) {
441      return false;
442   }
443
444   struct fd_resource *src = fd_resource(info->src.resource);
445   struct fd_resource *dst = fd_resource(info->dst.resource);
446
447   batch = fd_bc_alloc_batch(ctx, true);
448
449   fd_screen_lock(ctx->screen);
450
451   fd_batch_resource_read(batch, src);
452   fd_batch_resource_write(batch, dst);
453
454   fd_screen_unlock(ctx->screen);
455
456   DBG_BLIT(info, batch);
457
458   fd_batch_update_queries(batch);
459
460   emit_setup(batch->draw);
461
462   if ((info->src.resource->target == PIPE_BUFFER) &&
463       (info->dst.resource->target == PIPE_BUFFER)) {
464      assert(fd_resource(info->src.resource)->layout.tile_mode == TILE5_LINEAR);
465      assert(fd_resource(info->dst.resource)->layout.tile_mode == TILE5_LINEAR);
466      emit_blit_buffer(batch->draw, info);
467   } else {
468      /* I don't *think* we need to handle blits between buffer <-> !buffer */
469      debug_assert(info->src.resource->target != PIPE_BUFFER);
470      debug_assert(info->dst.resource->target != PIPE_BUFFER);
471      emit_blit(batch->draw, info);
472   }
473
474   fd_batch_needs_flush(batch);
475
476   fd_batch_flush(batch);
477   fd_batch_reference(&batch, NULL);
478
479   /* Acc query state will have been dirtied by our fd_batch_update_queries, so
480    * the ctx->batch may need to turn its queries back on.
481    */
482   ctx->update_active_queries = true;
483
484   return true;
485}
486
487unsigned
488fd5_tile_mode(const struct pipe_resource *tmpl)
489{
490   /* basically just has to be a format we can blit, so uploads/downloads
491    * via linear staging buffer works:
492    */
493   if (ok_format(tmpl->format))
494      return TILE5_3;
495
496   return TILE5_LINEAR;
497}
498