1/* 2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Rob Clark <robclark@freedesktop.org> 25 */ 26 27#include "pipe/p_state.h" 28#include "util/debug.h" 29#include "util/format/u_format.h" 30#include "util/hash_table.h" 31#include "util/u_dump.h" 32#include "util/u_inlines.h" 33#include "util/u_memory.h" 34#include "util/u_string.h" 35#include "u_tracepoints.h" 36#include "util/u_trace_gallium.h" 37 38#include "freedreno_context.h" 39#include "freedreno_fence.h" 40#include "freedreno_gmem.h" 41#include "freedreno_query_hw.h" 42#include "freedreno_resource.h" 43#include "freedreno_tracepoints.h" 44#include "freedreno_util.h" 45 46/* 47 * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer 48 * inside the GPU. All rendering happens to GMEM. Larger render targets 49 * are split into tiles that are small enough for the color (and depth and/or 50 * stencil, if enabled) buffers to fit within GMEM. Before rendering a tile, 51 * if there was not a clear invalidating the previous tile contents, we need 52 * to restore the previous tiles contents (system mem -> GMEM), and after all 53 * the draw calls, before moving to the next tile, we need to save the tile 54 * contents (GMEM -> system mem). 55 * 56 * The code in this file handles dealing with GMEM and tiling. 57 * 58 * The structure of the ringbuffer ends up being: 59 * 60 * +--<---<-- IB ---<---+---<---+---<---<---<--+ 61 * | | | | 62 * v ^ ^ ^ 63 * ------------------------------------------------------ 64 * | clear/draw cmds | Tile0 | Tile1 | .... | TileN | 65 * ------------------------------------------------------ 66 * ^ 67 * | 68 * address submitted in issueibcmds 69 * 70 * Where the per-tile section handles scissor setup, mem2gmem restore (if 71 * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem 72 * resolve. 73 */ 74 75#ifndef BIN_DEBUG 76#define BIN_DEBUG 0 77#endif 78 79/* 80 * GMEM Cache: 81 * 82 * Caches GMEM state based on a given framebuffer state. The key is 83 * meant to be the minimal set of data that results in a unique gmem 84 * configuration, avoiding multiple keys arriving at the same gmem 85 * state. For example, the render target format is not part of the 86 * key, only the size per pixel. And the max_scissor bounds is not 87 * part of they key, only the minx/miny (after clamping to tile 88 * alignment) and width/height. This ensures that slightly different 89 * max_scissor which would result in the same gmem state, do not 90 * become different keys that map to the same state. 91 */ 92 93struct gmem_key { 94 uint16_t minx, miny; 95 uint16_t width, height; 96 uint8_t gmem_page_align; /* alignment in multiples of 0x1000 to reduce key size */ 97 uint8_t nr_cbufs; 98 uint8_t cbuf_cpp[MAX_RENDER_TARGETS]; 99 uint8_t zsbuf_cpp[2]; 100}; 101 102static uint32_t 103gmem_key_hash(const void *_key) 104{ 105 const struct gmem_key *key = _key; 106 return _mesa_hash_data(key, sizeof(*key)); 107} 108 109static bool 110gmem_key_equals(const void *_a, const void *_b) 111{ 112 const struct gmem_key *a = _a; 113 const struct gmem_key *b = _b; 114 return memcmp(a, b, sizeof(*a)) == 0; 115} 116 117static void 118dump_gmem_key(const struct gmem_key *key) 119{ 120 printf("{ .minx=%u, .miny=%u, .width=%u, .height=%u", key->minx, key->miny, 121 key->width, key->height); 122 printf(", .gmem_page_align=%u, .nr_cbufs=%u", key->gmem_page_align, 123 key->nr_cbufs); 124 printf(", .cbuf_cpp = {"); 125 for (unsigned i = 0; i < ARRAY_SIZE(key->cbuf_cpp); i++) 126 printf("%u,", key->cbuf_cpp[i]); 127 printf("}, .zsbuf_cpp = {"); 128 for (unsigned i = 0; i < ARRAY_SIZE(key->zsbuf_cpp); i++) 129 printf("%u,", key->zsbuf_cpp[i]); 130 printf("}},\n"); 131} 132 133static void 134dump_gmem_state(const struct fd_gmem_stateobj *gmem) 135{ 136 unsigned total = 0; 137 printf("GMEM LAYOUT: bin=%ux%u, nbins=%ux%u\n", gmem->bin_w, gmem->bin_h, 138 gmem->nbins_x, gmem->nbins_y); 139 for (int i = 0; i < ARRAY_SIZE(gmem->cbuf_base); i++) { 140 if (!gmem->cbuf_cpp[i]) 141 continue; 142 143 unsigned size = gmem->cbuf_cpp[i] * gmem->bin_w * gmem->bin_h; 144 printf(" cbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i, 145 gmem->cbuf_base[i], size, gmem->cbuf_cpp[i]); 146 147 total = gmem->cbuf_base[i] + size; 148 } 149 150 for (int i = 0; i < ARRAY_SIZE(gmem->zsbuf_base); i++) { 151 if (!gmem->zsbuf_cpp[i]) 152 continue; 153 154 unsigned size = gmem->zsbuf_cpp[i] * gmem->bin_w * gmem->bin_h; 155 printf(" zsbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i, 156 gmem->zsbuf_base[i], size, gmem->zsbuf_cpp[i]); 157 158 total = gmem->zsbuf_base[i] + size; 159 } 160 161 printf("total: 0x%06x (of 0x%06x)\n", total, gmem->screen->gmemsize_bytes); 162} 163 164static unsigned 165div_align(unsigned num, unsigned denom, unsigned al) 166{ 167 return util_align_npot(DIV_ROUND_UP(num, denom), al); 168} 169 170static bool 171layout_gmem(struct gmem_key *key, uint32_t nbins_x, uint32_t nbins_y, 172 struct fd_gmem_stateobj *gmem) 173{ 174 struct fd_screen *screen = gmem->screen; 175 uint32_t gmem_align = key->gmem_page_align * 0x1000; 176 uint32_t total = 0, i; 177 178 if ((nbins_x == 0) || (nbins_y == 0)) 179 return false; 180 181 uint32_t bin_w, bin_h; 182 bin_w = div_align(key->width, nbins_x, screen->info->tile_align_w); 183 bin_h = div_align(key->height, nbins_y, screen->info->tile_align_h); 184 185 if (bin_w > screen->info->tile_max_w) 186 return false; 187 188 if (bin_h > screen->info->tile_max_h) 189 return false; 190 191 gmem->bin_w = bin_w; 192 gmem->bin_h = bin_h; 193 194 /* due to aligning bin_w/h, we could end up with one too 195 * many bins in either dimension, so recalculate: 196 */ 197 gmem->nbins_x = DIV_ROUND_UP(key->width, bin_w); 198 gmem->nbins_y = DIV_ROUND_UP(key->height, bin_h); 199 200 for (i = 0; i < MAX_RENDER_TARGETS; i++) { 201 if (key->cbuf_cpp[i]) { 202 gmem->cbuf_base[i] = util_align_npot(total, gmem_align); 203 total = gmem->cbuf_base[i] + key->cbuf_cpp[i] * bin_w * bin_h; 204 } 205 } 206 207 if (key->zsbuf_cpp[0]) { 208 gmem->zsbuf_base[0] = util_align_npot(total, gmem_align); 209 total = gmem->zsbuf_base[0] + key->zsbuf_cpp[0] * bin_w * bin_h; 210 } 211 212 if (key->zsbuf_cpp[1]) { 213 gmem->zsbuf_base[1] = util_align_npot(total, gmem_align); 214 total = gmem->zsbuf_base[1] + key->zsbuf_cpp[1] * bin_w * bin_h; 215 } 216 217 return total <= screen->gmemsize_bytes; 218} 219 220static void 221calc_nbins(struct gmem_key *key, struct fd_gmem_stateobj *gmem) 222{ 223 struct fd_screen *screen = gmem->screen; 224 uint32_t nbins_x = 1, nbins_y = 1; 225 uint32_t max_width = screen->info->tile_max_w; 226 uint32_t max_height = screen->info->tile_max_h; 227 228 if (FD_DBG(MSGS)) { 229 debug_printf("binning input: cbuf cpp:"); 230 for (unsigned i = 0; i < key->nr_cbufs; i++) 231 debug_printf(" %d", key->cbuf_cpp[i]); 232 debug_printf(", zsbuf cpp: %d; %dx%d\n", key->zsbuf_cpp[0], key->width, 233 key->height); 234 } 235 236 /* first, find a bin size that satisfies the maximum width/ 237 * height restrictions: 238 */ 239 while (div_align(key->width, nbins_x, screen->info->tile_align_w) > 240 max_width) { 241 nbins_x++; 242 } 243 244 while (div_align(key->height, nbins_y, screen->info->tile_align_h) > 245 max_height) { 246 nbins_y++; 247 } 248 249 /* then find a bin width/height that satisfies the memory 250 * constraints: 251 */ 252 while (!layout_gmem(key, nbins_x, nbins_y, gmem)) { 253 if (nbins_y > nbins_x) { 254 nbins_x++; 255 } else { 256 nbins_y++; 257 } 258 } 259 260 /* Lets see if we can tweak the layout a bit and come up with 261 * something better: 262 */ 263 if ((((nbins_x - 1) * (nbins_y + 1)) < (nbins_x * nbins_y)) && 264 layout_gmem(key, nbins_x - 1, nbins_y + 1, gmem)) { 265 nbins_x--; 266 nbins_y++; 267 } else if ((((nbins_x + 1) * (nbins_y - 1)) < (nbins_x * nbins_y)) && 268 layout_gmem(key, nbins_x + 1, nbins_y - 1, gmem)) { 269 nbins_x++; 270 nbins_y--; 271 } 272 273 layout_gmem(key, nbins_x, nbins_y, gmem); 274} 275 276static struct fd_gmem_stateobj * 277gmem_stateobj_init(struct fd_screen *screen, struct gmem_key *key) 278{ 279 struct fd_gmem_stateobj *gmem = 280 rzalloc(screen->gmem_cache.ht, struct fd_gmem_stateobj); 281 pipe_reference_init(&gmem->reference, 1); 282 gmem->screen = screen; 283 gmem->key = key; 284 list_inithead(&gmem->node); 285 286 const unsigned npipes = screen->info->num_vsc_pipes; 287 uint32_t i, j, t, xoff, yoff; 288 uint32_t tpp_x, tpp_y; 289 int tile_n[npipes]; 290 291 calc_nbins(key, gmem); 292 293 DBG("using %d bins of size %dx%d", gmem->nbins_x * gmem->nbins_y, 294 gmem->bin_w, gmem->bin_h); 295 296 memcpy(gmem->cbuf_cpp, key->cbuf_cpp, sizeof(key->cbuf_cpp)); 297 memcpy(gmem->zsbuf_cpp, key->zsbuf_cpp, sizeof(key->zsbuf_cpp)); 298 gmem->minx = key->minx; 299 gmem->miny = key->miny; 300 gmem->width = key->width; 301 gmem->height = key->height; 302 303 if (BIN_DEBUG) { 304 dump_gmem_state(gmem); 305 dump_gmem_key(key); 306 } 307 308 /* 309 * Assign tiles and pipes: 310 * 311 * At some point it might be worth playing with different 312 * strategies and seeing if that makes much impact on 313 * performance. 314 */ 315 316#define div_round_up(v, a) (((v) + (a)-1) / (a)) 317 /* figure out number of tiles per pipe: */ 318 if (is_a20x(screen)) { 319 /* for a20x we want to minimize the number of "pipes" 320 * binning data has 3 bits for x/y (8x8) but the edges are used to 321 * cull off-screen vertices with hw binning, so we have 6x6 pipes 322 */ 323 tpp_x = 6; 324 tpp_y = 6; 325 } else { 326 tpp_x = tpp_y = 1; 327 while (div_round_up(gmem->nbins_y, tpp_y) > npipes) 328 tpp_y += 2; 329 while ((div_round_up(gmem->nbins_y, tpp_y) * 330 div_round_up(gmem->nbins_x, tpp_x)) > npipes) 331 tpp_x += 1; 332 } 333 334#ifdef DEBUG 335 tpp_x = env_var_as_unsigned("TPP_X", tpp_x); 336 tpp_y = env_var_as_unsigned("TPP_Y", tpp_x); 337#endif 338 339 gmem->maxpw = tpp_x; 340 gmem->maxph = tpp_y; 341 342 /* configure pipes: */ 343 xoff = yoff = 0; 344 for (i = 0; i < npipes; i++) { 345 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i]; 346 347 if (xoff >= gmem->nbins_x) { 348 xoff = 0; 349 yoff += tpp_y; 350 } 351 352 if (yoff >= gmem->nbins_y) { 353 break; 354 } 355 356 pipe->x = xoff; 357 pipe->y = yoff; 358 pipe->w = MIN2(tpp_x, gmem->nbins_x - xoff); 359 pipe->h = MIN2(tpp_y, gmem->nbins_y - yoff); 360 361 xoff += tpp_x; 362 } 363 364 /* number of pipes to use for a20x */ 365 gmem->num_vsc_pipes = MAX2(1, i); 366 367 for (; i < npipes; i++) { 368 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i]; 369 pipe->x = pipe->y = pipe->w = pipe->h = 0; 370 } 371 372 if (BIN_DEBUG) { 373 printf("%dx%d ... tpp=%dx%d\n", gmem->nbins_x, gmem->nbins_y, tpp_x, 374 tpp_y); 375 for (i = 0; i < ARRAY_SIZE(gmem->vsc_pipe); i++) { 376 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i]; 377 printf("pipe[%d]: %ux%u @ %u,%u\n", i, pipe->w, pipe->h, pipe->x, 378 pipe->y); 379 } 380 } 381 382 /* configure tiles: */ 383 t = 0; 384 yoff = key->miny; 385 memset(tile_n, 0, sizeof(tile_n)); 386 for (i = 0; i < gmem->nbins_y; i++) { 387 int bw, bh; 388 389 xoff = key->minx; 390 391 /* clip bin height: */ 392 bh = MIN2(gmem->bin_h, key->miny + key->height - yoff); 393 assert(bh > 0); 394 395 for (j = 0; j < gmem->nbins_x; j++) { 396 struct fd_tile *tile = &gmem->tile[t]; 397 uint32_t p; 398 399 assert(t < ARRAY_SIZE(gmem->tile)); 400 401 /* pipe number: */ 402 p = ((i / tpp_y) * div_round_up(gmem->nbins_x, tpp_x)) + (j / tpp_x); 403 assert(p < gmem->num_vsc_pipes); 404 405 /* clip bin width: */ 406 bw = MIN2(gmem->bin_w, key->minx + key->width - xoff); 407 assert(bw > 0); 408 409 tile->n = !is_a20x(screen) ? tile_n[p]++ 410 : ((i % tpp_y + 1) << 3 | (j % tpp_x + 1)); 411 tile->p = p; 412 tile->bin_w = bw; 413 tile->bin_h = bh; 414 tile->xoff = xoff; 415 tile->yoff = yoff; 416 417 if (BIN_DEBUG) { 418 printf("tile[%d]: p=%u, bin=%ux%u+%u+%u\n", t, p, bw, bh, xoff, 419 yoff); 420 } 421 422 t++; 423 424 xoff += bw; 425 } 426 427 yoff += bh; 428 } 429 430 if (BIN_DEBUG) { 431 t = 0; 432 for (i = 0; i < gmem->nbins_y; i++) { 433 for (j = 0; j < gmem->nbins_x; j++) { 434 struct fd_tile *tile = &gmem->tile[t++]; 435 printf("|p:%u n:%u|", tile->p, tile->n); 436 } 437 printf("\n"); 438 } 439 } 440 441 return gmem; 442} 443 444void 445__fd_gmem_destroy(struct fd_gmem_stateobj *gmem) 446{ 447 struct fd_gmem_cache *cache = &gmem->screen->gmem_cache; 448 449 fd_screen_assert_locked(gmem->screen); 450 451 _mesa_hash_table_remove_key(cache->ht, gmem->key); 452 list_del(&gmem->node); 453 454 ralloc_free(gmem->key); 455 ralloc_free(gmem); 456} 457 458static struct gmem_key * 459gmem_key_init(struct fd_batch *batch, bool assume_zs, bool no_scis_opt) 460{ 461 struct fd_screen *screen = batch->ctx->screen; 462 struct pipe_framebuffer_state *pfb = &batch->framebuffer; 463 bool has_zs = pfb->zsbuf && 464 !!(batch->gmem_reason & (FD_GMEM_DEPTH_ENABLED | FD_GMEM_STENCIL_ENABLED | 465 FD_GMEM_CLEARS_DEPTH_STENCIL)); 466 struct gmem_key *key = rzalloc(screen->gmem_cache.ht, struct gmem_key); 467 468 if (has_zs || assume_zs) { 469 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture); 470 key->zsbuf_cpp[0] = rsc->layout.cpp; 471 if (rsc->stencil) 472 key->zsbuf_cpp[1] = rsc->stencil->layout.cpp; 473 } else { 474 /* we might have a zsbuf, but it isn't used */ 475 batch->restore &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL); 476 batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL); 477 } 478 479 key->nr_cbufs = pfb->nr_cbufs; 480 for (unsigned i = 0; i < pfb->nr_cbufs; i++) { 481 if (pfb->cbufs[i]) 482 key->cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format); 483 else 484 key->cbuf_cpp[i] = 4; 485 /* if MSAA, color buffers are super-sampled in GMEM: */ 486 key->cbuf_cpp[i] *= pfb->samples; 487 } 488 489 /* NOTE: on a6xx, the max-scissor-rect is handled in fd6_gmem, and 490 * we just rely on CP_COND_EXEC to skip bins with no geometry. 491 */ 492 if (no_scis_opt || is_a6xx(screen)) { 493 key->minx = 0; 494 key->miny = 0; 495 key->width = pfb->width; 496 key->height = pfb->height; 497 } else { 498 struct pipe_scissor_state *scissor = &batch->max_scissor; 499 500 if (FD_DBG(NOSCIS)) { 501 scissor->minx = 0; 502 scissor->miny = 0; 503 scissor->maxx = pfb->width; 504 scissor->maxy = pfb->height; 505 } 506 507 /* round down to multiple of alignment: */ 508 key->minx = scissor->minx & ~(screen->info->gmem_align_w - 1); 509 key->miny = scissor->miny & ~(screen->info->gmem_align_h - 1); 510 key->width = scissor->maxx - key->minx; 511 key->height = scissor->maxy - key->miny; 512 } 513 514 if (is_a20x(screen) && batch->cleared) { 515 /* under normal circumstances the requirement would be 4K 516 * but the fast clear path requires an alignment of 32K 517 */ 518 key->gmem_page_align = 8; 519 } else if (is_a6xx(screen)) { 520 key->gmem_page_align = (screen->info->tile_align_w == 96) ? 3 : 1; 521 } else { 522 // TODO re-check this across gens.. maybe it should only 523 // be a single page in some cases: 524 key->gmem_page_align = 4; 525 } 526 527 return key; 528} 529 530static struct fd_gmem_stateobj * 531lookup_gmem_state(struct fd_batch *batch, bool assume_zs, bool no_scis_opt) 532{ 533 struct fd_screen *screen = batch->ctx->screen; 534 struct fd_gmem_cache *cache = &screen->gmem_cache; 535 struct fd_gmem_stateobj *gmem = NULL; 536 537 /* Lock before allocating gmem_key, since that a screen-wide 538 * ralloc pool and ralloc itself is not thread-safe. 539 */ 540 fd_screen_lock(screen); 541 542 struct gmem_key *key = gmem_key_init(batch, assume_zs, no_scis_opt); 543 uint32_t hash = gmem_key_hash(key); 544 545 struct hash_entry *entry = 546 _mesa_hash_table_search_pre_hashed(cache->ht, hash, key); 547 if (entry) { 548 ralloc_free(key); 549 goto found; 550 } 551 552 /* limit the # of cached gmem states, discarding the least 553 * recently used state if needed: 554 */ 555 if (cache->ht->entries >= 20) { 556 struct fd_gmem_stateobj *last = 557 list_last_entry(&cache->lru, struct fd_gmem_stateobj, node); 558 fd_gmem_reference(&last, NULL); 559 } 560 561 entry = _mesa_hash_table_insert_pre_hashed(cache->ht, hash, key, 562 gmem_stateobj_init(screen, key)); 563 564found: 565 fd_gmem_reference(&gmem, entry->data); 566 /* Move to the head of the LRU: */ 567 list_delinit(&gmem->node); 568 list_add(&gmem->node, &cache->lru); 569 570 fd_screen_unlock(screen); 571 572 return gmem; 573} 574 575/* 576 * GMEM render pass 577 */ 578 579static void 580render_tiles(struct fd_batch *batch, struct fd_gmem_stateobj *gmem) assert_dt 581{ 582 struct fd_context *ctx = batch->ctx; 583 int i; 584 585 simple_mtx_lock(&ctx->gmem_lock); 586 587 ctx->emit_tile_init(batch); 588 589 if (batch->restore) 590 ctx->stats.batch_restore++; 591 592 for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) { 593 struct fd_tile *tile = &gmem->tile[i]; 594 595 trace_start_tile(&batch->trace, batch->gmem, tile->bin_h, tile->yoff, tile->bin_w, 596 tile->xoff); 597 598 ctx->emit_tile_prep(batch, tile); 599 600 if (batch->restore) { 601 ctx->emit_tile_mem2gmem(batch, tile); 602 } 603 604 ctx->emit_tile_renderprep(batch, tile); 605 606 if (ctx->query_prepare_tile) 607 ctx->query_prepare_tile(batch, i, batch->gmem); 608 609 /* emit IB to drawcmds: */ 610 trace_start_draw_ib(&batch->trace, batch->gmem); 611 if (ctx->emit_tile) { 612 ctx->emit_tile(batch, tile); 613 } else { 614 ctx->screen->emit_ib(batch->gmem, batch->draw); 615 } 616 trace_end_draw_ib(&batch->trace, batch->gmem); 617 fd_reset_wfi(batch); 618 619 /* emit gmem2mem to transfer tile back to system memory: */ 620 ctx->emit_tile_gmem2mem(batch, tile); 621 } 622 623 if (ctx->emit_tile_fini) 624 ctx->emit_tile_fini(batch); 625 626 simple_mtx_unlock(&ctx->gmem_lock); 627} 628 629static void 630render_sysmem(struct fd_batch *batch) assert_dt 631{ 632 struct fd_context *ctx = batch->ctx; 633 634 ctx->emit_sysmem_prep(batch); 635 636 if (ctx->query_prepare_tile) 637 ctx->query_prepare_tile(batch, 0, batch->gmem); 638 639 if (!batch->nondraw) { 640 trace_start_draw_ib(&batch->trace, batch->gmem); 641 } 642 /* emit IB to drawcmds: */ 643 ctx->screen->emit_ib(batch->gmem, batch->draw); 644 645 if (!batch->nondraw) { 646 trace_end_draw_ib(&batch->trace, batch->gmem); 647 } 648 649 fd_reset_wfi(batch); 650 651 if (ctx->emit_sysmem_fini) 652 ctx->emit_sysmem_fini(batch); 653} 654 655static void 656flush_ring(struct fd_batch *batch) 657{ 658 if (FD_DBG(NOHW)) 659 return; 660 661 fd_submit_flush(batch->submit, batch->in_fence_fd, 662 batch->fence ? &batch->fence->submit_fence : NULL); 663 664 if (batch->fence) 665 fd_fence_set_batch(batch->fence, NULL); 666} 667 668void 669fd_gmem_render_tiles(struct fd_batch *batch) 670{ 671 struct fd_context *ctx = batch->ctx; 672 struct pipe_framebuffer_state *pfb = &batch->framebuffer; 673 bool sysmem = false; 674 675 ctx->submit_count++; 676 677 if (!batch->nondraw) { 678#if HAVE_PERFETTO 679 /* For non-draw batches, we don't really have a good place to 680 * match up the api event submit-id to the on-gpu rendering, 681 * so skip this for non-draw batches. 682 */ 683 fd_perfetto_submit(ctx); 684#endif 685 trace_flush_batch(&batch->trace, batch->gmem, batch, batch->cleared, 686 batch->gmem_reason, batch->num_draws); 687 trace_framebuffer_state(&batch->trace, batch->gmem, pfb); 688 } 689 690 if (ctx->emit_sysmem_prep && !batch->nondraw) { 691 if (fd_autotune_use_bypass(&ctx->autotune, batch) && !FD_DBG(NOBYPASS)) { 692 sysmem = true; 693 } 694 695 /* For ARB_framebuffer_no_attachments: */ 696 if ((pfb->nr_cbufs == 0) && !pfb->zsbuf) { 697 sysmem = true; 698 } 699 } 700 701 if (FD_DBG(NOGMEM)) 702 sysmem = true; 703 704 /* Layered rendering always needs bypass. */ 705 for (unsigned i = 0; i < pfb->nr_cbufs; i++) { 706 struct pipe_surface *psurf = pfb->cbufs[i]; 707 if (!psurf) 708 continue; 709 if (psurf->u.tex.first_layer < psurf->u.tex.last_layer) 710 sysmem = true; 711 } 712 713 /* Tessellation doesn't seem to support tiled rendering so fall back to 714 * bypass. 715 */ 716 if (batch->tessellation) { 717 debug_assert(ctx->emit_sysmem_prep); 718 sysmem = true; 719 } 720 721 fd_reset_wfi(batch); 722 723 ctx->stats.batch_total++; 724 725 if (batch->nondraw) { 726 DBG("%p: rendering non-draw", batch); 727 if (!fd_ringbuffer_empty(batch->draw)) 728 render_sysmem(batch); 729 ctx->stats.batch_nondraw++; 730 } else if (sysmem) { 731 trace_render_sysmem(&batch->trace, batch->gmem); 732 trace_start_render_pass(&batch->trace, batch->gmem, 733 ctx->submit_count, pipe_surface_format(pfb->cbufs[0]), 734 pipe_surface_format(pfb->zsbuf), pfb->width, pfb->height, 735 pfb->nr_cbufs, pfb->samples, 0, 0, 0); 736 if (ctx->query_prepare) 737 ctx->query_prepare(batch, 1); 738 render_sysmem(batch); 739 trace_end_render_pass(&batch->trace, batch->gmem); 740 ctx->stats.batch_sysmem++; 741 } else { 742 struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, false, false); 743 batch->gmem_state = gmem; 744 trace_render_gmem(&batch->trace, batch->gmem, gmem->nbins_x, gmem->nbins_y, 745 gmem->bin_w, gmem->bin_h); 746 trace_start_render_pass(&batch->trace, batch->gmem, 747 ctx->submit_count, pipe_surface_format(pfb->cbufs[0]), 748 pipe_surface_format(pfb->zsbuf), pfb->width, pfb->height, 749 pfb->nr_cbufs, pfb->samples, gmem->nbins_x * gmem->nbins_y, 750 gmem->bin_w, gmem->bin_h); 751 if (ctx->query_prepare) 752 ctx->query_prepare(batch, gmem->nbins_x * gmem->nbins_y); 753 render_tiles(batch, gmem); 754 trace_end_render_pass(&batch->trace, batch->gmem); 755 batch->gmem_state = NULL; 756 757 fd_screen_lock(ctx->screen); 758 fd_gmem_reference(&gmem, NULL); 759 fd_screen_unlock(ctx->screen); 760 761 ctx->stats.batch_gmem++; 762 } 763 764 flush_ring(batch); 765 766 u_trace_flush(&batch->trace, NULL, false); 767} 768 769/* Determine a worst-case estimate (ie. assuming we don't eliminate an 770 * unused depth/stencil) number of bins per vsc pipe. 771 */ 772unsigned 773fd_gmem_estimate_bins_per_pipe(struct fd_batch *batch) 774{ 775 struct pipe_framebuffer_state *pfb = &batch->framebuffer; 776 struct fd_screen *screen = batch->ctx->screen; 777 struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, !!pfb->zsbuf, true); 778 unsigned nbins = gmem->maxpw * gmem->maxph; 779 780 fd_screen_lock(screen); 781 fd_gmem_reference(&gmem, NULL); 782 fd_screen_unlock(screen); 783 784 return nbins; 785} 786 787/* When deciding whether a tile needs mem2gmem, we need to take into 788 * account the scissor rect(s) that were cleared. To simplify we only 789 * consider the last scissor rect for each buffer, since the common 790 * case would be a single clear. 791 */ 792bool 793fd_gmem_needs_restore(struct fd_batch *batch, const struct fd_tile *tile, 794 uint32_t buffers) 795{ 796 if (!(batch->restore & buffers)) 797 return false; 798 799 return true; 800} 801 802void 803fd_gmem_screen_init(struct pipe_screen *pscreen) 804{ 805 struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache; 806 807 cache->ht = _mesa_hash_table_create(NULL, gmem_key_hash, gmem_key_equals); 808 list_inithead(&cache->lru); 809} 810 811void 812fd_gmem_screen_fini(struct pipe_screen *pscreen) 813{ 814 struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache; 815 816 _mesa_hash_table_destroy(cache->ht, NULL); 817} 818