i915_reg.h revision 4a49301e
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#ifndef I915_REG_H 30#define I915_REG_H 31 32 33#define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) 34 35#define CMD_3D (0x3<<29) 36 37#define PRIM3D_INLINE (CMD_3D | (0x1f<<24)) 38#define PRIM3D_TRILIST (0x0<<18) 39#define PRIM3D_TRISTRIP (0x1<<18) 40#define PRIM3D_TRISTRIP_RVRSE (0x2<<18) 41#define PRIM3D_TRIFAN (0x3<<18) 42#define PRIM3D_POLY (0x4<<18) 43#define PRIM3D_LINELIST (0x5<<18) 44#define PRIM3D_LINESTRIP (0x6<<18) 45#define PRIM3D_RECTLIST (0x7<<18) 46#define PRIM3D_POINTLIST (0x8<<18) 47#define PRIM3D_DIB (0x9<<18) 48#define PRIM3D_CLEAR_RECT (0xa<<18) 49#define PRIM3D_ZONE_INIT (0xd<<18) 50#define PRIM3D_MASK (0x1f<<18) 51 52/* p137 */ 53#define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) 54#define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) 55#define AA_LINE_ECAAR_WIDTH_0_5 0 56#define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) 57#define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) 58#define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) 59#define AA_LINE_REGION_WIDTH_ENABLE (1<<8) 60#define AA_LINE_REGION_WIDTH_0_5 0 61#define AA_LINE_REGION_WIDTH_1_0 (1<<6) 62#define AA_LINE_REGION_WIDTH_2_0 (2<<6) 63#define AA_LINE_REGION_WIDTH_4_0 (3<<6) 64 65/* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/ 66#define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24)) 67#define BFO_ENABLE_STENCIL_REF (1<<23) 68#define BFO_STENCIL_REF_SHIFT 15 69#define BFO_STENCIL_REF_MASK (0xff<<15) 70#define BFO_ENABLE_STENCIL_FUNCS (1<<14) 71#define BFO_STENCIL_TEST_SHIFT 11 72#define BFO_STENCIL_TEST_MASK (0x7<<11) 73#define BFO_STENCIL_FAIL_SHIFT 8 74#define BFO_STENCIL_FAIL_MASK (0x7<<8) 75#define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5 76#define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5) 77#define BFO_STENCIL_PASS_Z_PASS_SHIFT 2 78#define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2) 79#define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1) 80#define BFO_STENCIL_TWO_SIDE (1<<0) 81 82 83/* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */ 84#define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24)) 85#define BFM_ENABLE_STENCIL_TEST_MASK (1<<17) 86#define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16) 87#define BFM_STENCIL_TEST_MASK_SHIFT 8 88#define BFM_STENCIL_TEST_MASK_MASK (0xff<<8) 89#define BFM_STENCIL_WRITE_MASK_SHIFT 0 90#define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0) 91 92 93 94/* 3DSTATE_BIN_CONTROL p141 */ 95 96/* p143 */ 97#define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) 98/* Dword 1 */ 99#define BUF_3D_ID_COLOR_BACK (0x3<<24) 100#define BUF_3D_ID_DEPTH (0x7<<24) 101#define BUF_3D_USE_FENCE (1<<23) 102#define BUF_3D_TILED_SURFACE (1<<22) 103#define BUF_3D_TILE_WALK_X 0 104#define BUF_3D_TILE_WALK_Y (1<<21) 105#define BUF_3D_PITCH(x) (((x)/4)<<2) 106/* Dword 2 */ 107#define BUF_3D_ADDR(x) ((x) & ~0x3) 108 109 110/* 3DSTATE_CHROMA_KEY */ 111 112/* 3DSTATE_CLEAR_PARAMETERS, p150 */ 113#define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5) 114/* Dword 1 */ 115#define CLEARPARAM_CLEAR_RECT (1 << 16) 116#define CLEARPARAM_ZONE_INIT (0 << 16) 117#define CLEARPARAM_WRITE_COLOR (1 << 2) 118#define CLEARPARAM_WRITE_DEPTH (1 << 1) 119#define CLEARPARAM_WRITE_STENCIL (1 << 0) 120 121/* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */ 122#define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) 123 124 125 126/* 3DSTATE_COORD_SET_BINDINGS, p154 */ 127#define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24)) 128#define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3)) 129 130/* p156 */ 131#define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) 132 133/* p157 */ 134#define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) 135 136/* p158 */ 137#define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) 138 139 140/* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */ 141#define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16)) 142/* scale in dword 1 */ 143 144 145/* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */ 146#define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | 0x2) 147 148/* p161 */ 149#define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) 150/* Dword 1 */ 151#define TEX_DEFAULT_COLOR_OGL (0<<30) 152#define TEX_DEFAULT_COLOR_D3D (1<<30) 153#define ZR_EARLY_DEPTH (1<<29) 154#define LOD_PRECLAMP_OGL (1<<28) 155#define LOD_PRECLAMP_D3D (0<<28) 156#define DITHER_FULL_ALWAYS (0<<26) 157#define DITHER_FULL_ON_FB_BLEND (1<<26) 158#define DITHER_CLAMPED_ALWAYS (2<<26) 159#define LINEAR_GAMMA_BLEND_32BPP (1<<25) 160#define DEBUG_DISABLE_ENH_DITHER (1<<24) 161#define DSTORG_HORT_BIAS(x) ((x)<<20) 162#define DSTORG_VERT_BIAS(x) ((x)<<16) 163#define COLOR_4_2_2_CHNL_WRT_ALL 0 164#define COLOR_4_2_2_CHNL_WRT_Y (1<<12) 165#define COLOR_4_2_2_CHNL_WRT_CR (2<<12) 166#define COLOR_4_2_2_CHNL_WRT_CB (3<<12) 167#define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) 168#define COLOR_BUF_8BIT 0 169#define COLOR_BUF_RGB555 (1<<8) 170#define COLOR_BUF_RGB565 (2<<8) 171#define COLOR_BUF_ARGB8888 (3<<8) 172#define DEPTH_FRMT_16_FIXED 0 173#define DEPTH_FRMT_16_FLOAT (1<<2) 174#define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) 175#define VERT_LINE_STRIDE_1 (1<<1) 176#define VERT_LINE_STRIDE_0 (0<<1) 177#define VERT_LINE_STRIDE_OFS_1 1 178#define VERT_LINE_STRIDE_OFS_0 0 179 180/* p166 */ 181#define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) 182/* Dword 1 */ 183#define DRAW_RECT_DIS_DEPTH_OFS (1<<30) 184#define DRAW_DITHER_OFS_X(x) ((x)<<26) 185#define DRAW_DITHER_OFS_Y(x) ((x)<<24) 186/* Dword 2 */ 187#define DRAW_YMIN(x) ((x)<<16) 188#define DRAW_XMIN(x) (x) 189/* Dword 3 */ 190#define DRAW_YMAX(x) ((x)<<16) 191#define DRAW_XMAX(x) (x) 192/* Dword 4 */ 193#define DRAW_YORG(x) ((x)<<16) 194#define DRAW_XORG(x) (x) 195 196 197/* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */ 198 199/* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */ 200 201 202/* _3DSTATE_FOG_COLOR, p173 */ 203#define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) 204#define FOG_COLOR_RED(x) ((x)<<16) 205#define FOG_COLOR_GREEN(x) ((x)<<8) 206#define FOG_COLOR_BLUE(x) (x) 207 208/* _3DSTATE_FOG_MODE, p174 */ 209#define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) 210/* Dword 1 */ 211#define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31) 212#define FMC1_FOGFUNC_VERTEX (0<<28) 213#define FMC1_FOGFUNC_PIXEL_EXP (1<<28) 214#define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28) 215#define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28) 216#define FMC1_FOGFUNC_MASK (3<<28) 217#define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27) 218#define FMC1_FOGINDEX_Z (0<<25) 219#define FMC1_FOGINDEX_W (1<<25) 220#define FMC1_C1_C2_MODIFY_ENABLE (1<<24) 221#define FMC1_DENSITY_MODIFY_ENABLE (1<<23) 222#define FMC1_C1_ONE (1<<13) 223#define FMC1_C1_MASK (0xffff<<4) 224/* Dword 2 */ 225#define FMC2_C2_ONE (1<<16) 226/* Dword 3 */ 227#define FMC3_D_ONE (1<<16) 228 229 230 231/* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */ 232#define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) 233#define IAB_MODIFY_ENABLE (1<<23) 234#define IAB_ENABLE (1<<22) 235#define IAB_MODIFY_FUNC (1<<21) 236#define IAB_FUNC_SHIFT 16 237#define IAB_MODIFY_SRC_FACTOR (1<<11) 238#define IAB_SRC_FACTOR_SHIFT 6 239#define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6) 240#define IAB_MODIFY_DST_FACTOR (1<<5) 241#define IAB_DST_FACTOR_SHIFT 0 242#define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0) 243 244 245#define BLENDFUNC_ADD 0x0 246#define BLENDFUNC_SUBTRACT 0x1 247#define BLENDFUNC_REVERSE_SUBTRACT 0x2 248#define BLENDFUNC_MIN 0x3 249#define BLENDFUNC_MAX 0x4 250#define BLENDFUNC_MASK 0x7 251 252/* 3DSTATE_LOAD_INDIRECT, p180 */ 253 254#define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16)) 255#define LI0_STATE_STATIC_INDIRECT (0x01<<8) 256#define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8) 257#define LI0_STATE_SAMPLER (0x04<<8) 258#define LI0_STATE_MAP (0x08<<8) 259#define LI0_STATE_PROGRAM (0x10<<8) 260#define LI0_STATE_CONSTANTS (0x20<<8) 261 262#define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3) 263#define SIS0_FORCE_LOAD (1<<1) 264#define SIS0_BUFFER_VALID (1<<0) 265#define SIS1_BUFFER_LENGTH(x) ((x)&0xff) 266 267#define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3) 268#define DIS0_BUFFER_RESET (1<<1) 269#define DIS0_BUFFER_VALID (1<<0) 270 271#define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3) 272#define SSB0_FORCE_LOAD (1<<1) 273#define SSB0_BUFFER_VALID (1<<0) 274#define SSB1_BUFFER_LENGTH(x) ((x)&0xff) 275 276#define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3) 277#define MSB0_FORCE_LOAD (1<<1) 278#define MSB0_BUFFER_VALID (1<<0) 279#define MSB1_BUFFER_LENGTH(x) ((x)&0xff) 280 281#define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3) 282#define PSP0_FORCE_LOAD (1<<1) 283#define PSP0_BUFFER_VALID (1<<0) 284#define PSP1_BUFFER_LENGTH(x) ((x)&0xff) 285 286#define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3) 287#define PSC0_FORCE_LOAD (1<<1) 288#define PSC0_BUFFER_VALID (1<<0) 289#define PSC1_BUFFER_LENGTH(x) ((x)&0xff) 290 291 292 293 294 295/* _3DSTATE_RASTERIZATION_RULES */ 296#define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) 297#define ENABLE_POINT_RASTER_RULE (1<<15) 298#define OGL_POINT_RASTER_RULE (1<<13) 299#define ENABLE_TEXKILL_3D_4D (1<<10) 300#define TEXKILL_3D (0<<9) 301#define TEXKILL_4D (1<<9) 302#define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) 303#define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) 304#define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) 305#define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) 306 307/* _3DSTATE_SCISSOR_ENABLE, p256 */ 308#define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) 309#define ENABLE_SCISSOR_RECT ((1<<1) | 1) 310#define DISABLE_SCISSOR_RECT (1<<1) 311 312/* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */ 313#define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) 314/* Dword 1 */ 315#define SCISSOR_RECT_0_YMIN(x) ((x)<<16) 316#define SCISSOR_RECT_0_XMIN(x) (x) 317/* Dword 2 */ 318#define SCISSOR_RECT_0_YMAX(x) ((x)<<16) 319#define SCISSOR_RECT_0_XMAX(x) (x) 320 321/* p189 */ 322#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16)) 323#define I1_LOAD_S(n) (1<<(4+n)) 324 325#define S0_VB_OFFSET_MASK 0xffffffc 326#define S0_AUTO_CACHE_INV_DISABLE (1<<0) 327 328#define S1_VERTEX_WIDTH_SHIFT 24 329#define S1_VERTEX_WIDTH_MASK (0x3f<<24) 330#define S1_VERTEX_PITCH_SHIFT 16 331#define S1_VERTEX_PITCH_MASK (0x3f<<16) 332 333#define TEXCOORDFMT_2D 0x0 334#define TEXCOORDFMT_3D 0x1 335#define TEXCOORDFMT_4D 0x2 336#define TEXCOORDFMT_1D 0x3 337#define TEXCOORDFMT_2D_16 0x4 338#define TEXCOORDFMT_4D_16 0x5 339#define TEXCOORDFMT_NOT_PRESENT 0xf 340#define S2_TEXCOORD_FMT0_MASK 0xf 341#define S2_TEXCOORD_FMT1_SHIFT 4 342#define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) 343#define S2_TEXCOORD_NONE (~0) 344 345/* S3 not interesting */ 346 347#define S4_POINT_WIDTH_SHIFT 23 348#define S4_POINT_WIDTH_MASK (0x1ff<<23) 349#define S4_LINE_WIDTH_SHIFT 19 350#define S4_LINE_WIDTH_ONE (0x2<<19) 351#define S4_LINE_WIDTH_MASK (0xf<<19) 352#define S4_FLATSHADE_ALPHA (1<<18) 353#define S4_FLATSHADE_FOG (1<<17) 354#define S4_FLATSHADE_SPECULAR (1<<16) 355#define S4_FLATSHADE_COLOR (1<<15) 356#define S4_CULLMODE_BOTH (0<<13) 357#define S4_CULLMODE_NONE (1<<13) 358#define S4_CULLMODE_CW (2<<13) 359#define S4_CULLMODE_CCW (3<<13) 360#define S4_CULLMODE_MASK (3<<13) 361#define S4_VFMT_POINT_WIDTH (1<<12) 362#define S4_VFMT_SPEC_FOG (1<<11) 363#define S4_VFMT_COLOR (1<<10) 364#define S4_VFMT_DEPTH_OFFSET (1<<9) 365#define S4_VFMT_XYZ (1<<6) 366#define S4_VFMT_XYZW (2<<6) 367#define S4_VFMT_XY (3<<6) 368#define S4_VFMT_XYW (4<<6) 369#define S4_VFMT_XYZW_MASK (7<<6) 370#define S4_FORCE_DEFAULT_DIFFUSE (1<<5) 371#define S4_FORCE_DEFAULT_SPECULAR (1<<4) 372#define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) 373#define S4_VFMT_FOG_PARAM (1<<2) 374#define S4_SPRITE_POINT_ENABLE (1<<1) 375#define S4_LINE_ANTIALIAS_ENABLE (1<<0) 376 377#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \ 378 S4_VFMT_SPEC_FOG | \ 379 S4_VFMT_COLOR | \ 380 S4_VFMT_DEPTH_OFFSET | \ 381 S4_VFMT_XYZW_MASK | \ 382 S4_VFMT_FOG_PARAM) 383 384 385#define S5_WRITEDISABLE_ALPHA (1<<31) 386#define S5_WRITEDISABLE_RED (1<<30) 387#define S5_WRITEDISABLE_GREEN (1<<29) 388#define S5_WRITEDISABLE_BLUE (1<<28) 389#define S5_WRITEDISABLE_MASK (0xf<<28) 390#define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) 391#define S5_LAST_PIXEL_ENABLE (1<<26) 392#define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) 393#define S5_FOG_ENABLE (1<<24) 394#define S5_STENCIL_REF_SHIFT 16 395#define S5_STENCIL_REF_MASK (0xff<<16) 396#define S5_STENCIL_TEST_FUNC_SHIFT 13 397#define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) 398#define S5_STENCIL_FAIL_SHIFT 10 399#define S5_STENCIL_FAIL_MASK (0x7<<10) 400#define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 401#define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) 402#define S5_STENCIL_PASS_Z_PASS_SHIFT 4 403#define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) 404#define S5_STENCIL_WRITE_ENABLE (1<<3) 405#define S5_STENCIL_TEST_ENABLE (1<<2) 406#define S5_COLOR_DITHER_ENABLE (1<<1) 407#define S5_LOGICOP_ENABLE (1<<0) 408 409 410#define S6_ALPHA_TEST_ENABLE (1<<31) 411#define S6_ALPHA_TEST_FUNC_SHIFT 28 412#define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) 413#define S6_ALPHA_REF_SHIFT 20 414#define S6_ALPHA_REF_MASK (0xff<<20) 415#define S6_DEPTH_TEST_ENABLE (1<<19) 416#define S6_DEPTH_TEST_FUNC_SHIFT 16 417#define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) 418#define S6_CBUF_BLEND_ENABLE (1<<15) 419#define S6_CBUF_BLEND_FUNC_SHIFT 12 420#define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) 421#define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 422#define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) 423#define S6_CBUF_DST_BLEND_FACT_SHIFT 4 424#define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) 425#define S6_DEPTH_WRITE_ENABLE (1<<3) 426#define S6_COLOR_WRITE_ENABLE (1<<2) 427#define S6_TRISTRIP_PV_SHIFT 0 428#define S6_TRISTRIP_PV_MASK (0x3<<0) 429 430#define S7_DEPTH_OFFSET_CONST_MASK ~0 431 432 433 434#define DST_BLND_FACT(f) ((f)<<S6_CBUF_DST_BLEND_FACT_SHIFT) 435#define SRC_BLND_FACT(f) ((f)<<S6_CBUF_SRC_BLEND_FACT_SHIFT) 436#define DST_ABLND_FACT(f) ((f)<<IAB_DST_FACTOR_SHIFT) 437#define SRC_ABLND_FACT(f) ((f)<<IAB_SRC_FACTOR_SHIFT) 438 439 440 441 442/* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */ 443 444/* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */ 445#define _3DSTATE_MAP_PALETTE_LOAD_32 (CMD_3D|(0x1d<<24)|(0x8f<<16)) 446/* subsequent dwords up to length (max 16) are ARGB8888 color values */ 447 448/* _3DSTATE_MODES_4, p218 */ 449#define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24)) 450#define ENABLE_LOGIC_OP_FUNC (1<<23) 451#define LOGIC_OP_FUNC(x) ((x)<<18) 452#define LOGICOP_MASK (0xf<<18) 453#define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) 454#define ENABLE_STENCIL_TEST_MASK (1<<17) 455#define STENCIL_TEST_MASK(x) (((x)&0xff)<<8) 456#define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) 457#define ENABLE_STENCIL_WRITE_MASK (1<<16) 458#define STENCIL_WRITE_MASK(x) ((x)&0xff) 459 460/* _3DSTATE_MODES_5, p220 */ 461#define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) 462#define PIPELINE_FLUSH_RENDER_CACHE (1<<18) 463#define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) 464 465 466/* p221 */ 467#define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16)) 468#define PS1_REG(n) (1<<(n)) 469#define PS2_CONST_X(n) (n) 470#define PS3_CONST_Y(n) (n) 471#define PS4_CONST_Z(n) (n) 472#define PS5_CONST_W(n) (n) 473 474/* p222 */ 475 476 477#define I915_MAX_TEX_INDIRECT 4 478#define I915_MAX_TEX_INSN 32 479#define I915_MAX_ALU_INSN 64 480#define I915_MAX_DECL_INSN 27 481#define I915_MAX_TEMPORARY 16 482 483 484/* Each instruction is 3 dwords long, though most don't require all 485 * this space. Maximum of 123 instructions. Smaller maxes per insn 486 * type. 487 */ 488#define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) 489 490#define REG_TYPE_R 0 /* temporary regs, no need to 491 * dcl, must be written before 492 * read -- Preserved between 493 * phases. 494 */ 495#define REG_TYPE_T 1 /* Interpolated values, must be 496 * dcl'ed before use. 497 * 498 * 0..7: texture coord, 499 * 8: diffuse spec, 500 * 9: specular color, 501 * 10: fog parameter in w. 502 */ 503#define REG_TYPE_CONST 2 /* Restriction: only one const 504 * can be referenced per 505 * instruction, though it may be 506 * selected for multiple inputs. 507 * Constants not initialized 508 * default to zero. 509 */ 510#define REG_TYPE_S 3 /* sampler */ 511#define REG_TYPE_OC 4 /* output color (rgba) */ 512#define REG_TYPE_OD 5 /* output depth (w), xyz are 513 * temporaries. If not written, 514 * interpolated depth is used? 515 */ 516#define REG_TYPE_U 6 /* unpreserved temporaries */ 517#define REG_TYPE_MASK 0x7 518#define REG_NR_MASK 0xf 519 520 521/* REG_TYPE_T: 522 */ 523#define T_TEX0 0 524#define T_TEX1 1 525#define T_TEX2 2 526#define T_TEX3 3 527#define T_TEX4 4 528#define T_TEX5 5 529#define T_TEX6 6 530#define T_TEX7 7 531#define T_DIFFUSE 8 532#define T_SPECULAR 9 533#define T_FOG_W 10 /* interpolated fog is in W coord */ 534 535/* Arithmetic instructions */ 536 537/* .replicate_swizzle == selection and replication of a particular 538 * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww 539 */ 540#define A0_NOP (0x0<<24) /* no operation */ 541#define A0_ADD (0x1<<24) /* dst = src0 + src1 */ 542#define A0_MOV (0x2<<24) /* dst = src0 */ 543#define A0_MUL (0x3<<24) /* dst = src0 * src1 */ 544#define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ 545#define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ 546#define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ 547#define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ 548#define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ 549#define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ 550#define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ 551#define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ 552#define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ 553#define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ 554#define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ 555#define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ 556#define A0_FLR (0x10<<24) /* dst = floor(src0) */ 557#define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ 558#define A0_TRC (0x12<<24) /* dst = int(src0) */ 559#define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ 560#define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ 561#define A0_DEST_SATURATE (1<<22) 562#define A0_DEST_TYPE_SHIFT 19 563/* Allow: R, OC, OD, U */ 564#define A0_DEST_NR_SHIFT 14 565/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ 566#define A0_DEST_CHANNEL_X (1<<10) 567#define A0_DEST_CHANNEL_Y (2<<10) 568#define A0_DEST_CHANNEL_Z (4<<10) 569#define A0_DEST_CHANNEL_W (8<<10) 570#define A0_DEST_CHANNEL_ALL (0xf<<10) 571#define A0_DEST_CHANNEL_SHIFT 10 572#define A0_SRC0_TYPE_SHIFT 7 573#define A0_SRC0_NR_SHIFT 2 574 575#define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) 576#define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) 577 578 579#define SRC_X 0 580#define SRC_Y 1 581#define SRC_Z 2 582#define SRC_W 3 583#define SRC_ZERO 4 584#define SRC_ONE 5 585 586#define A1_SRC0_CHANNEL_X_NEGATE (1<<31) 587#define A1_SRC0_CHANNEL_X_SHIFT 28 588#define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) 589#define A1_SRC0_CHANNEL_Y_SHIFT 24 590#define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) 591#define A1_SRC0_CHANNEL_Z_SHIFT 20 592#define A1_SRC0_CHANNEL_W_NEGATE (1<<19) 593#define A1_SRC0_CHANNEL_W_SHIFT 16 594#define A1_SRC1_TYPE_SHIFT 13 595#define A1_SRC1_NR_SHIFT 8 596#define A1_SRC1_CHANNEL_X_NEGATE (1<<7) 597#define A1_SRC1_CHANNEL_X_SHIFT 4 598#define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) 599#define A1_SRC1_CHANNEL_Y_SHIFT 0 600 601#define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) 602#define A2_SRC1_CHANNEL_Z_SHIFT 28 603#define A2_SRC1_CHANNEL_W_NEGATE (1<<27) 604#define A2_SRC1_CHANNEL_W_SHIFT 24 605#define A2_SRC2_TYPE_SHIFT 21 606#define A2_SRC2_NR_SHIFT 16 607#define A2_SRC2_CHANNEL_X_NEGATE (1<<15) 608#define A2_SRC2_CHANNEL_X_SHIFT 12 609#define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) 610#define A2_SRC2_CHANNEL_Y_SHIFT 8 611#define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) 612#define A2_SRC2_CHANNEL_Z_SHIFT 4 613#define A2_SRC2_CHANNEL_W_NEGATE (1<<3) 614#define A2_SRC2_CHANNEL_W_SHIFT 0 615 616 617 618/* Texture instructions */ 619#define T0_TEXLD (0x15<<24) /* Sample texture using predeclared 620 * sampler and address, and output 621 * filtered texel data to destination 622 * register */ 623#define T0_TEXLDP (0x16<<24) /* Same as texld but performs a 624 * perspective divide of the texture 625 * coordinate .xyz values by .w before 626 * sampling. */ 627#define T0_TEXLDB (0x17<<24) /* Same as texld but biases the 628 * computed LOD by w. Only S4.6 two's 629 * comp is used. This implies that a 630 * float to fixed conversion is 631 * done. */ 632#define T0_TEXKILL (0x18<<24) /* Does not perform a sampling 633 * operation. Simply kills the pixel 634 * if any channel of the address 635 * register is < 0.0. */ 636#define T0_DEST_TYPE_SHIFT 19 637/* Allow: R, OC, OD, U */ 638/* Note: U (unpreserved) regs do not retain their values between 639 * phases (cannot be used for feedback) 640 * 641 * Note: oC and OD registers can only be used as the destination of a 642 * texture instruction once per phase (this is an implementation 643 * restriction). 644 */ 645#define T0_DEST_NR_SHIFT 14 646/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ 647#define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ 648#define T0_SAMPLER_NR_MASK (0xf<<0) 649 650#define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ 651/* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ 652#define T1_ADDRESS_REG_NR_SHIFT 17 653#define T2_MBZ 0 654 655/* Declaration instructions */ 656#define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) 657 * register or an s (sampler) 658 * register. */ 659#define D0_SAMPLE_TYPE_SHIFT 22 660#define D0_SAMPLE_TYPE_2D (0x0<<22) 661#define D0_SAMPLE_TYPE_CUBE (0x1<<22) 662#define D0_SAMPLE_TYPE_VOLUME (0x2<<22) 663#define D0_SAMPLE_TYPE_MASK (0x3<<22) 664 665#define D0_TYPE_SHIFT 19 666/* Allow: T, S */ 667#define D0_NR_SHIFT 14 668/* Allow T: 0..10, S: 0..15 */ 669#define D0_CHANNEL_X (1<<10) 670#define D0_CHANNEL_Y (2<<10) 671#define D0_CHANNEL_Z (4<<10) 672#define D0_CHANNEL_W (8<<10) 673#define D0_CHANNEL_ALL (0xf<<10) 674#define D0_CHANNEL_NONE (0<<10) 675 676#define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) 677#define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) 678 679/* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse 680 * or specular declarations. 681 * 682 * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) 683 * 684 * Must be zero for S (sampler) dcls 685 */ 686#define D1_MBZ 0 687#define D2_MBZ 0 688 689 690 691/* p207 */ 692#define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16)) 693 694#define MS1_MAPMASK_SHIFT 0 695#define MS1_MAPMASK_MASK (0x8fff<<0) 696 697#define MS2_UNTRUSTED_SURFACE (1<<31) 698#define MS2_ADDRESS_MASK 0xfffffffc 699#define MS2_VERTICAL_LINE_STRIDE (1<<1) 700#define MS2_VERTICAL_OFFSET (1<<1) 701 702#define MS3_HEIGHT_SHIFT 21 703#define MS3_WIDTH_SHIFT 10 704#define MS3_PALETTE_SELECT (1<<9) 705#define MS3_MAPSURF_FORMAT_SHIFT 7 706#define MS3_MAPSURF_FORMAT_MASK (0x7<<7) 707#define MAPSURF_8BIT (1<<7) 708#define MAPSURF_16BIT (2<<7) 709#define MAPSURF_32BIT (3<<7) 710#define MAPSURF_422 (5<<7) 711#define MAPSURF_COMPRESSED (6<<7) 712#define MAPSURF_4BIT_INDEXED (7<<7) 713#define MS3_MT_FORMAT_MASK (0x7 << 3) 714#define MS3_MT_FORMAT_SHIFT 3 715#define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ 716#define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ 717#define MT_8BIT_L8 (1<<3) 718#define MT_8BIT_A8 (4<<3) 719#define MT_8BIT_MONO8 (5<<3) 720#define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ 721#define MT_16BIT_ARGB1555 (1<<3) 722#define MT_16BIT_ARGB4444 (2<<3) 723#define MT_16BIT_AY88 (3<<3) 724#define MT_16BIT_88DVDU (5<<3) 725#define MT_16BIT_BUMP_655LDVDU (6<<3) 726#define MT_16BIT_I16 (7<<3) 727#define MT_16BIT_L16 (8<<3) 728#define MT_16BIT_A16 (9<<3) 729#define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ 730#define MT_32BIT_ABGR8888 (1<<3) 731#define MT_32BIT_XRGB8888 (2<<3) 732#define MT_32BIT_XBGR8888 (3<<3) 733#define MT_32BIT_QWVU8888 (4<<3) 734#define MT_32BIT_AXVU8888 (5<<3) 735#define MT_32BIT_LXVU8888 (6<<3) 736#define MT_32BIT_XLVU8888 (7<<3) 737#define MT_32BIT_ARGB2101010 (8<<3) 738#define MT_32BIT_ABGR2101010 (9<<3) 739#define MT_32BIT_AWVU2101010 (0xA<<3) 740#define MT_32BIT_GR1616 (0xB<<3) 741#define MT_32BIT_VU1616 (0xC<<3) 742#define MT_32BIT_xI824 (0xD<<3) 743#define MT_32BIT_xA824 (0xE<<3) 744#define MT_32BIT_xL824 (0xF<<3) 745#define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ 746#define MT_422_YCRCB_NORMAL (1<<3) 747#define MT_422_YCRCB_SWAPUV (2<<3) 748#define MT_422_YCRCB_SWAPUVY (3<<3) 749#define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ 750#define MT_COMPRESS_DXT2_3 (1<<3) 751#define MT_COMPRESS_DXT4_5 (2<<3) 752#define MT_COMPRESS_FXT1 (3<<3) 753#define MT_COMPRESS_DXT1_RGB (4<<3) 754#define MS3_USE_FENCE_REGS (1<<2) 755#define MS3_TILED_SURFACE (1<<1) 756#define MS3_TILE_WALK (1<<0) 757 758#define MS4_PITCH_SHIFT 21 759#define MS4_CUBE_FACE_ENA_NEGX (1<<20) 760#define MS4_CUBE_FACE_ENA_POSX (1<<19) 761#define MS4_CUBE_FACE_ENA_NEGY (1<<18) 762#define MS4_CUBE_FACE_ENA_POSY (1<<17) 763#define MS4_CUBE_FACE_ENA_NEGZ (1<<16) 764#define MS4_CUBE_FACE_ENA_POSZ (1<<15) 765#define MS4_CUBE_FACE_ENA_MASK (0x3f<<15) 766#define MS4_MAX_LOD_SHIFT 9 767#define MS4_MAX_LOD_MASK (0x3f<<9) 768#define MS4_MIP_LAYOUT_LEGACY (0<<8) 769#define MS4_MIP_LAYOUT_BELOW_LPT (0<<8) 770#define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8) 771#define MS4_VOLUME_DEPTH_SHIFT 0 772#define MS4_VOLUME_DEPTH_MASK (0xff<<0) 773 774/* p244 */ 775#define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16)) 776 777#define SS1_MAPMASK_SHIFT 0 778#define SS1_MAPMASK_MASK (0x8fff<<0) 779 780#define SS2_REVERSE_GAMMA_ENABLE (1<<31) 781#define SS2_PACKED_TO_PLANAR_ENABLE (1<<30) 782#define SS2_COLORSPACE_CONVERSION (1<<29) 783#define SS2_CHROMAKEY_SHIFT 27 784#define SS2_BASE_MIP_LEVEL_SHIFT 22 785#define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22) 786#define SS2_MIP_FILTER_SHIFT 20 787#define SS2_MIP_FILTER_MASK (0x3<<20) 788#define MIPFILTER_NONE 0 789#define MIPFILTER_NEAREST 1 790#define MIPFILTER_LINEAR 3 791#define SS2_MAG_FILTER_SHIFT 17 792#define SS2_MAG_FILTER_MASK (0x7<<17) 793#define FILTER_NEAREST 0 794#define FILTER_LINEAR 1 795#define FILTER_ANISOTROPIC 2 796#define FILTER_4X4_1 3 797#define FILTER_4X4_2 4 798#define FILTER_4X4_FLAT 5 799#define FILTER_6X5_MONO 6 /* XXX - check */ 800#define SS2_MIN_FILTER_SHIFT 14 801#define SS2_MIN_FILTER_MASK (0x7<<14) 802#define SS2_LOD_BIAS_SHIFT 5 803#define SS2_LOD_BIAS_ONE (0x10<<5) 804#define SS2_LOD_BIAS_MASK (0x1ff<<5) 805/* Shadow requires: 806 * MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format 807 * FILTER_4X4_x MIN and MAG filters 808 */ 809#define SS2_SHADOW_ENABLE (1<<4) 810#define SS2_MAX_ANISO_MASK (1<<3) 811#define SS2_MAX_ANISO_2 (0<<3) 812#define SS2_MAX_ANISO_4 (1<<3) 813#define SS2_SHADOW_FUNC_SHIFT 0 814#define SS2_SHADOW_FUNC_MASK (0x7<<0) 815/* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */ 816 817#define SS3_MIN_LOD_SHIFT 24 818#define SS3_MIN_LOD_ONE (0x10<<24) 819#define SS3_MIN_LOD_MASK (0xff<<24) 820#define SS3_KILL_PIXEL_ENABLE (1<<17) 821#define SS3_TCX_ADDR_MODE_SHIFT 12 822#define SS3_TCX_ADDR_MODE_MASK (0x7<<12) 823#define TEXCOORDMODE_WRAP 0 824#define TEXCOORDMODE_MIRROR 1 825#define TEXCOORDMODE_CLAMP_EDGE 2 826#define TEXCOORDMODE_CUBE 3 827#define TEXCOORDMODE_CLAMP_BORDER 4 828#define TEXCOORDMODE_MIRROR_ONCE 5 829#define SS3_TCY_ADDR_MODE_SHIFT 9 830#define SS3_TCY_ADDR_MODE_MASK (0x7<<9) 831#define SS3_TCZ_ADDR_MODE_SHIFT 6 832#define SS3_TCZ_ADDR_MODE_MASK (0x7<<6) 833#define SS3_NORMALIZED_COORDS (1<<5) 834#define SS3_TEXTUREMAP_INDEX_SHIFT 1 835#define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1) 836#define SS3_DEINTERLACER_ENABLE (1<<0) 837 838#define SS4_BORDER_COLOR_MASK (~0) 839 840/* 3DSTATE_SPAN_STIPPLE, p258 841 */ 842#define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) 843#define ST1_ENABLE (1<<16) 844#define ST1_MASK (0xffff) 845 846#define _3DSTATE_DEFAULT_Z ((0x3<<29)|(0x1d<<24)|(0x98<<16)) 847#define _3DSTATE_DEFAULT_DIFFUSE ((0x3<<29)|(0x1d<<24)|(0x99<<16)) 848#define _3DSTATE_DEFAULT_SPECULAR ((0x3<<29)|(0x1d<<24)|(0x9a<<16)) 849 850 851#define MI_FLUSH ((0<<29)|(4<<23)) 852#define FLUSH_MAP_CACHE (1<<0) 853#define INHIBIT_FLUSH_RENDER_CACHE (1<<2) 854 855 856#define CMD_3D (0x3<<29) 857 858 859#define _3DPRIMITIVE ((0x3<<29)|(0x1f<<24)) 860#define PRIM_INDIRECT (1<<23) 861#define PRIM_INLINE (0<<23) 862#define PRIM_INDIRECT_SEQUENTIAL (0<<17) 863#define PRIM_INDIRECT_ELTS (1<<17) 864 865#define PRIM3D_TRILIST (0x0<<18) 866#define PRIM3D_TRISTRIP (0x1<<18) 867#define PRIM3D_TRISTRIP_RVRSE (0x2<<18) 868#define PRIM3D_TRIFAN (0x3<<18) 869#define PRIM3D_POLY (0x4<<18) 870#define PRIM3D_LINELIST (0x5<<18) 871#define PRIM3D_LINESTRIP (0x6<<18) 872#define PRIM3D_RECTLIST (0x7<<18) 873#define PRIM3D_POINTLIST (0x8<<18) 874#define PRIM3D_DIB (0x9<<18) 875#define PRIM3D_MASK (0x1f<<18) 876 877#define I915PACKCOLOR4444(r,g,b,a) \ 878 ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) 879 880#define I915PACKCOLOR1555(r,g,b,a) \ 881 ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \ 882 ((a) ? 0x8000 : 0)) 883 884#define I915PACKCOLOR565(r,g,b) \ 885 ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3)) 886 887#define I915PACKCOLOR8888(r,g,b,a) \ 888 ((a<<24) | (r<<16) | (g<<8) | b) 889 890 891 892 893#define BR00_BITBLT_CLIENT 0x40000000 894#define BR00_OP_COLOR_BLT 0x10000000 895#define BR00_OP_SRC_COPY_BLT 0x10C00000 896#define BR13_SOLID_PATTERN 0x80000000 897 898#define XY_COLOR_BLT_CMD ((2<<29)|(0x50<<22)|0x4) 899#define XY_COLOR_BLT_WRITE_ALPHA (1<<21) 900#define XY_COLOR_BLT_WRITE_RGB (1<<20) 901 902#define XY_SRC_COPY_BLT_CMD ((2<<29)|(0x53<<22)|6) 903#define XY_SRC_COPY_BLT_WRITE_ALPHA (1<<21) 904#define XY_SRC_COPY_BLT_WRITE_RGB (1<<20) 905 906#define MI_WAIT_FOR_EVENT ((0x3<<23)) 907#define MI_WAIT_FOR_PLANE_B_FLIP (1<<6) 908#define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) 909 910#define MI_BATCH_BUFFER (0x30<<23) 911#define MI_BATCH_BUFFER_START (0x31<<23) 912#define MI_BATCH_BUFFER_END (0xa<<23) 913 914 915 916#define COMPAREFUNC_ALWAYS 0 917#define COMPAREFUNC_NEVER 0x1 918#define COMPAREFUNC_LESS 0x2 919#define COMPAREFUNC_EQUAL 0x3 920#define COMPAREFUNC_LEQUAL 0x4 921#define COMPAREFUNC_GREATER 0x5 922#define COMPAREFUNC_NOTEQUAL 0x6 923#define COMPAREFUNC_GEQUAL 0x7 924 925#define STENCILOP_KEEP 0 926#define STENCILOP_ZERO 0x1 927#define STENCILOP_REPLACE 0x2 928#define STENCILOP_INCRSAT 0x3 929#define STENCILOP_DECRSAT 0x4 930#define STENCILOP_INCR 0x5 931#define STENCILOP_DECR 0x6 932#define STENCILOP_INVERT 0x7 933 934#define LOGICOP_CLEAR 0 935#define LOGICOP_NOR 0x1 936#define LOGICOP_AND_INV 0x2 937#define LOGICOP_COPY_INV 0x3 938#define LOGICOP_AND_RVRSE 0x4 939#define LOGICOP_INV 0x5 940#define LOGICOP_XOR 0x6 941#define LOGICOP_NAND 0x7 942#define LOGICOP_AND 0x8 943#define LOGICOP_EQUIV 0x9 944#define LOGICOP_NOOP 0xa 945#define LOGICOP_OR_INV 0xb 946#define LOGICOP_COPY 0xc 947#define LOGICOP_OR_RVRSE 0xd 948#define LOGICOP_OR 0xe 949#define LOGICOP_SET 0xf 950 951#define BLENDFACT_ZERO 0x01 952#define BLENDFACT_ONE 0x02 953#define BLENDFACT_SRC_COLR 0x03 954#define BLENDFACT_INV_SRC_COLR 0x04 955#define BLENDFACT_SRC_ALPHA 0x05 956#define BLENDFACT_INV_SRC_ALPHA 0x06 957#define BLENDFACT_DST_ALPHA 0x07 958#define BLENDFACT_INV_DST_ALPHA 0x08 959#define BLENDFACT_DST_COLR 0x09 960#define BLENDFACT_INV_DST_COLR 0x0a 961#define BLENDFACT_SRC_ALPHA_SATURATE 0x0b 962#define BLENDFACT_CONST_COLOR 0x0c 963#define BLENDFACT_INV_CONST_COLOR 0x0d 964#define BLENDFACT_CONST_ALPHA 0x0e 965#define BLENDFACT_INV_CONST_ALPHA 0x0f 966#define BLENDFACT_MASK 0x0f 967 968#define PCI_CHIP_I915_G 0x2582 969#define PCI_CHIP_I915_GM 0x2592 970#define PCI_CHIP_I945_G 0x2772 971#define PCI_CHIP_I945_GM 0x27A2 972#define PCI_CHIP_I945_GME 0x27AE 973#define PCI_CHIP_G33_G 0x29C2 974#define PCI_CHIP_Q35_G 0x29B2 975#define PCI_CHIP_Q33_G 0x29D2 976 977 978#endif 979