1/* 2 * Copyright © 2018 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 */ 23 24#include <gtest/gtest.h> 25#include "brw_vec4.h" 26#include "program/program.h" 27 28using namespace brw; 29 30class dead_code_eliminate_test : public ::testing::Test { 31 virtual void SetUp(); 32 virtual void TearDown(); 33 34public: 35 struct brw_compiler *compiler; 36 struct intel_device_info *devinfo; 37 void *ctx; 38 struct gl_shader_program *shader_prog; 39 struct brw_vue_prog_data *prog_data; 40 vec4_visitor *v; 41}; 42 43class dead_code_eliminate_vec4_visitor : public vec4_visitor 44{ 45public: 46 dead_code_eliminate_vec4_visitor(struct brw_compiler *compiler, 47 void *mem_ctx, 48 nir_shader *shader, 49 struct brw_vue_prog_data *prog_data) 50 : vec4_visitor(compiler, NULL, NULL, prog_data, shader, mem_ctx, 51 false /* no_spills */, -1, false) 52 { 53 prog_data->dispatch_mode = DISPATCH_MODE_4X2_DUAL_OBJECT; 54 } 55 56protected: 57 virtual dst_reg *make_reg_for_system_value(int /* location */) 58 { 59 unreachable("Not reached"); 60 } 61 62 virtual void setup_payload() 63 { 64 unreachable("Not reached"); 65 } 66 67 virtual void emit_prolog() 68 { 69 unreachable("Not reached"); 70 } 71 72 virtual void emit_thread_end() 73 { 74 unreachable("Not reached"); 75 } 76 77 virtual void emit_urb_write_header(int /* mrf */) 78 { 79 unreachable("Not reached"); 80 } 81 82 virtual vec4_instruction *emit_urb_write_opcode(bool /* complete */) 83 { 84 unreachable("Not reached"); 85 } 86}; 87 88 89void dead_code_eliminate_test::SetUp() 90{ 91 ctx = ralloc_context(NULL); 92 compiler = rzalloc(ctx, struct brw_compiler); 93 devinfo = rzalloc(ctx, struct intel_device_info); 94 compiler->devinfo = devinfo; 95 96 prog_data = ralloc(ctx, struct brw_vue_prog_data); 97 nir_shader *shader = 98 nir_shader_create(ctx, MESA_SHADER_VERTEX, NULL, NULL); 99 100 v = new dead_code_eliminate_vec4_visitor(compiler, ctx, shader, prog_data); 101 102 devinfo->ver = 4; 103 devinfo->verx10 = devinfo->ver * 10; 104} 105 106void dead_code_eliminate_test::TearDown() 107{ 108 delete v; 109 v = NULL; 110 111 ralloc_free(ctx); 112 ctx = NULL; 113} 114 115static void 116dead_code_eliminate(vec4_visitor *v) 117{ 118 const bool print = getenv("TEST_DEBUG"); 119 120 if (print) { 121 fprintf(stderr, "instructions before:\n"); 122 v->dump_instructions(); 123 } 124 125 v->calculate_cfg(); 126 v->dead_code_eliminate(); 127 128 if (print) { 129 fprintf(stderr, "instructions after:\n"); 130 v->dump_instructions(); 131 } 132} 133 134TEST_F(dead_code_eliminate_test, some_dead_channels_all_flags_used) 135{ 136 const vec4_builder bld = vec4_builder(v).at_end(); 137 src_reg r1 = src_reg(v, glsl_type::vec4_type); 138 src_reg r2 = src_reg(v, glsl_type::vec4_type); 139 src_reg r3 = src_reg(v, glsl_type::vec4_type); 140 src_reg r4 = src_reg(v, glsl_type::vec4_type); 141 src_reg r5 = src_reg(v, glsl_type::vec4_type); 142 src_reg r6 = src_reg(v, glsl_type::vec4_type); 143 144 /* Sequence like the following should not be modified by DCE. 145 * 146 * cmp.l.f0(8) g4<1>F g2<4,4,1>.wF g1<4,4,1>.xF 147 * mov(8) g5<1>.xF g4<4,4,1>.xF 148 * (+f0.x) sel(8) g6<1>UD g3<4>UD g6<4>UD 149 */ 150 vec4_instruction *test_cmp = 151 bld.CMP(dst_reg(r4), r2, r1, BRW_CONDITIONAL_L); 152 153 test_cmp->src[0].swizzle = BRW_SWIZZLE_WWWW; 154 test_cmp->src[1].swizzle = BRW_SWIZZLE_XXXX; 155 156 vec4_instruction *test_mov = 157 bld.MOV(dst_reg(r5), r4); 158 159 test_mov->dst.writemask = WRITEMASK_X; 160 test_mov->src[0].swizzle = BRW_SWIZZLE_XXXX; 161 162 vec4_instruction *test_sel = 163 bld.SEL(dst_reg(r6), r3, r6); 164 165 set_predicate(BRW_PREDICATE_NORMAL, test_sel); 166 167 /* The scratch write is here just to make r5 and r6 be live so that the 168 * whole program doesn't get eliminated by DCE. 169 */ 170 v->emit(v->SCRATCH_WRITE(dst_reg(r4), r6, r5)); 171 172 dead_code_eliminate(v); 173 174 EXPECT_EQ(test_cmp->dst.writemask, WRITEMASK_XYZW); 175} 176