17ec681f3Smrg/* 27ec681f3Smrg * Copyright 2003 VMware, Inc. 37ec681f3Smrg * Copyright © 2007 Intel Corporation 47ec681f3Smrg * 57ec681f3Smrg * Permission is hereby granted, free of charge, to any person obtaining 67ec681f3Smrg * a copy of this software and associated documentation files (the 77ec681f3Smrg * "Software"), to deal in the Software without restriction, including 87ec681f3Smrg * without limitation the rights to use, copy, modify, merge, publish, 97ec681f3Smrg * distribute, sublicense, and/or sell copies of the Software, and to 107ec681f3Smrg * permit persons to whom the Software is furnished to do so, subject to 117ec681f3Smrg * the following conditions: 127ec681f3Smrg * 137ec681f3Smrg * The above copyright notice and this permission notice (including the 147ec681f3Smrg * next paragraph) shall be included in all copies or substantial 157ec681f3Smrg * portions of the Software. 167ec681f3Smrg * 177ec681f3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 187ec681f3Smrg * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 197ec681f3Smrg * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 207ec681f3Smrg * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 217ec681f3Smrg * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 227ec681f3Smrg * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 237ec681f3Smrg * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 247ec681f3Smrg */ 257ec681f3Smrg 267ec681f3Smrg#ifndef INTEL_DEBUG_H 277ec681f3Smrg#define INTEL_DEBUG_H 287ec681f3Smrg 297ec681f3Smrg#include <stdint.h> 307ec681f3Smrg#include "compiler/shader_enums.h" 317ec681f3Smrg#include "util/macros.h" 327ec681f3Smrg 337ec681f3Smrg#ifdef __cplusplus 347ec681f3Smrgextern "C" { 357ec681f3Smrg#endif 367ec681f3Smrg/** 377ec681f3Smrg * \file intel_debug.h 387ec681f3Smrg * 397ec681f3Smrg * Basic INTEL_DEBUG environment variable handling. This file defines the 407ec681f3Smrg * list of debugging flags, as well as some macros for handling them. 417ec681f3Smrg */ 427ec681f3Smrg 437ec681f3Smrgextern uint64_t intel_debug; 447ec681f3Smrg 457ec681f3Smrg/* Returns 0/1, not the matching bit mask. */ 467ec681f3Smrg#define INTEL_DEBUG(flags) unlikely(intel_debug & (flags)) 477ec681f3Smrg 487ec681f3Smrg#define DEBUG_TEXTURE (1ull << 0) 497ec681f3Smrg#define DEBUG_STATE (1ull << 1) 507ec681f3Smrg#define DEBUG_BLIT (1ull << 2) 517ec681f3Smrg#define DEBUG_MIPTREE (1ull << 3) 527ec681f3Smrg#define DEBUG_PERF (1ull << 4) 537ec681f3Smrg#define DEBUG_PERFMON (1ull << 5) 547ec681f3Smrg#define DEBUG_BATCH (1ull << 6) 557ec681f3Smrg#define DEBUG_PIXEL (1ull << 7) 567ec681f3Smrg#define DEBUG_BUFMGR (1ull << 8) 577ec681f3Smrg#define DEBUG_FBO (1ull << 9) 587ec681f3Smrg#define DEBUG_GS (1ull << 10) 597ec681f3Smrg#define DEBUG_SYNC (1ull << 11) 607ec681f3Smrg#define DEBUG_PRIMS (1ull << 12) 617ec681f3Smrg#define DEBUG_VERTS (1ull << 13) 627ec681f3Smrg#define DEBUG_DRI (1ull << 14) 637ec681f3Smrg#define DEBUG_SF (1ull << 15) 647ec681f3Smrg#define DEBUG_SUBMIT (1ull << 16) 657ec681f3Smrg#define DEBUG_WM (1ull << 17) 667ec681f3Smrg#define DEBUG_URB (1ull << 18) 677ec681f3Smrg#define DEBUG_VS (1ull << 19) 687ec681f3Smrg#define DEBUG_CLIP (1ull << 20) 697ec681f3Smrg#define DEBUG_SHADER_TIME (1ull << 21) 707ec681f3Smrg#define DEBUG_BLORP (1ull << 22) 717ec681f3Smrg#define DEBUG_NO16 (1ull << 23) 727ec681f3Smrg#define DEBUG_NO_DUAL_OBJECT_GS (1ull << 24) 737ec681f3Smrg#define DEBUG_OPTIMIZER (1ull << 25) 747ec681f3Smrg#define DEBUG_ANNOTATION (1ull << 26) 757ec681f3Smrg#define DEBUG_NO8 (1ull << 27) 767ec681f3Smrg#define DEBUG_NO_OACONFIG (1ull << 28) 777ec681f3Smrg#define DEBUG_SPILL_FS (1ull << 29) 787ec681f3Smrg#define DEBUG_SPILL_VEC4 (1ull << 30) 797ec681f3Smrg#define DEBUG_CS (1ull << 31) 807ec681f3Smrg#define DEBUG_HEX (1ull << 32) 817ec681f3Smrg#define DEBUG_NO_COMPACTION (1ull << 33) 827ec681f3Smrg#define DEBUG_TCS (1ull << 34) 837ec681f3Smrg#define DEBUG_TES (1ull << 35) 847ec681f3Smrg#define DEBUG_L3 (1ull << 36) 857ec681f3Smrg#define DEBUG_DO32 (1ull << 37) 867ec681f3Smrg#define DEBUG_NO_RBC (1ull << 38) 877ec681f3Smrg#define DEBUG_NO_HIZ (1ull << 39) 887ec681f3Smrg#define DEBUG_COLOR (1ull << 40) 897ec681f3Smrg#define DEBUG_REEMIT (1ull << 41) 907ec681f3Smrg#define DEBUG_SOFT64 (1ull << 42) 917ec681f3Smrg#define DEBUG_TCS_EIGHT_PATCH (1ull << 43) 927ec681f3Smrg#define DEBUG_BT (1ull << 44) 937ec681f3Smrg#define DEBUG_PIPE_CONTROL (1ull << 45) 947ec681f3Smrg#define DEBUG_NO_FAST_CLEAR (1ull << 46) 957ec681f3Smrg#define DEBUG_NO32 (1ull << 47) 967ec681f3Smrg#define DEBUG_RT (1ull << 48) 977ec681f3Smrg 987ec681f3Smrg#define DEBUG_ANY (~0ull) 997ec681f3Smrg 1007ec681f3Smrg/* These flags are not compatible with the disk shader cache */ 1017ec681f3Smrg#define DEBUG_DISK_CACHE_DISABLE_MASK DEBUG_SHADER_TIME 1027ec681f3Smrg 1037ec681f3Smrg/* These flags may affect program generation */ 1047ec681f3Smrg#define DEBUG_DISK_CACHE_MASK \ 1057ec681f3Smrg (DEBUG_NO16 | DEBUG_NO_DUAL_OBJECT_GS | DEBUG_NO8 | DEBUG_SPILL_FS | \ 1067ec681f3Smrg DEBUG_SPILL_VEC4 | DEBUG_NO_COMPACTION | DEBUG_DO32 | DEBUG_SOFT64 | \ 1077ec681f3Smrg DEBUG_TCS_EIGHT_PATCH | DEBUG_NO32) 1087ec681f3Smrg 1097ec681f3Smrg#ifdef HAVE_ANDROID_PLATFORM 1107ec681f3Smrg#define LOG_TAG "INTEL-MESA" 1117ec681f3Smrg#if ANDROID_API_LEVEL >= 26 1127ec681f3Smrg#include <log/log.h> 1137ec681f3Smrg#else 1147ec681f3Smrg#include <cutils/log.h> 1157ec681f3Smrg#endif /* use log/log.h start from android 8 major version */ 1167ec681f3Smrg#ifndef ALOGW 1177ec681f3Smrg#define ALOGW LOGW 1187ec681f3Smrg#endif 1197ec681f3Smrg#define dbg_printf(...) ALOGW(__VA_ARGS__) 1207ec681f3Smrg#else 1217ec681f3Smrg#define dbg_printf(...) fprintf(stderr, __VA_ARGS__) 1227ec681f3Smrg#endif /* HAVE_ANDROID_PLATFORM */ 1237ec681f3Smrg 1247ec681f3Smrg#define DBG(...) do { \ 1257ec681f3Smrg if (INTEL_DEBUG(FILE_DEBUG_FLAG)) \ 1267ec681f3Smrg dbg_printf(__VA_ARGS__); \ 1277ec681f3Smrg} while(0) 1287ec681f3Smrg 1297ec681f3Smrgextern uint64_t intel_debug_flag_for_shader_stage(gl_shader_stage stage); 1307ec681f3Smrg 1317ec681f3Smrgextern void brw_process_intel_debug_variable(void); 1327ec681f3Smrg 1337ec681f3Smrg/* Below is a list of structure located in the identifier buffer. The driver 1347ec681f3Smrg * can fill those in for debug purposes. 1357ec681f3Smrg */ 1367ec681f3Smrg 1377ec681f3Smrgenum intel_debug_block_type { 1387ec681f3Smrg /* End of the debug blocks */ 1397ec681f3Smrg INTEL_DEBUG_BLOCK_TYPE_END = 1, 1407ec681f3Smrg 1417ec681f3Smrg /* Driver identifier (struct intel_debug_block_driver) */ 1427ec681f3Smrg INTEL_DEBUG_BLOCK_TYPE_DRIVER, 1437ec681f3Smrg 1447ec681f3Smrg /* Frame identifier (struct intel_debug_block_frame) */ 1457ec681f3Smrg INTEL_DEBUG_BLOCK_TYPE_FRAME, 1467ec681f3Smrg 1477ec681f3Smrg /* Internal, never to be written out */ 1487ec681f3Smrg INTEL_DEBUG_BLOCK_TYPE_MAX, 1497ec681f3Smrg}; 1507ec681f3Smrg 1517ec681f3Smrgstruct intel_debug_block_base { 1527ec681f3Smrg uint32_t type; /* enum intel_debug_block_type */ 1537ec681f3Smrg uint32_t length; /* inclusive of this structure size */ 1547ec681f3Smrg}; 1557ec681f3Smrg 1567ec681f3Smrgstruct intel_debug_block_driver { 1577ec681f3Smrg struct intel_debug_block_base base; 1587ec681f3Smrg uint8_t description[]; 1597ec681f3Smrg}; 1607ec681f3Smrg 1617ec681f3Smrgstruct intel_debug_block_frame { 1627ec681f3Smrg struct intel_debug_block_base base; 1637ec681f3Smrg uint64_t frame_id; 1647ec681f3Smrg}; 1657ec681f3Smrg 1667ec681f3Smrgextern void *intel_debug_identifier(void); 1677ec681f3Smrgextern uint32_t intel_debug_identifier_size(void); 1687ec681f3Smrg 1697ec681f3Smrgextern uint32_t intel_debug_write_identifiers(void *output, 1707ec681f3Smrg uint32_t output_size, 1717ec681f3Smrg const char *driver_name); 1727ec681f3Smrg 1737ec681f3Smrgextern void *intel_debug_get_identifier_block(void *buffer, 1747ec681f3Smrg uint32_t buffer_size, 1757ec681f3Smrg enum intel_debug_block_type type); 1767ec681f3Smrg 1777ec681f3Smrg#ifdef __cplusplus 1787ec681f3Smrg} 1797ec681f3Smrg#endif 1807ec681f3Smrg 1817ec681f3Smrg#endif /* INTEL_DEBUG_H */ 182