1/*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#include "brw_context.h"
25#include "compiler/brw_nir.h"
26#include "brw_program.h"
27#include "compiler/glsl/gl_nir.h"
28#include "compiler/glsl/gl_nir_linker.h"
29#include "compiler/glsl/ir.h"
30#include "compiler/glsl/ir_optimization.h"
31#include "compiler/glsl/program.h"
32#include "compiler/nir/nir_serialize.h"
33#include "program/program.h"
34#include "main/glspirv.h"
35#include "main/mtypes.h"
36#include "main/shaderapi.h"
37#include "main/shaderobj.h"
38#include "main/uniforms.h"
39
40/**
41 * Performs a compile of the shader stages even when we don't know
42 * what non-orthogonal state will be set, in the hope that it reflects
43 * the eventual NOS used, and thus allows us to produce link failures.
44 */
45static bool
46brw_shader_precompile(struct gl_context *ctx,
47                      struct gl_shader_program *sh_prog)
48{
49   struct gl_linked_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
50   struct gl_linked_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
51   struct gl_linked_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
52   struct gl_linked_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
53   struct gl_linked_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
54   struct gl_linked_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
55
56   if (fs && !brw_fs_precompile(ctx, fs->Program))
57      return false;
58
59   if (gs && !brw_gs_precompile(ctx, gs->Program))
60      return false;
61
62   if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program))
63      return false;
64
65   if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program))
66      return false;
67
68   if (vs && !brw_vs_precompile(ctx, vs->Program))
69      return false;
70
71   if (cs && !brw_cs_precompile(ctx, cs->Program))
72      return false;
73
74   return true;
75}
76
77static void
78brw_lower_packing_builtins(struct brw_context *brw,
79                           exec_list *ir)
80{
81   const struct intel_device_info *devinfo = &brw->screen->devinfo;
82
83   /* Gens < 7 don't have instructions to convert to or from half-precision,
84    * and Gens < 6 don't expose that functionality.
85    */
86   if (devinfo->ver != 6)
87      return;
88
89   lower_packing_builtins(ir, LOWER_PACK_HALF_2x16 | LOWER_UNPACK_HALF_2x16);
90}
91
92static void
93process_glsl_ir(struct brw_context *brw,
94                struct gl_shader_program *shader_prog,
95                struct gl_linked_shader *shader)
96{
97   const struct intel_device_info *devinfo = &brw->screen->devinfo;
98   struct gl_context *ctx = &brw->ctx;
99
100   /* Temporary memory context for any new IR. */
101   void *mem_ctx = ralloc_context(NULL);
102
103   ralloc_adopt(mem_ctx, shader->ir);
104
105   if (shader->Stage == MESA_SHADER_FRAGMENT) {
106      lower_blend_equation_advanced(
107         shader, ctx->Extensions.KHR_blend_equation_advanced_coherent);
108   }
109
110   /* lower_packing_builtins() inserts arithmetic instructions, so it
111    * must precede lower_instructions().
112    */
113   brw_lower_packing_builtins(brw, shader->ir);
114   do_mat_op_to_vec(shader->ir);
115
116   unsigned instructions_to_lower = (DIV_TO_MUL_RCP |
117                                     SUB_TO_ADD_NEG |
118                                     EXP_TO_EXP2 |
119                                     LOG_TO_LOG2 |
120                                     DFREXP_DLDEXP_TO_ARITH);
121   if (devinfo->ver < 7) {
122      instructions_to_lower |= BIT_COUNT_TO_MATH |
123                               EXTRACT_TO_SHIFTS |
124                               INSERT_TO_SHIFTS |
125                               REVERSE_TO_SHIFTS;
126   }
127
128   lower_instructions(shader->ir, instructions_to_lower);
129
130   /* Pre-gfx6 HW can only nest if-statements 16 deep.  Beyond this,
131    * if-statements need to be flattened.
132    */
133   if (devinfo->ver < 6)
134      lower_if_to_cond_assign(shader->Stage, shader->ir, 16);
135
136   do_vec_index_to_cond_assign(shader->ir);
137   lower_vector_insert(shader->ir, true);
138   lower_offset_arrays(shader->ir);
139   lower_quadop_vector(shader->ir, false);
140
141   validate_ir_tree(shader->ir);
142
143   /* Now that we've finished altering the linked IR, reparent any live IR back
144    * to the permanent memory context, and free the temporary one (discarding any
145    * junk we optimized away).
146    */
147   reparent_ir(shader->ir, shader->ir);
148   ralloc_free(mem_ctx);
149
150   if (ctx->_Shader->Flags & GLSL_DUMP) {
151      fprintf(stderr, "\n");
152      if (shader->ir) {
153         fprintf(stderr, "GLSL IR for linked %s program %d:\n",
154                 _mesa_shader_stage_to_string(shader->Stage),
155                 shader_prog->Name);
156         _mesa_print_ir(stderr, shader->ir, NULL);
157      } else {
158         fprintf(stderr, "No GLSL IR for linked %s program %d (shader may be "
159                 "from cache)\n", _mesa_shader_stage_to_string(shader->Stage),
160                 shader_prog->Name);
161      }
162      fprintf(stderr, "\n");
163   }
164}
165
166static void
167unify_interfaces(struct shader_info **infos)
168{
169   struct shader_info *prev_info = NULL;
170
171   for (unsigned i = MESA_SHADER_VERTEX; i < MESA_SHADER_FRAGMENT; i++) {
172      if (!infos[i])
173         continue;
174
175      if (prev_info) {
176         prev_info->outputs_written |= infos[i]->inputs_read &
177            ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
178         infos[i]->inputs_read |= prev_info->outputs_written &
179            ~(VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER);
180
181         prev_info->patch_outputs_written |= infos[i]->patch_inputs_read;
182         infos[i]->patch_inputs_read |= prev_info->patch_outputs_written;
183      }
184      prev_info = infos[i];
185   }
186}
187
188static void
189update_xfb_info(struct gl_transform_feedback_info *xfb_info,
190                struct shader_info *info)
191{
192   if (!xfb_info)
193      return;
194
195   for (unsigned i = 0; i < xfb_info->NumOutputs; i++) {
196      struct gl_transform_feedback_output *output = &xfb_info->Outputs[i];
197
198      /* The VUE header contains three scalar fields packed together:
199       * - gl_PointSize is stored in VARYING_SLOT_PSIZ.w
200       * - gl_Layer is stored in VARYING_SLOT_PSIZ.y
201       * - gl_ViewportIndex is stored in VARYING_SLOT_PSIZ.z
202       */
203      switch (output->OutputRegister) {
204      case VARYING_SLOT_LAYER:
205         assert(output->NumComponents == 1);
206         output->OutputRegister = VARYING_SLOT_PSIZ;
207         output->ComponentOffset = 1;
208         break;
209      case VARYING_SLOT_VIEWPORT:
210         assert(output->NumComponents == 1);
211         output->OutputRegister = VARYING_SLOT_PSIZ;
212         output->ComponentOffset = 2;
213         break;
214      case VARYING_SLOT_PSIZ:
215         assert(output->NumComponents == 1);
216         output->ComponentOffset = 3;
217         break;
218      }
219
220      info->outputs_written |= 1ull << output->OutputRegister;
221   }
222}
223
224extern "C" GLboolean
225brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
226{
227   struct brw_context *brw = brw_context(ctx);
228   const struct brw_compiler *compiler = brw->screen->compiler;
229   unsigned int stage;
230   struct shader_info *infos[MESA_SHADER_STAGES] = { 0, };
231
232   if (shProg->data->LinkStatus == LINKING_SKIPPED)
233      return GL_TRUE;
234
235   for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
236      struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
237      if (!shader)
238         continue;
239
240      struct gl_program *prog = shader->Program;
241      prog->Parameters = _mesa_new_parameter_list();
242
243      if (!shader->spirv_data)
244         process_glsl_ir(brw, shProg, shader);
245
246      _mesa_copy_linked_program_data(shProg, shader);
247
248      prog->ShadowSamplers = shader->shadow_samplers;
249
250      bool debug_enabled =
251         INTEL_DEBUG(intel_debug_flag_for_shader_stage(shader->Stage));
252
253      if (debug_enabled && shader->ir) {
254         fprintf(stderr, "GLSL IR for native %s shader %d:\n",
255                 _mesa_shader_stage_to_string(shader->Stage), shProg->Name);
256         _mesa_print_ir(stderr, shader->ir, NULL);
257         fprintf(stderr, "\n\n");
258      }
259
260      prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
261                                 compiler->scalar_stage[stage]);
262   }
263
264   /* TODO: Verify if its feasible to split up the NIR linking work into a
265    * per-stage part (that fill out information we need for the passes) and a
266    * actual linking part, so that we could fold back brw_nir_lower_resources
267    * back into brw_create_nir.
268    */
269
270   /* SPIR-V programs use a NIR linker */
271   if (shProg->data->spirv) {
272      static const gl_nir_linker_options opts = {
273         .fill_parameters = false,
274      };
275      if (!gl_nir_link_spirv(ctx, shProg, &opts))
276         return GL_FALSE;
277   }
278
279   for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
280      struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
281      if (!shader)
282         continue;
283
284      struct gl_program *prog = shader->Program;
285
286      brw_nir_lower_resources(prog->nir, shProg, prog, &brw->screen->devinfo);
287
288      NIR_PASS_V(prog->nir, brw_nir_lower_gl_images, prog);
289   }
290
291   /* Determine first and last stage. */
292   unsigned first = MESA_SHADER_STAGES;
293   unsigned last = 0;
294   for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
295      if (!shProg->_LinkedShaders[i])
296         continue;
297      if (first == MESA_SHADER_STAGES)
298         first = i;
299      last = i;
300   }
301
302   /* Linking the stages in the opposite order (from fragment to vertex)
303    * ensures that inter-shader outputs written to in an earlier stage
304    * are eliminated if they are (transitively) not used in a later
305    * stage.
306    *
307    * TODO: Look into Shadow of Mordor regressions on HSW and enable this for
308    * all platforms. See: https://bugs.freedesktop.org/show_bug.cgi?id=103537
309    */
310    if (first != last && brw->screen->devinfo.ver >= 8) {
311       int next = last;
312       for (int i = next - 1; i >= 0; i--) {
313          if (shProg->_LinkedShaders[i] == NULL)
314             continue;
315
316          brw_nir_link_shaders(compiler,
317                               shProg->_LinkedShaders[i]->Program->nir,
318                               shProg->_LinkedShaders[next]->Program->nir);
319          next = i;
320       }
321    }
322
323   for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
324      struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
325      if (!shader)
326         continue;
327
328      struct gl_program *prog = shader->Program;
329
330      _mesa_update_shader_textures_used(shProg, prog);
331
332      brw_shader_gather_info(prog->nir, prog);
333
334      NIR_PASS_V(prog->nir, gl_nir_lower_atomics, shProg, false);
335      NIR_PASS_V(prog->nir, nir_lower_atomics_to_ssbo);
336
337      nir_sweep(prog->nir);
338
339      infos[stage] = &prog->nir->info;
340
341      update_xfb_info(prog->sh.LinkedTransformFeedback, infos[stage]);
342
343      /* Make a pass over the IR to add state references for any built-in
344       * uniforms that are used.  This has to be done now (during linking).
345       * Code generation doesn't happen until the first time this shader is
346       * used for rendering.  Waiting until then to generate the parameters is
347       * too late.  At that point, the values for the built-in uniforms won't
348       * get sent to the shader.
349       */
350      nir_foreach_uniform_variable(var, prog->nir) {
351         const nir_state_slot *const slots = var->state_slots;
352         for (unsigned int i = 0; i < var->num_state_slots; i++) {
353            assert(slots != NULL);
354            _mesa_add_state_reference(prog->Parameters, slots[i].tokens);
355         }
356      }
357   }
358
359   /* The linker tries to dead code eliminate unused varying components,
360    * and make sure interfaces match.  But it isn't able to do so in all
361    * cases.  So, explicitly make the interfaces match by OR'ing together
362    * the inputs_read/outputs_written bitfields of adjacent stages.
363    */
364   if (!shProg->SeparateShader)
365      unify_interfaces(infos);
366
367   if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
368      for (unsigned i = 0; i < shProg->NumShaders; i++) {
369         const struct gl_shader *sh = shProg->Shaders[i];
370         if (!sh)
371            continue;
372
373         fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
374                 _mesa_shader_stage_to_string(sh->Stage),
375                 i, shProg->Name);
376         fprintf(stderr, "%s", sh->Source);
377         fprintf(stderr, "\n");
378      }
379   }
380
381   if (brw->precompile && !brw_shader_precompile(ctx, shProg))
382      return GL_FALSE;
383
384   /* SPIR-V programs build its resource list from linked NIR shaders. */
385   if (!shProg->data->spirv)
386      build_program_resource_list(ctx, shProg, false);
387   else
388      nir_build_program_resource_list(ctx, shProg, true);
389
390   for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
391      struct gl_linked_shader *shader = shProg->_LinkedShaders[stage];
392      if (!shader)
393         continue;
394
395      /* The GLSL IR won't be needed anymore. */
396      ralloc_free(shader->ir);
397      shader->ir = NULL;
398   }
399
400   return GL_TRUE;
401}
402