register_allocate.c revision 01e04c3f
101e04c3fSmrg/*
201e04c3fSmrg * Copyright © 2010 Intel Corporation
301e04c3fSmrg *
401e04c3fSmrg * Permission is hereby granted, free of charge, to any person obtaining a
501e04c3fSmrg * copy of this software and associated documentation files (the "Software"),
601e04c3fSmrg * to deal in the Software without restriction, including without limitation
701e04c3fSmrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
801e04c3fSmrg * and/or sell copies of the Software, and to permit persons to whom the
901e04c3fSmrg * Software is furnished to do so, subject to the following conditions:
1001e04c3fSmrg *
1101e04c3fSmrg * The above copyright notice and this permission notice (including the next
1201e04c3fSmrg * paragraph) shall be included in all copies or substantial portions of the
1301e04c3fSmrg * Software.
1401e04c3fSmrg *
1501e04c3fSmrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1601e04c3fSmrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
1701e04c3fSmrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
1801e04c3fSmrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
1901e04c3fSmrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2001e04c3fSmrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2101e04c3fSmrg * IN THE SOFTWARE.
2201e04c3fSmrg *
2301e04c3fSmrg * Authors:
2401e04c3fSmrg *    Eric Anholt <eric@anholt.net>
2501e04c3fSmrg *
2601e04c3fSmrg */
2701e04c3fSmrg
2801e04c3fSmrg/** @file register_allocate.c
2901e04c3fSmrg *
3001e04c3fSmrg * Graph-coloring register allocator.
3101e04c3fSmrg *
3201e04c3fSmrg * The basic idea of graph coloring is to make a node in a graph for
3301e04c3fSmrg * every thing that needs a register (color) number assigned, and make
3401e04c3fSmrg * edges in the graph between nodes that interfere (can't be allocated
3501e04c3fSmrg * to the same register at the same time).
3601e04c3fSmrg *
3701e04c3fSmrg * During the "simplify" process, any any node with fewer edges than
3801e04c3fSmrg * there are registers means that that edge can get assigned a
3901e04c3fSmrg * register regardless of what its neighbors choose, so that node is
4001e04c3fSmrg * pushed on a stack and removed (with its edges) from the graph.
4101e04c3fSmrg * That likely causes other nodes to become trivially colorable as well.
4201e04c3fSmrg *
4301e04c3fSmrg * Then during the "select" process, nodes are popped off of that
4401e04c3fSmrg * stack, their edges restored, and assigned a color different from
4501e04c3fSmrg * their neighbors.  Because they were pushed on the stack only when
4601e04c3fSmrg * they were trivially colorable, any color chosen won't interfere
4701e04c3fSmrg * with the registers to be popped later.
4801e04c3fSmrg *
4901e04c3fSmrg * The downside to most graph coloring is that real hardware often has
5001e04c3fSmrg * limitations, like registers that need to be allocated to a node in
5101e04c3fSmrg * pairs, or aligned on some boundary.  This implementation follows
5201e04c3fSmrg * the paper "Retargetable Graph-Coloring Register Allocation for
5301e04c3fSmrg * Irregular Architectures" by Johan Runeson and Sven-Olof Nyström.
5401e04c3fSmrg *
5501e04c3fSmrg * In this system, there are register classes each containing various
5601e04c3fSmrg * registers, and registers may interfere with other registers.  For
5701e04c3fSmrg * example, one might have a class of base registers, and a class of
5801e04c3fSmrg * aligned register pairs that would each interfere with their pair of
5901e04c3fSmrg * the base registers.  Each node has a register class it needs to be
6001e04c3fSmrg * assigned to.  Define p(B) to be the size of register class B, and
6101e04c3fSmrg * q(B,C) to be the number of registers in B that the worst choice
6201e04c3fSmrg * register in C could conflict with.  Then, this system replaces the
6301e04c3fSmrg * basic graph coloring test of "fewer edges from this node than there
6401e04c3fSmrg * are registers" with "For this node of class B, the sum of q(B,C)
6501e04c3fSmrg * for each neighbor node of class C is less than pB".
6601e04c3fSmrg *
6701e04c3fSmrg * A nice feature of the pq test is that q(B,C) can be computed once
6801e04c3fSmrg * up front and stored in a 2-dimensional array, so that the cost of
6901e04c3fSmrg * coloring a node is constant with the number of registers.  We do
7001e04c3fSmrg * this during ra_set_finalize().
7101e04c3fSmrg */
7201e04c3fSmrg
7301e04c3fSmrg#include <stdbool.h>
7401e04c3fSmrg
7501e04c3fSmrg#include "ralloc.h"
7601e04c3fSmrg#include "main/imports.h"
7701e04c3fSmrg#include "main/macros.h"
7801e04c3fSmrg#include "util/bitset.h"
7901e04c3fSmrg#include "register_allocate.h"
8001e04c3fSmrg
8101e04c3fSmrg#define NO_REG ~0U
8201e04c3fSmrg
8301e04c3fSmrgstruct ra_reg {
8401e04c3fSmrg   BITSET_WORD *conflicts;
8501e04c3fSmrg   unsigned int *conflict_list;
8601e04c3fSmrg   unsigned int conflict_list_size;
8701e04c3fSmrg   unsigned int num_conflicts;
8801e04c3fSmrg};
8901e04c3fSmrg
9001e04c3fSmrgstruct ra_regs {
9101e04c3fSmrg   struct ra_reg *regs;
9201e04c3fSmrg   unsigned int count;
9301e04c3fSmrg
9401e04c3fSmrg   struct ra_class **classes;
9501e04c3fSmrg   unsigned int class_count;
9601e04c3fSmrg
9701e04c3fSmrg   bool round_robin;
9801e04c3fSmrg};
9901e04c3fSmrg
10001e04c3fSmrgstruct ra_class {
10101e04c3fSmrg   /**
10201e04c3fSmrg    * Bitset indicating which registers belong to this class.
10301e04c3fSmrg    *
10401e04c3fSmrg    * (If bit N is set, then register N belongs to this class.)
10501e04c3fSmrg    */
10601e04c3fSmrg   BITSET_WORD *regs;
10701e04c3fSmrg
10801e04c3fSmrg   /**
10901e04c3fSmrg    * p(B) in Runeson/Nyström paper.
11001e04c3fSmrg    *
11101e04c3fSmrg    * This is "how many regs are in the set."
11201e04c3fSmrg    */
11301e04c3fSmrg   unsigned int p;
11401e04c3fSmrg
11501e04c3fSmrg   /**
11601e04c3fSmrg    * q(B,C) (indexed by C, B is this register class) in
11701e04c3fSmrg    * Runeson/Nyström paper.  This is "how many registers of B could
11801e04c3fSmrg    * the worst choice register from C conflict with".
11901e04c3fSmrg    */
12001e04c3fSmrg   unsigned int *q;
12101e04c3fSmrg};
12201e04c3fSmrg
12301e04c3fSmrgstruct ra_node {
12401e04c3fSmrg   /** @{
12501e04c3fSmrg    *
12601e04c3fSmrg    * List of which nodes this node interferes with.  This should be
12701e04c3fSmrg    * symmetric with the other node.
12801e04c3fSmrg    */
12901e04c3fSmrg   BITSET_WORD *adjacency;
13001e04c3fSmrg   unsigned int *adjacency_list;
13101e04c3fSmrg   unsigned int adjacency_list_size;
13201e04c3fSmrg   unsigned int adjacency_count;
13301e04c3fSmrg   /** @} */
13401e04c3fSmrg
13501e04c3fSmrg   unsigned int class;
13601e04c3fSmrg
13701e04c3fSmrg   /* Register, if assigned, or NO_REG. */
13801e04c3fSmrg   unsigned int reg;
13901e04c3fSmrg
14001e04c3fSmrg   /**
14101e04c3fSmrg    * Set when the node is in the trivially colorable stack.  When
14201e04c3fSmrg    * set, the adjacency to this node is ignored, to implement the
14301e04c3fSmrg    * "remove the edge from the graph" in simplification without
14401e04c3fSmrg    * having to actually modify the adjacency_list.
14501e04c3fSmrg    */
14601e04c3fSmrg   bool in_stack;
14701e04c3fSmrg
14801e04c3fSmrg   /**
14901e04c3fSmrg    * The q total, as defined in the Runeson/Nyström paper, for all the
15001e04c3fSmrg    * interfering nodes not in the stack.
15101e04c3fSmrg    */
15201e04c3fSmrg   unsigned int q_total;
15301e04c3fSmrg
15401e04c3fSmrg   /* For an implementation that needs register spilling, this is the
15501e04c3fSmrg    * approximate cost of spilling this node.
15601e04c3fSmrg    */
15701e04c3fSmrg   float spill_cost;
15801e04c3fSmrg};
15901e04c3fSmrg
16001e04c3fSmrgstruct ra_graph {
16101e04c3fSmrg   struct ra_regs *regs;
16201e04c3fSmrg   /**
16301e04c3fSmrg    * the variables that need register allocation.
16401e04c3fSmrg    */
16501e04c3fSmrg   struct ra_node *nodes;
16601e04c3fSmrg   unsigned int count; /**< count of nodes. */
16701e04c3fSmrg
16801e04c3fSmrg   unsigned int *stack;
16901e04c3fSmrg   unsigned int stack_count;
17001e04c3fSmrg
17101e04c3fSmrg   /**
17201e04c3fSmrg    * Tracks the start of the set of optimistically-colored registers in the
17301e04c3fSmrg    * stack.
17401e04c3fSmrg    */
17501e04c3fSmrg   unsigned int stack_optimistic_start;
17601e04c3fSmrg
17701e04c3fSmrg   unsigned int (*select_reg_callback)(struct ra_graph *g, BITSET_WORD *regs,
17801e04c3fSmrg                                       void *data);
17901e04c3fSmrg   void *select_reg_callback_data;
18001e04c3fSmrg};
18101e04c3fSmrg
18201e04c3fSmrg/**
18301e04c3fSmrg * Creates a set of registers for the allocator.
18401e04c3fSmrg *
18501e04c3fSmrg * mem_ctx is a ralloc context for the allocator.  The reg set may be freed
18601e04c3fSmrg * using ralloc_free().
18701e04c3fSmrg */
18801e04c3fSmrgstruct ra_regs *
18901e04c3fSmrgra_alloc_reg_set(void *mem_ctx, unsigned int count, bool need_conflict_lists)
19001e04c3fSmrg{
19101e04c3fSmrg   unsigned int i;
19201e04c3fSmrg   struct ra_regs *regs;
19301e04c3fSmrg
19401e04c3fSmrg   regs = rzalloc(mem_ctx, struct ra_regs);
19501e04c3fSmrg   regs->count = count;
19601e04c3fSmrg   regs->regs = rzalloc_array(regs, struct ra_reg, count);
19701e04c3fSmrg
19801e04c3fSmrg   for (i = 0; i < count; i++) {
19901e04c3fSmrg      regs->regs[i].conflicts = rzalloc_array(regs->regs, BITSET_WORD,
20001e04c3fSmrg                                              BITSET_WORDS(count));
20101e04c3fSmrg      BITSET_SET(regs->regs[i].conflicts, i);
20201e04c3fSmrg
20301e04c3fSmrg      if (need_conflict_lists) {
20401e04c3fSmrg         regs->regs[i].conflict_list = ralloc_array(regs->regs,
20501e04c3fSmrg                                                    unsigned int, 4);
20601e04c3fSmrg         regs->regs[i].conflict_list_size = 4;
20701e04c3fSmrg         regs->regs[i].conflict_list[0] = i;
20801e04c3fSmrg      } else {
20901e04c3fSmrg         regs->regs[i].conflict_list = NULL;
21001e04c3fSmrg         regs->regs[i].conflict_list_size = 0;
21101e04c3fSmrg      }
21201e04c3fSmrg      regs->regs[i].num_conflicts = 1;
21301e04c3fSmrg   }
21401e04c3fSmrg
21501e04c3fSmrg   return regs;
21601e04c3fSmrg}
21701e04c3fSmrg
21801e04c3fSmrg/**
21901e04c3fSmrg * The register allocator by default prefers to allocate low register numbers,
22001e04c3fSmrg * since it was written for hardware (gen4/5 Intel) that is limited in its
22101e04c3fSmrg * multithreadedness by the number of registers used in a given shader.
22201e04c3fSmrg *
22301e04c3fSmrg * However, for hardware without that restriction, densely packed register
22401e04c3fSmrg * allocation can put serious constraints on instruction scheduling.  This
22501e04c3fSmrg * function tells the allocator to rotate around the registers if possible as
22601e04c3fSmrg * it allocates the nodes.
22701e04c3fSmrg */
22801e04c3fSmrgvoid
22901e04c3fSmrgra_set_allocate_round_robin(struct ra_regs *regs)
23001e04c3fSmrg{
23101e04c3fSmrg   regs->round_robin = true;
23201e04c3fSmrg}
23301e04c3fSmrg
23401e04c3fSmrgstatic void
23501e04c3fSmrgra_add_conflict_list(struct ra_regs *regs, unsigned int r1, unsigned int r2)
23601e04c3fSmrg{
23701e04c3fSmrg   struct ra_reg *reg1 = &regs->regs[r1];
23801e04c3fSmrg
23901e04c3fSmrg   if (reg1->conflict_list) {
24001e04c3fSmrg      if (reg1->conflict_list_size == reg1->num_conflicts) {
24101e04c3fSmrg         reg1->conflict_list_size *= 2;
24201e04c3fSmrg         reg1->conflict_list = reralloc(regs->regs, reg1->conflict_list,
24301e04c3fSmrg                                        unsigned int, reg1->conflict_list_size);
24401e04c3fSmrg      }
24501e04c3fSmrg      reg1->conflict_list[reg1->num_conflicts++] = r2;
24601e04c3fSmrg   }
24701e04c3fSmrg   BITSET_SET(reg1->conflicts, r2);
24801e04c3fSmrg}
24901e04c3fSmrg
25001e04c3fSmrgvoid
25101e04c3fSmrgra_add_reg_conflict(struct ra_regs *regs, unsigned int r1, unsigned int r2)
25201e04c3fSmrg{
25301e04c3fSmrg   if (!BITSET_TEST(regs->regs[r1].conflicts, r2)) {
25401e04c3fSmrg      ra_add_conflict_list(regs, r1, r2);
25501e04c3fSmrg      ra_add_conflict_list(regs, r2, r1);
25601e04c3fSmrg   }
25701e04c3fSmrg}
25801e04c3fSmrg
25901e04c3fSmrg/**
26001e04c3fSmrg * Adds a conflict between base_reg and reg, and also between reg and
26101e04c3fSmrg * anything that base_reg conflicts with.
26201e04c3fSmrg *
26301e04c3fSmrg * This can simplify code for setting up multiple register classes
26401e04c3fSmrg * which are aggregates of some base hardware registers, compared to
26501e04c3fSmrg * explicitly using ra_add_reg_conflict.
26601e04c3fSmrg */
26701e04c3fSmrgvoid
26801e04c3fSmrgra_add_transitive_reg_conflict(struct ra_regs *regs,
26901e04c3fSmrg                               unsigned int base_reg, unsigned int reg)
27001e04c3fSmrg{
27101e04c3fSmrg   unsigned int i;
27201e04c3fSmrg
27301e04c3fSmrg   ra_add_reg_conflict(regs, reg, base_reg);
27401e04c3fSmrg
27501e04c3fSmrg   for (i = 0; i < regs->regs[base_reg].num_conflicts; i++) {
27601e04c3fSmrg      ra_add_reg_conflict(regs, reg, regs->regs[base_reg].conflict_list[i]);
27701e04c3fSmrg   }
27801e04c3fSmrg}
27901e04c3fSmrg
28001e04c3fSmrg/**
28101e04c3fSmrg * Makes every conflict on the given register transitive.  In other words,
28201e04c3fSmrg * every register that conflicts with r will now conflict with every other
28301e04c3fSmrg * register conflicting with r.
28401e04c3fSmrg *
28501e04c3fSmrg * This can simplify code for setting up multiple register classes
28601e04c3fSmrg * which are aggregates of some base hardware registers, compared to
28701e04c3fSmrg * explicitly using ra_add_reg_conflict.
28801e04c3fSmrg */
28901e04c3fSmrgvoid
29001e04c3fSmrgra_make_reg_conflicts_transitive(struct ra_regs *regs, unsigned int r)
29101e04c3fSmrg{
29201e04c3fSmrg   struct ra_reg *reg = &regs->regs[r];
29301e04c3fSmrg   BITSET_WORD tmp;
29401e04c3fSmrg   int c;
29501e04c3fSmrg
29601e04c3fSmrg   BITSET_FOREACH_SET(c, tmp, reg->conflicts, regs->count) {
29701e04c3fSmrg      struct ra_reg *other = &regs->regs[c];
29801e04c3fSmrg      unsigned i;
29901e04c3fSmrg      for (i = 0; i < BITSET_WORDS(regs->count); i++)
30001e04c3fSmrg         other->conflicts[i] |= reg->conflicts[i];
30101e04c3fSmrg   }
30201e04c3fSmrg}
30301e04c3fSmrg
30401e04c3fSmrgunsigned int
30501e04c3fSmrgra_alloc_reg_class(struct ra_regs *regs)
30601e04c3fSmrg{
30701e04c3fSmrg   struct ra_class *class;
30801e04c3fSmrg
30901e04c3fSmrg   regs->classes = reralloc(regs->regs, regs->classes, struct ra_class *,
31001e04c3fSmrg                            regs->class_count + 1);
31101e04c3fSmrg
31201e04c3fSmrg   class = rzalloc(regs, struct ra_class);
31301e04c3fSmrg   regs->classes[regs->class_count] = class;
31401e04c3fSmrg
31501e04c3fSmrg   class->regs = rzalloc_array(class, BITSET_WORD, BITSET_WORDS(regs->count));
31601e04c3fSmrg
31701e04c3fSmrg   return regs->class_count++;
31801e04c3fSmrg}
31901e04c3fSmrg
32001e04c3fSmrgvoid
32101e04c3fSmrgra_class_add_reg(struct ra_regs *regs, unsigned int c, unsigned int r)
32201e04c3fSmrg{
32301e04c3fSmrg   struct ra_class *class = regs->classes[c];
32401e04c3fSmrg
32501e04c3fSmrg   BITSET_SET(class->regs, r);
32601e04c3fSmrg   class->p++;
32701e04c3fSmrg}
32801e04c3fSmrg
32901e04c3fSmrg/**
33001e04c3fSmrg * Returns true if the register belongs to the given class.
33101e04c3fSmrg */
33201e04c3fSmrgstatic bool
33301e04c3fSmrgreg_belongs_to_class(unsigned int r, struct ra_class *c)
33401e04c3fSmrg{
33501e04c3fSmrg   return BITSET_TEST(c->regs, r);
33601e04c3fSmrg}
33701e04c3fSmrg
33801e04c3fSmrg/**
33901e04c3fSmrg * Must be called after all conflicts and register classes have been
34001e04c3fSmrg * set up and before the register set is used for allocation.
34101e04c3fSmrg * To avoid costly q value computation, use the q_values paramater
34201e04c3fSmrg * to pass precomputed q values to this function.
34301e04c3fSmrg */
34401e04c3fSmrgvoid
34501e04c3fSmrgra_set_finalize(struct ra_regs *regs, unsigned int **q_values)
34601e04c3fSmrg{
34701e04c3fSmrg   unsigned int b, c;
34801e04c3fSmrg
34901e04c3fSmrg   for (b = 0; b < regs->class_count; b++) {
35001e04c3fSmrg      regs->classes[b]->q = ralloc_array(regs, unsigned int, regs->class_count);
35101e04c3fSmrg   }
35201e04c3fSmrg
35301e04c3fSmrg   if (q_values) {
35401e04c3fSmrg      for (b = 0; b < regs->class_count; b++) {
35501e04c3fSmrg         for (c = 0; c < regs->class_count; c++) {
35601e04c3fSmrg            regs->classes[b]->q[c] = q_values[b][c];
35701e04c3fSmrg         }
35801e04c3fSmrg      }
35901e04c3fSmrg   } else {
36001e04c3fSmrg      /* Compute, for each class B and C, how many regs of B an
36101e04c3fSmrg       * allocation to C could conflict with.
36201e04c3fSmrg       */
36301e04c3fSmrg      for (b = 0; b < regs->class_count; b++) {
36401e04c3fSmrg         for (c = 0; c < regs->class_count; c++) {
36501e04c3fSmrg            unsigned int rc;
36601e04c3fSmrg            int max_conflicts = 0;
36701e04c3fSmrg
36801e04c3fSmrg            for (rc = 0; rc < regs->count; rc++) {
36901e04c3fSmrg               int conflicts = 0;
37001e04c3fSmrg               unsigned int i;
37101e04c3fSmrg
37201e04c3fSmrg               if (!reg_belongs_to_class(rc, regs->classes[c]))
37301e04c3fSmrg                  continue;
37401e04c3fSmrg
37501e04c3fSmrg               for (i = 0; i < regs->regs[rc].num_conflicts; i++) {
37601e04c3fSmrg                  unsigned int rb = regs->regs[rc].conflict_list[i];
37701e04c3fSmrg                  if (reg_belongs_to_class(rb, regs->classes[b]))
37801e04c3fSmrg                     conflicts++;
37901e04c3fSmrg               }
38001e04c3fSmrg               max_conflicts = MAX2(max_conflicts, conflicts);
38101e04c3fSmrg            }
38201e04c3fSmrg            regs->classes[b]->q[c] = max_conflicts;
38301e04c3fSmrg         }
38401e04c3fSmrg      }
38501e04c3fSmrg   }
38601e04c3fSmrg
38701e04c3fSmrg   for (b = 0; b < regs->count; b++) {
38801e04c3fSmrg      ralloc_free(regs->regs[b].conflict_list);
38901e04c3fSmrg      regs->regs[b].conflict_list = NULL;
39001e04c3fSmrg   }
39101e04c3fSmrg}
39201e04c3fSmrg
39301e04c3fSmrgstatic void
39401e04c3fSmrgra_add_node_adjacency(struct ra_graph *g, unsigned int n1, unsigned int n2)
39501e04c3fSmrg{
39601e04c3fSmrg   BITSET_SET(g->nodes[n1].adjacency, n2);
39701e04c3fSmrg
39801e04c3fSmrg   assert(n1 != n2);
39901e04c3fSmrg
40001e04c3fSmrg   int n1_class = g->nodes[n1].class;
40101e04c3fSmrg   int n2_class = g->nodes[n2].class;
40201e04c3fSmrg   g->nodes[n1].q_total += g->regs->classes[n1_class]->q[n2_class];
40301e04c3fSmrg
40401e04c3fSmrg   if (g->nodes[n1].adjacency_count >=
40501e04c3fSmrg       g->nodes[n1].adjacency_list_size) {
40601e04c3fSmrg      g->nodes[n1].adjacency_list_size *= 2;
40701e04c3fSmrg      g->nodes[n1].adjacency_list = reralloc(g, g->nodes[n1].adjacency_list,
40801e04c3fSmrg                                             unsigned int,
40901e04c3fSmrg                                             g->nodes[n1].adjacency_list_size);
41001e04c3fSmrg   }
41101e04c3fSmrg
41201e04c3fSmrg   g->nodes[n1].adjacency_list[g->nodes[n1].adjacency_count] = n2;
41301e04c3fSmrg   g->nodes[n1].adjacency_count++;
41401e04c3fSmrg}
41501e04c3fSmrg
41601e04c3fSmrgstruct ra_graph *
41701e04c3fSmrgra_alloc_interference_graph(struct ra_regs *regs, unsigned int count)
41801e04c3fSmrg{
41901e04c3fSmrg   struct ra_graph *g;
42001e04c3fSmrg   unsigned int i;
42101e04c3fSmrg
42201e04c3fSmrg   g = rzalloc(NULL, struct ra_graph);
42301e04c3fSmrg   g->regs = regs;
42401e04c3fSmrg   g->nodes = rzalloc_array(g, struct ra_node, count);
42501e04c3fSmrg   g->count = count;
42601e04c3fSmrg
42701e04c3fSmrg   g->stack = rzalloc_array(g, unsigned int, count);
42801e04c3fSmrg
42901e04c3fSmrg   for (i = 0; i < count; i++) {
43001e04c3fSmrg      int bitset_count = BITSET_WORDS(count);
43101e04c3fSmrg      g->nodes[i].adjacency = rzalloc_array(g, BITSET_WORD, bitset_count);
43201e04c3fSmrg
43301e04c3fSmrg      g->nodes[i].adjacency_list_size = 4;
43401e04c3fSmrg      g->nodes[i].adjacency_list =
43501e04c3fSmrg         ralloc_array(g, unsigned int, g->nodes[i].adjacency_list_size);
43601e04c3fSmrg      g->nodes[i].adjacency_count = 0;
43701e04c3fSmrg      g->nodes[i].q_total = 0;
43801e04c3fSmrg
43901e04c3fSmrg      g->nodes[i].reg = NO_REG;
44001e04c3fSmrg   }
44101e04c3fSmrg
44201e04c3fSmrg   return g;
44301e04c3fSmrg}
44401e04c3fSmrg
44501e04c3fSmrgvoid ra_set_select_reg_callback(struct ra_graph *g,
44601e04c3fSmrg                                unsigned int (*callback)(struct ra_graph *g,
44701e04c3fSmrg                                                         BITSET_WORD *regs,
44801e04c3fSmrg                                                         void *data),
44901e04c3fSmrg                                void *data)
45001e04c3fSmrg{
45101e04c3fSmrg   g->select_reg_callback = callback;
45201e04c3fSmrg   g->select_reg_callback_data = data;
45301e04c3fSmrg}
45401e04c3fSmrg
45501e04c3fSmrgvoid
45601e04c3fSmrgra_set_node_class(struct ra_graph *g,
45701e04c3fSmrg                  unsigned int n, unsigned int class)
45801e04c3fSmrg{
45901e04c3fSmrg   g->nodes[n].class = class;
46001e04c3fSmrg}
46101e04c3fSmrg
46201e04c3fSmrgvoid
46301e04c3fSmrgra_add_node_interference(struct ra_graph *g,
46401e04c3fSmrg                         unsigned int n1, unsigned int n2)
46501e04c3fSmrg{
46601e04c3fSmrg   if (n1 != n2 && !BITSET_TEST(g->nodes[n1].adjacency, n2)) {
46701e04c3fSmrg      ra_add_node_adjacency(g, n1, n2);
46801e04c3fSmrg      ra_add_node_adjacency(g, n2, n1);
46901e04c3fSmrg   }
47001e04c3fSmrg}
47101e04c3fSmrg
47201e04c3fSmrgstatic bool
47301e04c3fSmrgpq_test(struct ra_graph *g, unsigned int n)
47401e04c3fSmrg{
47501e04c3fSmrg   int n_class = g->nodes[n].class;
47601e04c3fSmrg
47701e04c3fSmrg   return g->nodes[n].q_total < g->regs->classes[n_class]->p;
47801e04c3fSmrg}
47901e04c3fSmrg
48001e04c3fSmrgstatic void
48101e04c3fSmrgdecrement_q(struct ra_graph *g, unsigned int n)
48201e04c3fSmrg{
48301e04c3fSmrg   unsigned int i;
48401e04c3fSmrg   int n_class = g->nodes[n].class;
48501e04c3fSmrg
48601e04c3fSmrg   for (i = 0; i < g->nodes[n].adjacency_count; i++) {
48701e04c3fSmrg      unsigned int n2 = g->nodes[n].adjacency_list[i];
48801e04c3fSmrg      unsigned int n2_class = g->nodes[n2].class;
48901e04c3fSmrg
49001e04c3fSmrg      if (!g->nodes[n2].in_stack) {
49101e04c3fSmrg         assert(g->nodes[n2].q_total >= g->regs->classes[n2_class]->q[n_class]);
49201e04c3fSmrg         g->nodes[n2].q_total -= g->regs->classes[n2_class]->q[n_class];
49301e04c3fSmrg      }
49401e04c3fSmrg   }
49501e04c3fSmrg}
49601e04c3fSmrg
49701e04c3fSmrg/**
49801e04c3fSmrg * Simplifies the interference graph by pushing all
49901e04c3fSmrg * trivially-colorable nodes into a stack of nodes to be colored,
50001e04c3fSmrg * removing them from the graph, and rinsing and repeating.
50101e04c3fSmrg *
50201e04c3fSmrg * If we encounter a case where we can't push any nodes on the stack, then
50301e04c3fSmrg * we optimistically choose a node and push it on the stack. We heuristically
50401e04c3fSmrg * push the node with the lowest total q value, since it has the fewest
50501e04c3fSmrg * neighbors and therefore is most likely to be allocated.
50601e04c3fSmrg */
50701e04c3fSmrgstatic void
50801e04c3fSmrgra_simplify(struct ra_graph *g)
50901e04c3fSmrg{
51001e04c3fSmrg   bool progress = true;
51101e04c3fSmrg   unsigned int stack_optimistic_start = UINT_MAX;
51201e04c3fSmrg   int i;
51301e04c3fSmrg
51401e04c3fSmrg   while (progress) {
51501e04c3fSmrg      unsigned int best_optimistic_node = ~0;
51601e04c3fSmrg      unsigned int lowest_q_total = ~0;
51701e04c3fSmrg
51801e04c3fSmrg      progress = false;
51901e04c3fSmrg
52001e04c3fSmrg      for (i = g->count - 1; i >= 0; i--) {
52101e04c3fSmrg	 if (g->nodes[i].in_stack || g->nodes[i].reg != NO_REG)
52201e04c3fSmrg	    continue;
52301e04c3fSmrg
52401e04c3fSmrg	 if (pq_test(g, i)) {
52501e04c3fSmrg	    decrement_q(g, i);
52601e04c3fSmrg	    g->stack[g->stack_count] = i;
52701e04c3fSmrg	    g->stack_count++;
52801e04c3fSmrg	    g->nodes[i].in_stack = true;
52901e04c3fSmrg	    progress = true;
53001e04c3fSmrg	 } else {
53101e04c3fSmrg	    unsigned int new_q_total = g->nodes[i].q_total;
53201e04c3fSmrg	    if (new_q_total < lowest_q_total) {
53301e04c3fSmrg	       best_optimistic_node = i;
53401e04c3fSmrg	       lowest_q_total = new_q_total;
53501e04c3fSmrg	    }
53601e04c3fSmrg	 }
53701e04c3fSmrg      }
53801e04c3fSmrg
53901e04c3fSmrg      if (!progress && best_optimistic_node != ~0U) {
54001e04c3fSmrg         if (stack_optimistic_start == UINT_MAX)
54101e04c3fSmrg            stack_optimistic_start = g->stack_count;
54201e04c3fSmrg
54301e04c3fSmrg	 decrement_q(g, best_optimistic_node);
54401e04c3fSmrg	 g->stack[g->stack_count] = best_optimistic_node;
54501e04c3fSmrg	 g->stack_count++;
54601e04c3fSmrg	 g->nodes[best_optimistic_node].in_stack = true;
54701e04c3fSmrg	 progress = true;
54801e04c3fSmrg      }
54901e04c3fSmrg   }
55001e04c3fSmrg
55101e04c3fSmrg   g->stack_optimistic_start = stack_optimistic_start;
55201e04c3fSmrg}
55301e04c3fSmrg
55401e04c3fSmrgstatic bool
55501e04c3fSmrgra_any_neighbors_conflict(struct ra_graph *g, unsigned int n, unsigned int r)
55601e04c3fSmrg{
55701e04c3fSmrg   unsigned int i;
55801e04c3fSmrg
55901e04c3fSmrg   for (i = 0; i < g->nodes[n].adjacency_count; i++) {
56001e04c3fSmrg      unsigned int n2 = g->nodes[n].adjacency_list[i];
56101e04c3fSmrg
56201e04c3fSmrg      if (!g->nodes[n2].in_stack &&
56301e04c3fSmrg          BITSET_TEST(g->regs->regs[r].conflicts, g->nodes[n2].reg)) {
56401e04c3fSmrg         return true;
56501e04c3fSmrg      }
56601e04c3fSmrg   }
56701e04c3fSmrg
56801e04c3fSmrg   return false;
56901e04c3fSmrg}
57001e04c3fSmrg
57101e04c3fSmrg/* Computes a bitfield of what regs are available for a given register
57201e04c3fSmrg * selection.
57301e04c3fSmrg *
57401e04c3fSmrg * This lets drivers implement a more complicated policy than our simple first
57501e04c3fSmrg * or round robin policies (which don't require knowing the whole bitset)
57601e04c3fSmrg */
57701e04c3fSmrgstatic bool
57801e04c3fSmrgra_compute_available_regs(struct ra_graph *g, unsigned int n, BITSET_WORD *regs)
57901e04c3fSmrg{
58001e04c3fSmrg   struct ra_class *c = g->regs->classes[g->nodes[n].class];
58101e04c3fSmrg
58201e04c3fSmrg   /* Populate with the set of regs that are in the node's class. */
58301e04c3fSmrg   memcpy(regs, c->regs, BITSET_WORDS(g->regs->count) * sizeof(BITSET_WORD));
58401e04c3fSmrg
58501e04c3fSmrg   /* Remove any regs that conflict with nodes that we're adjacent to and have
58601e04c3fSmrg    * already colored.
58701e04c3fSmrg    */
58801e04c3fSmrg   for (int i = 0; i < g->nodes[n].adjacency_count; i++) {
58901e04c3fSmrg      unsigned int n2 = g->nodes[n].adjacency_list[i];
59001e04c3fSmrg      unsigned int r = g->nodes[n2].reg;
59101e04c3fSmrg
59201e04c3fSmrg      if (!g->nodes[n2].in_stack) {
59301e04c3fSmrg         for (int j = 0; j < BITSET_WORDS(g->regs->count); j++)
59401e04c3fSmrg            regs[j] &= ~g->regs->regs[r].conflicts[j];
59501e04c3fSmrg      }
59601e04c3fSmrg   }
59701e04c3fSmrg
59801e04c3fSmrg   for (int i = 0; i < BITSET_WORDS(g->regs->count); i++) {
59901e04c3fSmrg      if (regs[i])
60001e04c3fSmrg         return true;
60101e04c3fSmrg   }
60201e04c3fSmrg
60301e04c3fSmrg   return false;
60401e04c3fSmrg}
60501e04c3fSmrg
60601e04c3fSmrg/**
60701e04c3fSmrg * Pops nodes from the stack back into the graph, coloring them with
60801e04c3fSmrg * registers as they go.
60901e04c3fSmrg *
61001e04c3fSmrg * If all nodes were trivially colorable, then this must succeed.  If
61101e04c3fSmrg * not (optimistic coloring), then it may return false;
61201e04c3fSmrg */
61301e04c3fSmrgstatic bool
61401e04c3fSmrgra_select(struct ra_graph *g)
61501e04c3fSmrg{
61601e04c3fSmrg   int start_search_reg = 0;
61701e04c3fSmrg   BITSET_WORD *select_regs = NULL;
61801e04c3fSmrg
61901e04c3fSmrg   if (g->select_reg_callback)
62001e04c3fSmrg      select_regs = malloc(BITSET_WORDS(g->regs->count) * sizeof(BITSET_WORD));
62101e04c3fSmrg
62201e04c3fSmrg   while (g->stack_count != 0) {
62301e04c3fSmrg      unsigned int ri;
62401e04c3fSmrg      unsigned int r = -1;
62501e04c3fSmrg      int n = g->stack[g->stack_count - 1];
62601e04c3fSmrg      struct ra_class *c = g->regs->classes[g->nodes[n].class];
62701e04c3fSmrg
62801e04c3fSmrg      /* set this to false even if we return here so that
62901e04c3fSmrg       * ra_get_best_spill_node() considers this node later.
63001e04c3fSmrg       */
63101e04c3fSmrg      g->nodes[n].in_stack = false;
63201e04c3fSmrg
63301e04c3fSmrg      if (g->select_reg_callback) {
63401e04c3fSmrg         if (!ra_compute_available_regs(g, n, select_regs)) {
63501e04c3fSmrg            free(select_regs);
63601e04c3fSmrg            return false;
63701e04c3fSmrg         }
63801e04c3fSmrg
63901e04c3fSmrg         r = g->select_reg_callback(g, select_regs, g->select_reg_callback_data);
64001e04c3fSmrg      } else {
64101e04c3fSmrg         /* Find the lowest-numbered reg which is not used by a member
64201e04c3fSmrg          * of the graph adjacent to us.
64301e04c3fSmrg          */
64401e04c3fSmrg         for (ri = 0; ri < g->regs->count; ri++) {
64501e04c3fSmrg            r = (start_search_reg + ri) % g->regs->count;
64601e04c3fSmrg            if (!reg_belongs_to_class(r, c))
64701e04c3fSmrg               continue;
64801e04c3fSmrg
64901e04c3fSmrg            if (!ra_any_neighbors_conflict(g, n, r))
65001e04c3fSmrg               break;
65101e04c3fSmrg         }
65201e04c3fSmrg
65301e04c3fSmrg         if (ri >= g->regs->count)
65401e04c3fSmrg            return false;
65501e04c3fSmrg      }
65601e04c3fSmrg
65701e04c3fSmrg      g->nodes[n].reg = r;
65801e04c3fSmrg      g->stack_count--;
65901e04c3fSmrg
66001e04c3fSmrg      /* Rotate the starting point except for any nodes above the lowest
66101e04c3fSmrg       * optimistically colorable node.  The likelihood that we will succeed
66201e04c3fSmrg       * at allocating optimistically colorable nodes is highly dependent on
66301e04c3fSmrg       * the way that the previous nodes popped off the stack are laid out.
66401e04c3fSmrg       * The round-robin strategy increases the fragmentation of the register
66501e04c3fSmrg       * file and decreases the number of nearby nodes assigned to the same
66601e04c3fSmrg       * color, what increases the likelihood of spilling with respect to the
66701e04c3fSmrg       * dense packing strategy.
66801e04c3fSmrg       */
66901e04c3fSmrg      if (g->regs->round_robin &&
67001e04c3fSmrg          g->stack_count - 1 <= g->stack_optimistic_start)
67101e04c3fSmrg         start_search_reg = r + 1;
67201e04c3fSmrg   }
67301e04c3fSmrg
67401e04c3fSmrg   free(select_regs);
67501e04c3fSmrg
67601e04c3fSmrg   return true;
67701e04c3fSmrg}
67801e04c3fSmrg
67901e04c3fSmrgbool
68001e04c3fSmrgra_allocate(struct ra_graph *g)
68101e04c3fSmrg{
68201e04c3fSmrg   ra_simplify(g);
68301e04c3fSmrg   return ra_select(g);
68401e04c3fSmrg}
68501e04c3fSmrg
68601e04c3fSmrgunsigned int
68701e04c3fSmrgra_get_node_reg(struct ra_graph *g, unsigned int n)
68801e04c3fSmrg{
68901e04c3fSmrg   return g->nodes[n].reg;
69001e04c3fSmrg}
69101e04c3fSmrg
69201e04c3fSmrg/**
69301e04c3fSmrg * Forces a node to a specific register.  This can be used to avoid
69401e04c3fSmrg * creating a register class containing one node when handling data
69501e04c3fSmrg * that must live in a fixed location and is known to not conflict
69601e04c3fSmrg * with other forced register assignment (as is common with shader
69701e04c3fSmrg * input data).  These nodes do not end up in the stack during
69801e04c3fSmrg * ra_simplify(), and thus at ra_select() time it is as if they were
69901e04c3fSmrg * the first popped off the stack and assigned their fixed locations.
70001e04c3fSmrg * Nodes that use this function do not need to be assigned a register
70101e04c3fSmrg * class.
70201e04c3fSmrg *
70301e04c3fSmrg * Must be called before ra_simplify().
70401e04c3fSmrg */
70501e04c3fSmrgvoid
70601e04c3fSmrgra_set_node_reg(struct ra_graph *g, unsigned int n, unsigned int reg)
70701e04c3fSmrg{
70801e04c3fSmrg   g->nodes[n].reg = reg;
70901e04c3fSmrg   g->nodes[n].in_stack = false;
71001e04c3fSmrg}
71101e04c3fSmrg
71201e04c3fSmrgstatic float
71301e04c3fSmrgra_get_spill_benefit(struct ra_graph *g, unsigned int n)
71401e04c3fSmrg{
71501e04c3fSmrg   unsigned int j;
71601e04c3fSmrg   float benefit = 0;
71701e04c3fSmrg   int n_class = g->nodes[n].class;
71801e04c3fSmrg
71901e04c3fSmrg   /* Define the benefit of eliminating an interference between n, n2
72001e04c3fSmrg    * through spilling as q(C, B) / p(C).  This is similar to the
72101e04c3fSmrg    * "count number of edges" approach of traditional graph coloring,
72201e04c3fSmrg    * but takes classes into account.
72301e04c3fSmrg    */
72401e04c3fSmrg   for (j = 0; j < g->nodes[n].adjacency_count; j++) {
72501e04c3fSmrg      unsigned int n2 = g->nodes[n].adjacency_list[j];
72601e04c3fSmrg      unsigned int n2_class = g->nodes[n2].class;
72701e04c3fSmrg      benefit += ((float)g->regs->classes[n_class]->q[n2_class] /
72801e04c3fSmrg                  g->regs->classes[n_class]->p);
72901e04c3fSmrg   }
73001e04c3fSmrg
73101e04c3fSmrg   return benefit;
73201e04c3fSmrg}
73301e04c3fSmrg
73401e04c3fSmrg/**
73501e04c3fSmrg * Returns a node number to be spilled according to the cost/benefit using
73601e04c3fSmrg * the pq test, or -1 if there are no spillable nodes.
73701e04c3fSmrg */
73801e04c3fSmrgint
73901e04c3fSmrgra_get_best_spill_node(struct ra_graph *g)
74001e04c3fSmrg{
74101e04c3fSmrg   unsigned int best_node = -1;
74201e04c3fSmrg   float best_benefit = 0.0;
74301e04c3fSmrg   unsigned int n;
74401e04c3fSmrg
74501e04c3fSmrg   /* Consider any nodes that we colored successfully or the node we failed to
74601e04c3fSmrg    * color for spilling. When we failed to color a node in ra_select(), we
74701e04c3fSmrg    * only considered these nodes, so spilling any other ones would not result
74801e04c3fSmrg    * in us making progress.
74901e04c3fSmrg    */
75001e04c3fSmrg   for (n = 0; n < g->count; n++) {
75101e04c3fSmrg      float cost = g->nodes[n].spill_cost;
75201e04c3fSmrg      float benefit;
75301e04c3fSmrg
75401e04c3fSmrg      if (cost <= 0.0f)
75501e04c3fSmrg	 continue;
75601e04c3fSmrg
75701e04c3fSmrg      if (g->nodes[n].in_stack)
75801e04c3fSmrg         continue;
75901e04c3fSmrg
76001e04c3fSmrg      benefit = ra_get_spill_benefit(g, n);
76101e04c3fSmrg
76201e04c3fSmrg      if (benefit / cost > best_benefit) {
76301e04c3fSmrg	 best_benefit = benefit / cost;
76401e04c3fSmrg	 best_node = n;
76501e04c3fSmrg      }
76601e04c3fSmrg   }
76701e04c3fSmrg
76801e04c3fSmrg   return best_node;
76901e04c3fSmrg}
77001e04c3fSmrg
77101e04c3fSmrg/**
77201e04c3fSmrg * Only nodes with a spill cost set (cost != 0.0) will be considered
77301e04c3fSmrg * for register spilling.
77401e04c3fSmrg */
77501e04c3fSmrgvoid
77601e04c3fSmrgra_set_node_spill_cost(struct ra_graph *g, unsigned int n, float cost)
77701e04c3fSmrg{
77801e04c3fSmrg   g->nodes[n].spill_cost = cost;
77901e04c3fSmrg}
780