drm_mode.h revision 5324fb0d
122944501Smrg/*
222944501Smrg * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
322944501Smrg * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
422944501Smrg * Copyright (c) 2008 Red Hat Inc.
522944501Smrg * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
622944501Smrg * Copyright (c) 2007-2008 Intel Corporation
722944501Smrg *
822944501Smrg * Permission is hereby granted, free of charge, to any person obtaining a
922944501Smrg * copy of this software and associated documentation files (the "Software"),
1022944501Smrg * to deal in the Software without restriction, including without limitation
1122944501Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
1222944501Smrg * and/or sell copies of the Software, and to permit persons to whom the
1322944501Smrg * Software is furnished to do so, subject to the following conditions:
1422944501Smrg *
1522944501Smrg * The above copyright notice and this permission notice shall be included in
1622944501Smrg * all copies or substantial portions of the Software.
1722944501Smrg *
1822944501Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
1922944501Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
2022944501Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
2122944501Smrg * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
2222944501Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
2322944501Smrg * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
2422944501Smrg * IN THE SOFTWARE.
2522944501Smrg */
2622944501Smrg
2722944501Smrg#ifndef _DRM_MODE_H
2822944501Smrg#define _DRM_MODE_H
2922944501Smrg
303f012e29Smrg#include "drm.h"
313f012e29Smrg
32037b3c26Smrg#if defined(__cplusplus)
33037b3c26Smrgextern "C" {
34037b3c26Smrg#endif
35037b3c26Smrg
3622944501Smrg#define DRM_CONNECTOR_NAME_LEN	32
3722944501Smrg#define DRM_DISPLAY_MODE_LEN	32
3822944501Smrg#define DRM_PROP_NAME_LEN	32
3922944501Smrg
407cdc0497Smrg#define DRM_MODE_TYPE_BUILTIN	(1<<0) /* deprecated */
417cdc0497Smrg#define DRM_MODE_TYPE_CLOCK_C	((1<<1) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
427cdc0497Smrg#define DRM_MODE_TYPE_CRTC_C	((1<<2) | DRM_MODE_TYPE_BUILTIN) /* deprecated */
4322944501Smrg#define DRM_MODE_TYPE_PREFERRED	(1<<3)
447cdc0497Smrg#define DRM_MODE_TYPE_DEFAULT	(1<<4) /* deprecated */
4522944501Smrg#define DRM_MODE_TYPE_USERDEF	(1<<5)
4622944501Smrg#define DRM_MODE_TYPE_DRIVER	(1<<6)
4722944501Smrg
487cdc0497Smrg#define DRM_MODE_TYPE_ALL	(DRM_MODE_TYPE_PREFERRED |	\
497cdc0497Smrg				 DRM_MODE_TYPE_USERDEF |	\
507cdc0497Smrg				 DRM_MODE_TYPE_DRIVER)
517cdc0497Smrg
5222944501Smrg/* Video mode flags */
53d8807b2fSmrg/* bit compatible with the xrandr RR_ definitions (bits 0-13)
54d8807b2fSmrg *
55d8807b2fSmrg * ABI warning: Existing userspace really expects
56d8807b2fSmrg * the mode flags to match the xrandr definitions. Any
57d8807b2fSmrg * changes that don't match the xrandr definitions will
58d8807b2fSmrg * likely need a new client cap or some other mechanism
59d8807b2fSmrg * to avoid breaking existing userspace. This includes
60d8807b2fSmrg * allocating new flags in the previously unused bits!
61d8807b2fSmrg */
62e88f27b3Smrg#define DRM_MODE_FLAG_PHSYNC			(1<<0)
63e88f27b3Smrg#define DRM_MODE_FLAG_NHSYNC			(1<<1)
64e88f27b3Smrg#define DRM_MODE_FLAG_PVSYNC			(1<<2)
65e88f27b3Smrg#define DRM_MODE_FLAG_NVSYNC			(1<<3)
66e88f27b3Smrg#define DRM_MODE_FLAG_INTERLACE			(1<<4)
67e88f27b3Smrg#define DRM_MODE_FLAG_DBLSCAN			(1<<5)
68e88f27b3Smrg#define DRM_MODE_FLAG_CSYNC			(1<<6)
69e88f27b3Smrg#define DRM_MODE_FLAG_PCSYNC			(1<<7)
70e88f27b3Smrg#define DRM_MODE_FLAG_NCSYNC			(1<<8)
71e88f27b3Smrg#define DRM_MODE_FLAG_HSKEW			(1<<9) /* hskew provided */
727cdc0497Smrg#define DRM_MODE_FLAG_BCAST			(1<<10) /* deprecated */
737cdc0497Smrg#define DRM_MODE_FLAG_PIXMUX			(1<<11) /* deprecated */
74e88f27b3Smrg#define DRM_MODE_FLAG_DBLCLK			(1<<12)
75e88f27b3Smrg#define DRM_MODE_FLAG_CLKDIV2			(1<<13)
763f012e29Smrg /*
773f012e29Smrg  * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
783f012e29Smrg  * (define not exposed to user space).
793f012e29Smrg  */
80e88f27b3Smrg#define DRM_MODE_FLAG_3D_MASK			(0x1f<<14)
8100a23bdaSmrg#define  DRM_MODE_FLAG_3D_NONE		(0<<14)
82e88f27b3Smrg#define  DRM_MODE_FLAG_3D_FRAME_PACKING		(1<<14)
83e88f27b3Smrg#define  DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE	(2<<14)
84e88f27b3Smrg#define  DRM_MODE_FLAG_3D_LINE_ALTERNATIVE	(3<<14)
85e88f27b3Smrg#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL	(4<<14)
86e88f27b3Smrg#define  DRM_MODE_FLAG_3D_L_DEPTH		(5<<14)
87e88f27b3Smrg#define  DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH	(6<<14)
88e88f27b3Smrg#define  DRM_MODE_FLAG_3D_TOP_AND_BOTTOM	(7<<14)
89e88f27b3Smrg#define  DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF	(8<<14)
90e88f27b3Smrg
9100a23bdaSmrg/* Picture aspect ratio options */
9200a23bdaSmrg#define DRM_MODE_PICTURE_ASPECT_NONE		0
9300a23bdaSmrg#define DRM_MODE_PICTURE_ASPECT_4_3		1
9400a23bdaSmrg#define DRM_MODE_PICTURE_ASPECT_16_9		2
957cdc0497Smrg#define DRM_MODE_PICTURE_ASPECT_64_27		3
967cdc0497Smrg#define DRM_MODE_PICTURE_ASPECT_256_135		4
977cdc0497Smrg
987cdc0497Smrg/* Content type options */
997cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_NO_DATA		0
1007cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_GRAPHICS		1
1017cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_PHOTO		2
1027cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_CINEMA		3
1037cdc0497Smrg#define DRM_MODE_CONTENT_TYPE_GAME		4
10400a23bdaSmrg
10500a23bdaSmrg/* Aspect ratio flag bitmask (4 bits 22:19) */
10600a23bdaSmrg#define DRM_MODE_FLAG_PIC_AR_MASK		(0x0F<<19)
10700a23bdaSmrg#define  DRM_MODE_FLAG_PIC_AR_NONE \
10800a23bdaSmrg			(DRM_MODE_PICTURE_ASPECT_NONE<<19)
10900a23bdaSmrg#define  DRM_MODE_FLAG_PIC_AR_4_3 \
11000a23bdaSmrg			(DRM_MODE_PICTURE_ASPECT_4_3<<19)
11100a23bdaSmrg#define  DRM_MODE_FLAG_PIC_AR_16_9 \
11200a23bdaSmrg			(DRM_MODE_PICTURE_ASPECT_16_9<<19)
1137cdc0497Smrg#define  DRM_MODE_FLAG_PIC_AR_64_27 \
1147cdc0497Smrg			(DRM_MODE_PICTURE_ASPECT_64_27<<19)
1157cdc0497Smrg#define  DRM_MODE_FLAG_PIC_AR_256_135 \
1167cdc0497Smrg			(DRM_MODE_PICTURE_ASPECT_256_135<<19)
1177cdc0497Smrg
1187cdc0497Smrg#define  DRM_MODE_FLAG_ALL	(DRM_MODE_FLAG_PHSYNC |		\
1197cdc0497Smrg				 DRM_MODE_FLAG_NHSYNC |		\
1207cdc0497Smrg				 DRM_MODE_FLAG_PVSYNC |		\
1217cdc0497Smrg				 DRM_MODE_FLAG_NVSYNC |		\
1227cdc0497Smrg				 DRM_MODE_FLAG_INTERLACE |	\
1237cdc0497Smrg				 DRM_MODE_FLAG_DBLSCAN |	\
1247cdc0497Smrg				 DRM_MODE_FLAG_CSYNC |		\
1257cdc0497Smrg				 DRM_MODE_FLAG_PCSYNC |		\
1267cdc0497Smrg				 DRM_MODE_FLAG_NCSYNC |		\
1277cdc0497Smrg				 DRM_MODE_FLAG_HSKEW |		\
1287cdc0497Smrg				 DRM_MODE_FLAG_DBLCLK |		\
1297cdc0497Smrg				 DRM_MODE_FLAG_CLKDIV2 |	\
1307cdc0497Smrg				 DRM_MODE_FLAG_3D_MASK)
13122944501Smrg
13222944501Smrg/* DPMS flags */
13322944501Smrg/* bit compatible with the xorg definitions. */
13422944501Smrg#define DRM_MODE_DPMS_ON	0
13522944501Smrg#define DRM_MODE_DPMS_STANDBY	1
13622944501Smrg#define DRM_MODE_DPMS_SUSPEND	2
13722944501Smrg#define DRM_MODE_DPMS_OFF	3
13822944501Smrg
13922944501Smrg/* Scaling mode options */
14022944501Smrg#define DRM_MODE_SCALE_NONE		0 /* Unmodified timing (display or
14122944501Smrg					     software can still scale) */
14222944501Smrg#define DRM_MODE_SCALE_FULLSCREEN	1 /* Full screen, ignore aspect */
14322944501Smrg#define DRM_MODE_SCALE_CENTER		2 /* Centered, no scaling */
14422944501Smrg#define DRM_MODE_SCALE_ASPECT		3 /* Full screen, preserve aspect */
14522944501Smrg
14622944501Smrg/* Dithering mode options */
14722944501Smrg#define DRM_MODE_DITHERING_OFF	0
14822944501Smrg#define DRM_MODE_DITHERING_ON	1
149d049871aSmrg#define DRM_MODE_DITHERING_AUTO 2
15022944501Smrg
15113d1d17dSmrg/* Dirty info options */
15213d1d17dSmrg#define DRM_MODE_DIRTY_OFF      0
15313d1d17dSmrg#define DRM_MODE_DIRTY_ON       1
15413d1d17dSmrg#define DRM_MODE_DIRTY_ANNOTATE 2
15513d1d17dSmrg
156d8807b2fSmrg/* Link Status options */
157d8807b2fSmrg#define DRM_MODE_LINK_STATUS_GOOD	0
158d8807b2fSmrg#define DRM_MODE_LINK_STATUS_BAD	1
159d8807b2fSmrg
16000a23bdaSmrg/*
16100a23bdaSmrg * DRM_MODE_ROTATE_<degrees>
16200a23bdaSmrg *
16300a23bdaSmrg * Signals that a drm plane is been rotated <degrees> degrees in counter
16400a23bdaSmrg * clockwise direction.
16500a23bdaSmrg *
16600a23bdaSmrg * This define is provided as a convenience, looking up the property id
16700a23bdaSmrg * using the name->prop id lookup is the preferred method.
16800a23bdaSmrg */
16900a23bdaSmrg#define DRM_MODE_ROTATE_0       (1<<0)
17000a23bdaSmrg#define DRM_MODE_ROTATE_90      (1<<1)
17100a23bdaSmrg#define DRM_MODE_ROTATE_180     (1<<2)
17200a23bdaSmrg#define DRM_MODE_ROTATE_270     (1<<3)
17300a23bdaSmrg
17400a23bdaSmrg/*
17500a23bdaSmrg * DRM_MODE_ROTATE_MASK
17600a23bdaSmrg *
17700a23bdaSmrg * Bitmask used to look for drm plane rotations.
17800a23bdaSmrg */
17900a23bdaSmrg#define DRM_MODE_ROTATE_MASK (\
18000a23bdaSmrg		DRM_MODE_ROTATE_0  | \
18100a23bdaSmrg		DRM_MODE_ROTATE_90  | \
18200a23bdaSmrg		DRM_MODE_ROTATE_180 | \
18300a23bdaSmrg		DRM_MODE_ROTATE_270)
18400a23bdaSmrg
18500a23bdaSmrg/*
18600a23bdaSmrg * DRM_MODE_REFLECT_<axis>
18700a23bdaSmrg *
1887cdc0497Smrg * Signals that the contents of a drm plane is reflected along the <axis> axis,
18900a23bdaSmrg * in the same way as mirroring.
1907cdc0497Smrg * See kerneldoc chapter "Plane Composition Properties" for more details.
19100a23bdaSmrg *
19200a23bdaSmrg * This define is provided as a convenience, looking up the property id
19300a23bdaSmrg * using the name->prop id lookup is the preferred method.
19400a23bdaSmrg */
19500a23bdaSmrg#define DRM_MODE_REFLECT_X      (1<<4)
19600a23bdaSmrg#define DRM_MODE_REFLECT_Y      (1<<5)
19700a23bdaSmrg
19800a23bdaSmrg/*
19900a23bdaSmrg * DRM_MODE_REFLECT_MASK
20000a23bdaSmrg *
20100a23bdaSmrg * Bitmask used to look for drm plane reflections.
20200a23bdaSmrg */
20300a23bdaSmrg#define DRM_MODE_REFLECT_MASK (\
20400a23bdaSmrg		DRM_MODE_REFLECT_X | \
20500a23bdaSmrg		DRM_MODE_REFLECT_Y)
20600a23bdaSmrg
2077cdc0497Smrg/* Content Protection Flags */
2087cdc0497Smrg#define DRM_MODE_CONTENT_PROTECTION_UNDESIRED	0
2097cdc0497Smrg#define DRM_MODE_CONTENT_PROTECTION_DESIRED     1
2107cdc0497Smrg#define DRM_MODE_CONTENT_PROTECTION_ENABLED     2
21100a23bdaSmrg
21222944501Smrgstruct drm_mode_modeinfo {
21322944501Smrg	__u32 clock;
2143f012e29Smrg	__u16 hdisplay;
2153f012e29Smrg	__u16 hsync_start;
2163f012e29Smrg	__u16 hsync_end;
2173f012e29Smrg	__u16 htotal;
2183f012e29Smrg	__u16 hskew;
2193f012e29Smrg	__u16 vdisplay;
2203f012e29Smrg	__u16 vsync_start;
2213f012e29Smrg	__u16 vsync_end;
2223f012e29Smrg	__u16 vtotal;
2233f012e29Smrg	__u16 vscan;
22422944501Smrg
225d049871aSmrg	__u32 vrefresh;
22622944501Smrg
22722944501Smrg	__u32 flags;
22822944501Smrg	__u32 type;
22922944501Smrg	char name[DRM_DISPLAY_MODE_LEN];
23022944501Smrg};
23122944501Smrg
23222944501Smrgstruct drm_mode_card_res {
23322944501Smrg	__u64 fb_id_ptr;
23422944501Smrg	__u64 crtc_id_ptr;
23522944501Smrg	__u64 connector_id_ptr;
23622944501Smrg	__u64 encoder_id_ptr;
23722944501Smrg	__u32 count_fbs;
23822944501Smrg	__u32 count_crtcs;
23922944501Smrg	__u32 count_connectors;
24022944501Smrg	__u32 count_encoders;
2413f012e29Smrg	__u32 min_width;
2423f012e29Smrg	__u32 max_width;
2433f012e29Smrg	__u32 min_height;
2443f012e29Smrg	__u32 max_height;
24522944501Smrg};
24622944501Smrg
24722944501Smrgstruct drm_mode_crtc {
24822944501Smrg	__u64 set_connectors_ptr;
24922944501Smrg	__u32 count_connectors;
25022944501Smrg
25122944501Smrg	__u32 crtc_id; /**< Id */
25222944501Smrg	__u32 fb_id; /**< Id of framebuffer */
25322944501Smrg
2543f012e29Smrg	__u32 x; /**< x Position on the framebuffer */
2553f012e29Smrg	__u32 y; /**< y Position on the framebuffer */
25622944501Smrg
25722944501Smrg	__u32 gamma_size;
25822944501Smrg	__u32 mode_valid;
25922944501Smrg	struct drm_mode_modeinfo mode;
26022944501Smrg};
26122944501Smrg
2623f012e29Smrg#define DRM_MODE_PRESENT_TOP_FIELD	(1<<0)
2633f012e29Smrg#define DRM_MODE_PRESENT_BOTTOM_FIELD	(1<<1)
264e88f27b3Smrg
265e88f27b3Smrg/* Planes blend with or override other bits on the CRTC */
266e88f27b3Smrgstruct drm_mode_set_plane {
267e88f27b3Smrg	__u32 plane_id;
268e88f27b3Smrg	__u32 crtc_id;
269e88f27b3Smrg	__u32 fb_id; /* fb object contains surface format type */
2703f012e29Smrg	__u32 flags; /* see above flags */
271e88f27b3Smrg
272e88f27b3Smrg	/* Signed dest location allows it to be partially off screen */
2733f012e29Smrg	__s32 crtc_x;
2743f012e29Smrg	__s32 crtc_y;
2753f012e29Smrg	__u32 crtc_w;
2763f012e29Smrg	__u32 crtc_h;
277e88f27b3Smrg
278e88f27b3Smrg	/* Source values are 16.16 fixed point */
2793f012e29Smrg	__u32 src_x;
2803f012e29Smrg	__u32 src_y;
2813f012e29Smrg	__u32 src_h;
2823f012e29Smrg	__u32 src_w;
283e88f27b3Smrg};
284e88f27b3Smrg
285e88f27b3Smrgstruct drm_mode_get_plane {
286e88f27b3Smrg	__u32 plane_id;
287e88f27b3Smrg
288e88f27b3Smrg	__u32 crtc_id;
289e88f27b3Smrg	__u32 fb_id;
290e88f27b3Smrg
291e88f27b3Smrg	__u32 possible_crtcs;
292e88f27b3Smrg	__u32 gamma_size;
293e88f27b3Smrg
294e88f27b3Smrg	__u32 count_format_types;
295e88f27b3Smrg	__u64 format_type_ptr;
296e88f27b3Smrg};
297e88f27b3Smrg
298e88f27b3Smrgstruct drm_mode_get_plane_res {
299e88f27b3Smrg	__u64 plane_id_ptr;
300e88f27b3Smrg	__u32 count_planes;
301e88f27b3Smrg};
302e88f27b3Smrg
30322944501Smrg#define DRM_MODE_ENCODER_NONE	0
30422944501Smrg#define DRM_MODE_ENCODER_DAC	1
30522944501Smrg#define DRM_MODE_ENCODER_TMDS	2
30622944501Smrg#define DRM_MODE_ENCODER_LVDS	3
30722944501Smrg#define DRM_MODE_ENCODER_TVDAC	4
30808d7334dSsnj#define DRM_MODE_ENCODER_VIRTUAL 5
30908d7334dSsnj#define DRM_MODE_ENCODER_DSI	6
31008d7334dSsnj#define DRM_MODE_ENCODER_DPMST	7
311037b3c26Smrg#define DRM_MODE_ENCODER_DPI	8
31222944501Smrg
31322944501Smrgstruct drm_mode_get_encoder {
31422944501Smrg	__u32 encoder_id;
31522944501Smrg	__u32 encoder_type;
31622944501Smrg
31722944501Smrg	__u32 crtc_id; /**< Id of crtc */
31822944501Smrg
31922944501Smrg	__u32 possible_crtcs;
32022944501Smrg	__u32 possible_clones;
32122944501Smrg};
32222944501Smrg
32322944501Smrg/* This is for connectors with multiple signal types. */
32422944501Smrg/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
325d8807b2fSmrgenum drm_mode_subconnector {
326d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_Automatic = 0,
327d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_Unknown = 0,
328d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_DVID = 3,
329d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_DVIA = 4,
330d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_Composite = 5,
331d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_SVIDEO = 6,
332d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_Component = 8,
333d8807b2fSmrg	DRM_MODE_SUBCONNECTOR_SCART = 9,
334d8807b2fSmrg};
33522944501Smrg
33622944501Smrg#define DRM_MODE_CONNECTOR_Unknown	0
33722944501Smrg#define DRM_MODE_CONNECTOR_VGA		1
33822944501Smrg#define DRM_MODE_CONNECTOR_DVII		2
33922944501Smrg#define DRM_MODE_CONNECTOR_DVID		3
34022944501Smrg#define DRM_MODE_CONNECTOR_DVIA		4
34122944501Smrg#define DRM_MODE_CONNECTOR_Composite	5
34222944501Smrg#define DRM_MODE_CONNECTOR_SVIDEO	6
34322944501Smrg#define DRM_MODE_CONNECTOR_LVDS		7
34422944501Smrg#define DRM_MODE_CONNECTOR_Component	8
34522944501Smrg#define DRM_MODE_CONNECTOR_9PinDIN	9
34622944501Smrg#define DRM_MODE_CONNECTOR_DisplayPort	10
34722944501Smrg#define DRM_MODE_CONNECTOR_HDMIA	11
34822944501Smrg#define DRM_MODE_CONNECTOR_HDMIB	12
34922944501Smrg#define DRM_MODE_CONNECTOR_TV		13
350d049871aSmrg#define DRM_MODE_CONNECTOR_eDP		14
35108d7334dSsnj#define DRM_MODE_CONNECTOR_VIRTUAL      15
35208d7334dSsnj#define DRM_MODE_CONNECTOR_DSI		16
353037b3c26Smrg#define DRM_MODE_CONNECTOR_DPI		17
3547cdc0497Smrg#define DRM_MODE_CONNECTOR_WRITEBACK	18
35522944501Smrg
35622944501Smrgstruct drm_mode_get_connector {
35722944501Smrg
35822944501Smrg	__u64 encoders_ptr;
35922944501Smrg	__u64 modes_ptr;
36022944501Smrg	__u64 props_ptr;
36122944501Smrg	__u64 prop_values_ptr;
36222944501Smrg
36322944501Smrg	__u32 count_modes;
36422944501Smrg	__u32 count_props;
36522944501Smrg	__u32 count_encoders;
36622944501Smrg
36722944501Smrg	__u32 encoder_id; /**< Current Encoder */
36822944501Smrg	__u32 connector_id; /**< Id */
36922944501Smrg	__u32 connector_type;
37022944501Smrg	__u32 connector_type_id;
37122944501Smrg
37222944501Smrg	__u32 connection;
3733f012e29Smrg	__u32 mm_width;  /**< width in millimeters */
3743f012e29Smrg	__u32 mm_height; /**< height in millimeters */
37522944501Smrg	__u32 subpixel;
3763f012e29Smrg
3773f012e29Smrg	__u32 pad;
37822944501Smrg};
37922944501Smrg
3807cdc0497Smrg#define DRM_MODE_PROP_PENDING	(1<<0) /* deprecated, do not use */
38122944501Smrg#define DRM_MODE_PROP_RANGE	(1<<1)
38222944501Smrg#define DRM_MODE_PROP_IMMUTABLE	(1<<2)
38322944501Smrg#define DRM_MODE_PROP_ENUM	(1<<3) /* enumerated type with text strings */
38422944501Smrg#define DRM_MODE_PROP_BLOB	(1<<4)
385e88f27b3Smrg#define DRM_MODE_PROP_BITMASK	(1<<5) /* bitmask of enumerated types */
38622944501Smrg
38708d7334dSsnj/* non-extended types: legacy bitmask, one bit per type: */
38808d7334dSsnj#define DRM_MODE_PROP_LEGACY_TYPE  ( \
38908d7334dSsnj		DRM_MODE_PROP_RANGE | \
39008d7334dSsnj		DRM_MODE_PROP_ENUM | \
39108d7334dSsnj		DRM_MODE_PROP_BLOB | \
39208d7334dSsnj		DRM_MODE_PROP_BITMASK)
39308d7334dSsnj
39408d7334dSsnj/* extended-types: rather than continue to consume a bit per type,
39508d7334dSsnj * grab a chunk of the bits to use as integer type id.
39608d7334dSsnj */
39708d7334dSsnj#define DRM_MODE_PROP_EXTENDED_TYPE	0x0000ffc0
39808d7334dSsnj#define DRM_MODE_PROP_TYPE(n)		((n) << 6)
39908d7334dSsnj#define DRM_MODE_PROP_OBJECT		DRM_MODE_PROP_TYPE(1)
40008d7334dSsnj#define DRM_MODE_PROP_SIGNED_RANGE	DRM_MODE_PROP_TYPE(2)
40108d7334dSsnj
4023f012e29Smrg/* the PROP_ATOMIC flag is used to hide properties from userspace that
4033f012e29Smrg * is not aware of atomic properties.  This is mostly to work around
4043f012e29Smrg * older userspace (DDX drivers) that read/write each prop they find,
4055324fb0dSmrg * without being aware that this could be triggering a lengthy modeset.
4063f012e29Smrg */
4073f012e29Smrg#define DRM_MODE_PROP_ATOMIC        0x80000000
4083f012e29Smrg
40922944501Smrgstruct drm_mode_property_enum {
41022944501Smrg	__u64 value;
41122944501Smrg	char name[DRM_PROP_NAME_LEN];
41222944501Smrg};
41322944501Smrg
41422944501Smrgstruct drm_mode_get_property {
41522944501Smrg	__u64 values_ptr; /* values and blob lengths */
41622944501Smrg	__u64 enum_blob_ptr; /* enum and blob id ptrs */
41722944501Smrg
41822944501Smrg	__u32 prop_id;
41922944501Smrg	__u32 flags;
42022944501Smrg	char name[DRM_PROP_NAME_LEN];
42122944501Smrg
42222944501Smrg	__u32 count_values;
4233f012e29Smrg	/* This is only used to count enum values, not blobs. The _blobs is
4243f012e29Smrg	 * simply because of a historical reason, i.e. backwards compat. */
42522944501Smrg	__u32 count_enum_blobs;
42622944501Smrg};
42722944501Smrg
42822944501Smrgstruct drm_mode_connector_set_property {
42922944501Smrg	__u64 value;
43022944501Smrg	__u32 prop_id;
43122944501Smrg	__u32 connector_id;
43222944501Smrg};
43322944501Smrg
434e88f27b3Smrg#define DRM_MODE_OBJECT_CRTC 0xcccccccc
435e88f27b3Smrg#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0
436e88f27b3Smrg#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0
437e88f27b3Smrg#define DRM_MODE_OBJECT_MODE 0xdededede
438e88f27b3Smrg#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0
439e88f27b3Smrg#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
440e88f27b3Smrg#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
441e88f27b3Smrg#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
4423f012e29Smrg#define DRM_MODE_OBJECT_ANY 0
443e88f27b3Smrg
444e88f27b3Smrgstruct drm_mode_obj_get_properties {
445e88f27b3Smrg	__u64 props_ptr;
446e88f27b3Smrg	__u64 prop_values_ptr;
447e88f27b3Smrg	__u32 count_props;
448e88f27b3Smrg	__u32 obj_id;
449e88f27b3Smrg	__u32 obj_type;
450e88f27b3Smrg};
451e88f27b3Smrg
452e88f27b3Smrgstruct drm_mode_obj_set_property {
453e88f27b3Smrg	__u64 value;
454e88f27b3Smrg	__u32 prop_id;
455e88f27b3Smrg	__u32 obj_id;
456e88f27b3Smrg	__u32 obj_type;
457e88f27b3Smrg};
458e88f27b3Smrg
45922944501Smrgstruct drm_mode_get_blob {
46022944501Smrg	__u32 blob_id;
46122944501Smrg	__u32 length;
46222944501Smrg	__u64 data;
46322944501Smrg};
46422944501Smrg
46522944501Smrgstruct drm_mode_fb_cmd {
46622944501Smrg	__u32 fb_id;
4673f012e29Smrg	__u32 width;
4683f012e29Smrg	__u32 height;
46922944501Smrg	__u32 pitch;
47022944501Smrg	__u32 bpp;
47122944501Smrg	__u32 depth;
47222944501Smrg	/* driver specific handle */
47322944501Smrg	__u32 handle;
47422944501Smrg};
47522944501Smrg
4763f012e29Smrg#define DRM_MODE_FB_INTERLACED	(1<<0) /* for interlaced framebuffers */
4773f012e29Smrg#define DRM_MODE_FB_MODIFIERS	(1<<1) /* enables ->modifer[] */
478e88f27b3Smrg
479e88f27b3Smrgstruct drm_mode_fb_cmd2 {
480e88f27b3Smrg	__u32 fb_id;
4813f012e29Smrg	__u32 width;
4823f012e29Smrg	__u32 height;
483e88f27b3Smrg	__u32 pixel_format; /* fourcc code from drm_fourcc.h */
4843f012e29Smrg	__u32 flags; /* see above flags */
485e88f27b3Smrg
486e88f27b3Smrg	/*
487e88f27b3Smrg	 * In case of planar formats, this ioctl allows up to 4
488e88f27b3Smrg	 * buffer objects with offsets and pitches per plane.
489e88f27b3Smrg	 * The pitch and offset order is dictated by the fourcc,
490e88f27b3Smrg	 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
491e88f27b3Smrg	 *
492e88f27b3Smrg	 *   YUV 4:2:0 image with a plane of 8 bit Y samples
493e88f27b3Smrg	 *   followed by an interleaved U/V plane containing
494e88f27b3Smrg	 *   8 bit 2x2 subsampled colour difference samples.
495e88f27b3Smrg	 *
4963f012e29Smrg	 * So it would consist of Y as offsets[0] and UV as
4973f012e29Smrg	 * offsets[1].  Note that offsets[0] will generally
4983f012e29Smrg	 * be 0 (but this is not required).
4993f012e29Smrg	 *
500d8807b2fSmrg	 * To accommodate tiled, compressed, etc formats, a
5013f012e29Smrg	 * modifier can be specified.  The default value of zero
5023f012e29Smrg	 * indicates "native" format as specified by the fourcc.
503d8807b2fSmrg	 * Vendor specific modifier token.  Note that even though
504d8807b2fSmrg	 * it looks like we have a modifier per-plane, we in fact
505d8807b2fSmrg	 * do not. The modifier for each plane must be identical.
506d8807b2fSmrg	 * Thus all combinations of different data layouts for
507d8807b2fSmrg	 * multi plane formats must be enumerated as separate
508d8807b2fSmrg	 * modifiers.
509e88f27b3Smrg	 */
510e88f27b3Smrg	__u32 handles[4];
511e88f27b3Smrg	__u32 pitches[4]; /* pitch for each plane */
512e88f27b3Smrg	__u32 offsets[4]; /* offset of each plane */
513d8807b2fSmrg	__u64 modifier[4]; /* ie, tiling, compress */
514e88f27b3Smrg};
515e88f27b3Smrg
51622944501Smrg#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
51722944501Smrg#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
51822944501Smrg#define DRM_MODE_FB_DIRTY_FLAGS         0x03
51922944501Smrg
5203f012e29Smrg#define DRM_MODE_FB_DIRTY_MAX_CLIPS     256
5213f012e29Smrg
52222944501Smrg/*
52322944501Smrg * Mark a region of a framebuffer as dirty.
52422944501Smrg *
52522944501Smrg * Some hardware does not automatically update display contents
52622944501Smrg * as a hardware or software draw to a framebuffer. This ioctl
52722944501Smrg * allows userspace to tell the kernel and the hardware what
52822944501Smrg * regions of the framebuffer have changed.
52922944501Smrg *
53022944501Smrg * The kernel or hardware is free to update more then just the
53122944501Smrg * region specified by the clip rects. The kernel or hardware
53222944501Smrg * may also delay and/or coalesce several calls to dirty into a
53322944501Smrg * single update.
53422944501Smrg *
53522944501Smrg * Userspace may annotate the updates, the annotates are a
53622944501Smrg * promise made by the caller that the change is either a copy
53722944501Smrg * of pixels or a fill of a single color in the region specified.
53822944501Smrg *
53922944501Smrg * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
54022944501Smrg * the number of updated regions are half of num_clips given,
54122944501Smrg * where the clip rects are paired in src and dst. The width and
54222944501Smrg * height of each one of the pairs must match.
54322944501Smrg *
54422944501Smrg * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
54522944501Smrg * promises that the region specified of the clip rects is filled
54622944501Smrg * completely with a single color as given in the color argument.
54722944501Smrg */
54822944501Smrg
54922944501Smrgstruct drm_mode_fb_dirty_cmd {
55022944501Smrg	__u32 fb_id;
55122944501Smrg	__u32 flags;
55222944501Smrg	__u32 color;
55322944501Smrg	__u32 num_clips;
55422944501Smrg	__u64 clips_ptr;
55522944501Smrg};
55622944501Smrg
55722944501Smrgstruct drm_mode_mode_cmd {
55822944501Smrg	__u32 connector_id;
55922944501Smrg	struct drm_mode_modeinfo mode;
56022944501Smrg};
56122944501Smrg
5623f012e29Smrg#define DRM_MODE_CURSOR_BO	0x01
5633f012e29Smrg#define DRM_MODE_CURSOR_MOVE	0x02
5643f012e29Smrg#define DRM_MODE_CURSOR_FLAGS	0x03
56522944501Smrg
56622944501Smrg/*
5673f012e29Smrg * depending on the value in flags different members are used.
56822944501Smrg *
56922944501Smrg * CURSOR_BO uses
5703f012e29Smrg *    crtc_id
57122944501Smrg *    width
57222944501Smrg *    height
5733f012e29Smrg *    handle - if 0 turns the cursor off
57422944501Smrg *
57522944501Smrg * CURSOR_MOVE uses
5763f012e29Smrg *    crtc_id
57722944501Smrg *    x
57822944501Smrg *    y
57922944501Smrg */
58022944501Smrgstruct drm_mode_cursor {
58122944501Smrg	__u32 flags;
58222944501Smrg	__u32 crtc_id;
58322944501Smrg	__s32 x;
58422944501Smrg	__s32 y;
58522944501Smrg	__u32 width;
58622944501Smrg	__u32 height;
58722944501Smrg	/* driver specific handle */
58822944501Smrg	__u32 handle;
58922944501Smrg};
59022944501Smrg
591e88f27b3Smrgstruct drm_mode_cursor2 {
592e88f27b3Smrg	__u32 flags;
593e88f27b3Smrg	__u32 crtc_id;
594e88f27b3Smrg	__s32 x;
595e88f27b3Smrg	__s32 y;
596e88f27b3Smrg	__u32 width;
597e88f27b3Smrg	__u32 height;
598e88f27b3Smrg	/* driver specific handle */
599e88f27b3Smrg	__u32 handle;
600e88f27b3Smrg	__s32 hot_x;
601e88f27b3Smrg	__s32 hot_y;
602e88f27b3Smrg};
603e88f27b3Smrg
60422944501Smrgstruct drm_mode_crtc_lut {
60522944501Smrg	__u32 crtc_id;
60622944501Smrg	__u32 gamma_size;
60722944501Smrg
60822944501Smrg	/* pointers to arrays */
60922944501Smrg	__u64 red;
61022944501Smrg	__u64 green;
61122944501Smrg	__u64 blue;
61222944501Smrg};
61322944501Smrg
6143f012e29Smrgstruct drm_color_ctm {
6157cdc0497Smrg	/*
6167cdc0497Smrg	 * Conversion matrix in S31.32 sign-magnitude
6177cdc0497Smrg	 * (not two's complement!) format.
6187cdc0497Smrg	 */
6197cdc0497Smrg	__u64 matrix[9];
6203f012e29Smrg};
6213f012e29Smrg
6223f012e29Smrgstruct drm_color_lut {
6233f012e29Smrg	/*
6245324fb0dSmrg	 * Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and
6255324fb0dSmrg	 * 0xffff == 1.0.
6263f012e29Smrg	 */
6273f012e29Smrg	__u16 red;
6283f012e29Smrg	__u16 green;
6293f012e29Smrg	__u16 blue;
6303f012e29Smrg	__u16 reserved;
6313f012e29Smrg};
6323f012e29Smrg
63322944501Smrg#define DRM_MODE_PAGE_FLIP_EVENT 0x01
634e88f27b3Smrg#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
635037b3c26Smrg#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
636037b3c26Smrg#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8
637037b3c26Smrg#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \
638037b3c26Smrg				   DRM_MODE_PAGE_FLIP_TARGET_RELATIVE)
639037b3c26Smrg#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \
640037b3c26Smrg				  DRM_MODE_PAGE_FLIP_ASYNC | \
641037b3c26Smrg				  DRM_MODE_PAGE_FLIP_TARGET)
64222944501Smrg
64313d1d17dSmrg/*
64413d1d17dSmrg * Request a page flip on the specified crtc.
64513d1d17dSmrg *
64613d1d17dSmrg * This ioctl will ask KMS to schedule a page flip for the specified
64713d1d17dSmrg * crtc.  Once any pending rendering targeting the specified fb (as of
64813d1d17dSmrg * ioctl time) has completed, the crtc will be reprogrammed to display
64913d1d17dSmrg * that fb after the next vertical refresh.  The ioctl returns
65013d1d17dSmrg * immediately, but subsequent rendering to the current fb will block
65113d1d17dSmrg * in the execbuffer ioctl until the page flip happens.  If a page
65213d1d17dSmrg * flip is already pending as the ioctl is called, EBUSY will be
65313d1d17dSmrg * returned.
65413d1d17dSmrg *
6553f012e29Smrg * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
6563f012e29Smrg * event (see drm.h: struct drm_event_vblank) when the page flip is
6573f012e29Smrg * done.  The user_data field passed in with this ioctl will be
6583f012e29Smrg * returned as the user_data field in the vblank event struct.
6593f012e29Smrg *
6603f012e29Smrg * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
6613f012e29Smrg * 'as soon as possible', meaning that it not delay waiting for vblank.
6623f012e29Smrg * This may cause tearing on the screen.
66313d1d17dSmrg *
664037b3c26Smrg * The reserved field must be zero.
66513d1d17dSmrg */
66613d1d17dSmrg
66722944501Smrgstruct drm_mode_crtc_page_flip {
66813d1d17dSmrg	__u32 crtc_id;
66913d1d17dSmrg	__u32 fb_id;
67013d1d17dSmrg	__u32 flags;
67113d1d17dSmrg	__u32 reserved;
67213d1d17dSmrg	__u64 user_data;
67322944501Smrg};
67422944501Smrg
675037b3c26Smrg/*
676037b3c26Smrg * Request a page flip on the specified crtc.
677037b3c26Smrg *
678037b3c26Smrg * Same as struct drm_mode_crtc_page_flip, but supports new flags and
679037b3c26Smrg * re-purposes the reserved field:
680037b3c26Smrg *
681037b3c26Smrg * The sequence field must be zero unless either of the
682037b3c26Smrg * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When
683037b3c26Smrg * the ABSOLUTE flag is specified, the sequence field denotes the absolute
684037b3c26Smrg * vblank sequence when the flip should take effect. When the RELATIVE
685037b3c26Smrg * flag is specified, the sequence field denotes the relative (to the
686037b3c26Smrg * current one when the ioctl is called) vblank sequence when the flip
687037b3c26Smrg * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to
688037b3c26Smrg * make sure the vblank sequence before the target one has passed before
689037b3c26Smrg * calling this ioctl. The purpose of the
690037b3c26Smrg * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify
691037b3c26Smrg * the target for when code dealing with a page flip runs during a
692037b3c26Smrg * vertical blank period.
693037b3c26Smrg */
694037b3c26Smrg
695037b3c26Smrgstruct drm_mode_crtc_page_flip_target {
696037b3c26Smrg	__u32 crtc_id;
697037b3c26Smrg	__u32 fb_id;
698037b3c26Smrg	__u32 flags;
699037b3c26Smrg	__u32 sequence;
700037b3c26Smrg	__u64 user_data;
701037b3c26Smrg};
702037b3c26Smrg
703e88f27b3Smrg/* create a dumb scanout buffer */
704e88f27b3Smrgstruct drm_mode_create_dumb {
7053f012e29Smrg	__u32 height;
7063f012e29Smrg	__u32 width;
7073f012e29Smrg	__u32 bpp;
7083f012e29Smrg	__u32 flags;
7093f012e29Smrg	/* handle, pitch, size will be returned */
7103f012e29Smrg	__u32 handle;
7113f012e29Smrg	__u32 pitch;
7123f012e29Smrg	__u64 size;
713e88f27b3Smrg};
714e88f27b3Smrg
715e88f27b3Smrg/* set up for mmap of a dumb scanout buffer */
716e88f27b3Smrgstruct drm_mode_map_dumb {
7173f012e29Smrg	/** Handle for the object being mapped. */
7183f012e29Smrg	__u32 handle;
7193f012e29Smrg	__u32 pad;
7203f012e29Smrg	/**
7213f012e29Smrg	 * Fake offset to use for subsequent mmap call
7223f012e29Smrg	 *
7233f012e29Smrg	 * This is a fixed-size type for 32/64 compatibility.
7243f012e29Smrg	 */
7253f012e29Smrg	__u64 offset;
726e88f27b3Smrg};
727e88f27b3Smrg
728e88f27b3Smrgstruct drm_mode_destroy_dumb {
729e88f27b3Smrg	__u32 handle;
730e88f27b3Smrg};
731e88f27b3Smrg
732e6188e58Smrg/* page-flip flags are valid, plus: */
7333f012e29Smrg#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100
7343f012e29Smrg#define DRM_MODE_ATOMIC_NONBLOCK  0x0200
7353f012e29Smrg#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400
7363f012e29Smrg
7373f012e29Smrg#define DRM_MODE_ATOMIC_FLAGS (\
7383f012e29Smrg		DRM_MODE_PAGE_FLIP_EVENT |\
7393f012e29Smrg		DRM_MODE_PAGE_FLIP_ASYNC |\
7403f012e29Smrg		DRM_MODE_ATOMIC_TEST_ONLY |\
7413f012e29Smrg		DRM_MODE_ATOMIC_NONBLOCK |\
7423f012e29Smrg		DRM_MODE_ATOMIC_ALLOW_MODESET)
743e6188e58Smrg
744e6188e58Smrgstruct drm_mode_atomic {
745e6188e58Smrg	__u32 flags;
746e6188e58Smrg	__u32 count_objs;
747e6188e58Smrg	__u64 objs_ptr;
748e6188e58Smrg	__u64 count_props_ptr;
749e6188e58Smrg	__u64 props_ptr;
750e6188e58Smrg	__u64 prop_values_ptr;
751e6188e58Smrg	__u64 reserved;
752e6188e58Smrg	__u64 user_data;
753e6188e58Smrg};
754e6188e58Smrg
755d8807b2fSmrgstruct drm_format_modifier_blob {
756d8807b2fSmrg#define FORMAT_BLOB_CURRENT 1
757d8807b2fSmrg	/* Version of this blob format */
758d8807b2fSmrg	__u32 version;
759d8807b2fSmrg
760d8807b2fSmrg	/* Flags */
761d8807b2fSmrg	__u32 flags;
762d8807b2fSmrg
763d8807b2fSmrg	/* Number of fourcc formats supported */
764d8807b2fSmrg	__u32 count_formats;
765d8807b2fSmrg
766d8807b2fSmrg	/* Where in this blob the formats exist (in bytes) */
767d8807b2fSmrg	__u32 formats_offset;
768d8807b2fSmrg
769d8807b2fSmrg	/* Number of drm_format_modifiers */
770d8807b2fSmrg	__u32 count_modifiers;
771d8807b2fSmrg
772d8807b2fSmrg	/* Where in this blob the modifiers exist (in bytes) */
773d8807b2fSmrg	__u32 modifiers_offset;
774d8807b2fSmrg
77500a23bdaSmrg	/* __u32 formats[] */
776d8807b2fSmrg	/* struct drm_format_modifier modifiers[] */
777d8807b2fSmrg};
778d8807b2fSmrg
779d8807b2fSmrgstruct drm_format_modifier {
780d8807b2fSmrg	/* Bitmask of formats in get_plane format list this info applies to. The
781d8807b2fSmrg	 * offset allows a sliding window of which 64 formats (bits).
782d8807b2fSmrg	 *
783d8807b2fSmrg	 * Some examples:
784d8807b2fSmrg	 * In today's world with < 65 formats, and formats 0, and 2 are
785d8807b2fSmrg	 * supported
786d8807b2fSmrg	 * 0x0000000000000005
787d8807b2fSmrg	 *		  ^-offset = 0, formats = 5
788d8807b2fSmrg	 *
789d8807b2fSmrg	 * If the number formats grew to 128, and formats 98-102 are
790d8807b2fSmrg	 * supported with the modifier:
791d8807b2fSmrg	 *
79200a23bdaSmrg	 * 0x0000007c00000000 0000000000000000
793d8807b2fSmrg	 *		  ^
79400a23bdaSmrg	 *		  |__offset = 64, formats = 0x7c00000000
795d8807b2fSmrg	 *
796d8807b2fSmrg	 */
797d8807b2fSmrg	__u64 formats;
798d8807b2fSmrg	__u32 offset;
799d8807b2fSmrg	__u32 pad;
800d8807b2fSmrg
801d8807b2fSmrg	/* The modifier that applies to the >get_plane format list bitmask. */
802d8807b2fSmrg	__u64 modifier;
803d8807b2fSmrg};
804d8807b2fSmrg
805e6188e58Smrg/**
806e6188e58Smrg * Create a new 'blob' data property, copying length bytes from data pointer,
807e6188e58Smrg * and returning new blob ID.
808e6188e58Smrg */
809e6188e58Smrgstruct drm_mode_create_blob {
810e6188e58Smrg	/** Pointer to data to copy. */
811e6188e58Smrg	__u64 data;
812e6188e58Smrg	/** Length of data to copy. */
813e6188e58Smrg	__u32 length;
814e6188e58Smrg	/** Return: new property ID. */
815e6188e58Smrg	__u32 blob_id;
816e6188e58Smrg};
817e6188e58Smrg
818e6188e58Smrg/**
819e6188e58Smrg * Destroy a user-created blob property.
820e6188e58Smrg */
821e6188e58Smrgstruct drm_mode_destroy_blob {
822e6188e58Smrg	__u32 blob_id;
823e6188e58Smrg};
824e6188e58Smrg
82500a23bdaSmrg/**
82600a23bdaSmrg * Lease mode resources, creating another drm_master.
82700a23bdaSmrg */
82800a23bdaSmrgstruct drm_mode_create_lease {
82900a23bdaSmrg	/** Pointer to array of object ids (__u32) */
83000a23bdaSmrg	__u64 object_ids;
83100a23bdaSmrg	/** Number of object ids */
83200a23bdaSmrg	__u32 object_count;
83300a23bdaSmrg	/** flags for new FD (O_CLOEXEC, etc) */
83400a23bdaSmrg	__u32 flags;
83500a23bdaSmrg
83600a23bdaSmrg	/** Return: unique identifier for lessee. */
83700a23bdaSmrg	__u32 lessee_id;
83800a23bdaSmrg	/** Return: file descriptor to new drm_master file */
83900a23bdaSmrg	__u32 fd;
84000a23bdaSmrg};
84100a23bdaSmrg
84200a23bdaSmrg/**
84300a23bdaSmrg * List lesses from a drm_master
84400a23bdaSmrg */
84500a23bdaSmrgstruct drm_mode_list_lessees {
84600a23bdaSmrg	/** Number of lessees.
84700a23bdaSmrg	 * On input, provides length of the array.
84800a23bdaSmrg	 * On output, provides total number. No
84900a23bdaSmrg	 * more than the input number will be written
85000a23bdaSmrg	 * back, so two calls can be used to get
85100a23bdaSmrg	 * the size and then the data.
85200a23bdaSmrg	 */
85300a23bdaSmrg	__u32 count_lessees;
85400a23bdaSmrg	__u32 pad;
85500a23bdaSmrg
85600a23bdaSmrg	/** Pointer to lessees.
85700a23bdaSmrg	 * pointer to __u64 array of lessee ids
85800a23bdaSmrg	 */
85900a23bdaSmrg	__u64 lessees_ptr;
86000a23bdaSmrg};
86100a23bdaSmrg
86200a23bdaSmrg/**
86300a23bdaSmrg * Get leased objects
86400a23bdaSmrg */
86500a23bdaSmrgstruct drm_mode_get_lease {
86600a23bdaSmrg	/** Number of leased objects.
86700a23bdaSmrg	 * On input, provides length of the array.
86800a23bdaSmrg	 * On output, provides total number. No
86900a23bdaSmrg	 * more than the input number will be written
87000a23bdaSmrg	 * back, so two calls can be used to get
87100a23bdaSmrg	 * the size and then the data.
87200a23bdaSmrg	 */
87300a23bdaSmrg	__u32 count_objects;
87400a23bdaSmrg	__u32 pad;
87500a23bdaSmrg
87600a23bdaSmrg	/** Pointer to objects.
87700a23bdaSmrg	 * pointer to __u32 array of object ids
87800a23bdaSmrg	 */
87900a23bdaSmrg	__u64 objects_ptr;
88000a23bdaSmrg};
88100a23bdaSmrg
88200a23bdaSmrg/**
88300a23bdaSmrg * Revoke lease
88400a23bdaSmrg */
88500a23bdaSmrgstruct drm_mode_revoke_lease {
88600a23bdaSmrg	/** Unique ID of lessee
88700a23bdaSmrg	 */
88800a23bdaSmrg	__u32 lessee_id;
88900a23bdaSmrg};
89000a23bdaSmrg
8915324fb0dSmrg/**
8925324fb0dSmrg * struct drm_mode_rect - Two dimensional rectangle.
8935324fb0dSmrg * @x1: Horizontal starting coordinate (inclusive).
8945324fb0dSmrg * @y1: Vertical starting coordinate (inclusive).
8955324fb0dSmrg * @x2: Horizontal ending coordinate (exclusive).
8965324fb0dSmrg * @y2: Vertical ending coordinate (exclusive).
8975324fb0dSmrg *
8985324fb0dSmrg * With drm subsystem using struct drm_rect to manage rectangular area this
8995324fb0dSmrg * export it to user-space.
9005324fb0dSmrg *
9015324fb0dSmrg * Currently used by drm_mode_atomic blob property FB_DAMAGE_CLIPS.
9025324fb0dSmrg */
9035324fb0dSmrgstruct drm_mode_rect {
9045324fb0dSmrg	__s32 x1;
9055324fb0dSmrg	__s32 y1;
9065324fb0dSmrg	__s32 x2;
9075324fb0dSmrg	__s32 y2;
9085324fb0dSmrg};
9095324fb0dSmrg
910037b3c26Smrg#if defined(__cplusplus)
911037b3c26Smrg}
912037b3c26Smrg#endif
913037b3c26Smrg
91422944501Smrg#endif
915