drm_mode.h revision 037b3c26
1/* 2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie> 3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com> 4 * Copyright (c) 2008 Red Hat Inc. 5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA 6 * Copyright (c) 2007-2008 Intel Corporation 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 24 * IN THE SOFTWARE. 25 */ 26 27#ifndef _DRM_MODE_H 28#define _DRM_MODE_H 29 30#include "drm.h" 31 32#if defined(__cplusplus) 33extern "C" { 34#endif 35 36#define DRM_DISPLAY_INFO_LEN 32 37#define DRM_CONNECTOR_NAME_LEN 32 38#define DRM_DISPLAY_MODE_LEN 32 39#define DRM_PROP_NAME_LEN 32 40 41#define DRM_MODE_TYPE_BUILTIN (1<<0) 42#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) 43#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) 44#define DRM_MODE_TYPE_PREFERRED (1<<3) 45#define DRM_MODE_TYPE_DEFAULT (1<<4) 46#define DRM_MODE_TYPE_USERDEF (1<<5) 47#define DRM_MODE_TYPE_DRIVER (1<<6) 48 49/* Video mode flags */ 50/* bit compatible with the xorg definitions. */ 51#define DRM_MODE_FLAG_PHSYNC (1<<0) 52#define DRM_MODE_FLAG_NHSYNC (1<<1) 53#define DRM_MODE_FLAG_PVSYNC (1<<2) 54#define DRM_MODE_FLAG_NVSYNC (1<<3) 55#define DRM_MODE_FLAG_INTERLACE (1<<4) 56#define DRM_MODE_FLAG_DBLSCAN (1<<5) 57#define DRM_MODE_FLAG_CSYNC (1<<6) 58#define DRM_MODE_FLAG_PCSYNC (1<<7) 59#define DRM_MODE_FLAG_NCSYNC (1<<8) 60#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */ 61#define DRM_MODE_FLAG_BCAST (1<<10) 62#define DRM_MODE_FLAG_PIXMUX (1<<11) 63#define DRM_MODE_FLAG_DBLCLK (1<<12) 64#define DRM_MODE_FLAG_CLKDIV2 (1<<13) 65 /* 66 * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX 67 * (define not exposed to user space). 68 */ 69#define DRM_MODE_FLAG_3D_MASK (0x1f<<14) 70#define DRM_MODE_FLAG_3D_NONE (0<<14) 71#define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14) 72#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14) 73#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14) 74#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14) 75#define DRM_MODE_FLAG_3D_L_DEPTH (5<<14) 76#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) 77#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) 78#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) 79 80 81/* DPMS flags */ 82/* bit compatible with the xorg definitions. */ 83#define DRM_MODE_DPMS_ON 0 84#define DRM_MODE_DPMS_STANDBY 1 85#define DRM_MODE_DPMS_SUSPEND 2 86#define DRM_MODE_DPMS_OFF 3 87 88/* Scaling mode options */ 89#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or 90 software can still scale) */ 91#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */ 92#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */ 93#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */ 94 95/* Picture aspect ratio options */ 96#define DRM_MODE_PICTURE_ASPECT_NONE 0 97#define DRM_MODE_PICTURE_ASPECT_4_3 1 98#define DRM_MODE_PICTURE_ASPECT_16_9 2 99 100/* Dithering mode options */ 101#define DRM_MODE_DITHERING_OFF 0 102#define DRM_MODE_DITHERING_ON 1 103#define DRM_MODE_DITHERING_AUTO 2 104 105/* Dirty info options */ 106#define DRM_MODE_DIRTY_OFF 0 107#define DRM_MODE_DIRTY_ON 1 108#define DRM_MODE_DIRTY_ANNOTATE 2 109 110struct drm_mode_modeinfo { 111 __u32 clock; 112 __u16 hdisplay; 113 __u16 hsync_start; 114 __u16 hsync_end; 115 __u16 htotal; 116 __u16 hskew; 117 __u16 vdisplay; 118 __u16 vsync_start; 119 __u16 vsync_end; 120 __u16 vtotal; 121 __u16 vscan; 122 123 __u32 vrefresh; 124 125 __u32 flags; 126 __u32 type; 127 char name[DRM_DISPLAY_MODE_LEN]; 128}; 129 130struct drm_mode_card_res { 131 __u64 fb_id_ptr; 132 __u64 crtc_id_ptr; 133 __u64 connector_id_ptr; 134 __u64 encoder_id_ptr; 135 __u32 count_fbs; 136 __u32 count_crtcs; 137 __u32 count_connectors; 138 __u32 count_encoders; 139 __u32 min_width; 140 __u32 max_width; 141 __u32 min_height; 142 __u32 max_height; 143}; 144 145struct drm_mode_crtc { 146 __u64 set_connectors_ptr; 147 __u32 count_connectors; 148 149 __u32 crtc_id; /**< Id */ 150 __u32 fb_id; /**< Id of framebuffer */ 151 152 __u32 x; /**< x Position on the framebuffer */ 153 __u32 y; /**< y Position on the framebuffer */ 154 155 __u32 gamma_size; 156 __u32 mode_valid; 157 struct drm_mode_modeinfo mode; 158}; 159 160#define DRM_MODE_PRESENT_TOP_FIELD (1<<0) 161#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) 162 163/* Planes blend with or override other bits on the CRTC */ 164struct drm_mode_set_plane { 165 __u32 plane_id; 166 __u32 crtc_id; 167 __u32 fb_id; /* fb object contains surface format type */ 168 __u32 flags; /* see above flags */ 169 170 /* Signed dest location allows it to be partially off screen */ 171 __s32 crtc_x; 172 __s32 crtc_y; 173 __u32 crtc_w; 174 __u32 crtc_h; 175 176 /* Source values are 16.16 fixed point */ 177 __u32 src_x; 178 __u32 src_y; 179 __u32 src_h; 180 __u32 src_w; 181}; 182 183struct drm_mode_get_plane { 184 __u32 plane_id; 185 186 __u32 crtc_id; 187 __u32 fb_id; 188 189 __u32 possible_crtcs; 190 __u32 gamma_size; 191 192 __u32 count_format_types; 193 __u64 format_type_ptr; 194}; 195 196struct drm_mode_get_plane_res { 197 __u64 plane_id_ptr; 198 __u32 count_planes; 199}; 200 201#define DRM_MODE_ENCODER_NONE 0 202#define DRM_MODE_ENCODER_DAC 1 203#define DRM_MODE_ENCODER_TMDS 2 204#define DRM_MODE_ENCODER_LVDS 3 205#define DRM_MODE_ENCODER_TVDAC 4 206#define DRM_MODE_ENCODER_VIRTUAL 5 207#define DRM_MODE_ENCODER_DSI 6 208#define DRM_MODE_ENCODER_DPMST 7 209#define DRM_MODE_ENCODER_DPI 8 210 211struct drm_mode_get_encoder { 212 __u32 encoder_id; 213 __u32 encoder_type; 214 215 __u32 crtc_id; /**< Id of crtc */ 216 217 __u32 possible_crtcs; 218 __u32 possible_clones; 219}; 220 221/* This is for connectors with multiple signal types. */ 222/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */ 223#define DRM_MODE_SUBCONNECTOR_Automatic 0 224#define DRM_MODE_SUBCONNECTOR_Unknown 0 225#define DRM_MODE_SUBCONNECTOR_DVID 3 226#define DRM_MODE_SUBCONNECTOR_DVIA 4 227#define DRM_MODE_SUBCONNECTOR_Composite 5 228#define DRM_MODE_SUBCONNECTOR_SVIDEO 6 229#define DRM_MODE_SUBCONNECTOR_Component 8 230#define DRM_MODE_SUBCONNECTOR_SCART 9 231 232#define DRM_MODE_CONNECTOR_Unknown 0 233#define DRM_MODE_CONNECTOR_VGA 1 234#define DRM_MODE_CONNECTOR_DVII 2 235#define DRM_MODE_CONNECTOR_DVID 3 236#define DRM_MODE_CONNECTOR_DVIA 4 237#define DRM_MODE_CONNECTOR_Composite 5 238#define DRM_MODE_CONNECTOR_SVIDEO 6 239#define DRM_MODE_CONNECTOR_LVDS 7 240#define DRM_MODE_CONNECTOR_Component 8 241#define DRM_MODE_CONNECTOR_9PinDIN 9 242#define DRM_MODE_CONNECTOR_DisplayPort 10 243#define DRM_MODE_CONNECTOR_HDMIA 11 244#define DRM_MODE_CONNECTOR_HDMIB 12 245#define DRM_MODE_CONNECTOR_TV 13 246#define DRM_MODE_CONNECTOR_eDP 14 247#define DRM_MODE_CONNECTOR_VIRTUAL 15 248#define DRM_MODE_CONNECTOR_DSI 16 249#define DRM_MODE_CONNECTOR_DPI 17 250 251struct drm_mode_get_connector { 252 253 __u64 encoders_ptr; 254 __u64 modes_ptr; 255 __u64 props_ptr; 256 __u64 prop_values_ptr; 257 258 __u32 count_modes; 259 __u32 count_props; 260 __u32 count_encoders; 261 262 __u32 encoder_id; /**< Current Encoder */ 263 __u32 connector_id; /**< Id */ 264 __u32 connector_type; 265 __u32 connector_type_id; 266 267 __u32 connection; 268 __u32 mm_width; /**< width in millimeters */ 269 __u32 mm_height; /**< height in millimeters */ 270 __u32 subpixel; 271 272 __u32 pad; 273}; 274 275#define DRM_MODE_PROP_PENDING (1<<0) 276#define DRM_MODE_PROP_RANGE (1<<1) 277#define DRM_MODE_PROP_IMMUTABLE (1<<2) 278#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */ 279#define DRM_MODE_PROP_BLOB (1<<4) 280#define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */ 281 282/* non-extended types: legacy bitmask, one bit per type: */ 283#define DRM_MODE_PROP_LEGACY_TYPE ( \ 284 DRM_MODE_PROP_RANGE | \ 285 DRM_MODE_PROP_ENUM | \ 286 DRM_MODE_PROP_BLOB | \ 287 DRM_MODE_PROP_BITMASK) 288 289/* extended-types: rather than continue to consume a bit per type, 290 * grab a chunk of the bits to use as integer type id. 291 */ 292#define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 293#define DRM_MODE_PROP_TYPE(n) ((n) << 6) 294#define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 295#define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 296 297/* the PROP_ATOMIC flag is used to hide properties from userspace that 298 * is not aware of atomic properties. This is mostly to work around 299 * older userspace (DDX drivers) that read/write each prop they find, 300 * witout being aware that this could be triggering a lengthy modeset. 301 */ 302#define DRM_MODE_PROP_ATOMIC 0x80000000 303 304struct drm_mode_property_enum { 305 __u64 value; 306 char name[DRM_PROP_NAME_LEN]; 307}; 308 309struct drm_mode_get_property { 310 __u64 values_ptr; /* values and blob lengths */ 311 __u64 enum_blob_ptr; /* enum and blob id ptrs */ 312 313 __u32 prop_id; 314 __u32 flags; 315 char name[DRM_PROP_NAME_LEN]; 316 317 __u32 count_values; 318 /* This is only used to count enum values, not blobs. The _blobs is 319 * simply because of a historical reason, i.e. backwards compat. */ 320 __u32 count_enum_blobs; 321}; 322 323struct drm_mode_connector_set_property { 324 __u64 value; 325 __u32 prop_id; 326 __u32 connector_id; 327}; 328 329#define DRM_MODE_OBJECT_CRTC 0xcccccccc 330#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 331#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 332#define DRM_MODE_OBJECT_MODE 0xdededede 333#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 334#define DRM_MODE_OBJECT_FB 0xfbfbfbfb 335#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 336#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 337#define DRM_MODE_OBJECT_ANY 0 338 339struct drm_mode_obj_get_properties { 340 __u64 props_ptr; 341 __u64 prop_values_ptr; 342 __u32 count_props; 343 __u32 obj_id; 344 __u32 obj_type; 345}; 346 347struct drm_mode_obj_set_property { 348 __u64 value; 349 __u32 prop_id; 350 __u32 obj_id; 351 __u32 obj_type; 352}; 353 354struct drm_mode_get_blob { 355 __u32 blob_id; 356 __u32 length; 357 __u64 data; 358}; 359 360struct drm_mode_fb_cmd { 361 __u32 fb_id; 362 __u32 width; 363 __u32 height; 364 __u32 pitch; 365 __u32 bpp; 366 __u32 depth; 367 /* driver specific handle */ 368 __u32 handle; 369}; 370 371#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ 372#define DRM_MODE_FB_MODIFIERS (1<<1) /* enables ->modifer[] */ 373 374struct drm_mode_fb_cmd2 { 375 __u32 fb_id; 376 __u32 width; 377 __u32 height; 378 __u32 pixel_format; /* fourcc code from drm_fourcc.h */ 379 __u32 flags; /* see above flags */ 380 381 /* 382 * In case of planar formats, this ioctl allows up to 4 383 * buffer objects with offsets and pitches per plane. 384 * The pitch and offset order is dictated by the fourcc, 385 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as: 386 * 387 * YUV 4:2:0 image with a plane of 8 bit Y samples 388 * followed by an interleaved U/V plane containing 389 * 8 bit 2x2 subsampled colour difference samples. 390 * 391 * So it would consist of Y as offsets[0] and UV as 392 * offsets[1]. Note that offsets[0] will generally 393 * be 0 (but this is not required). 394 * 395 * To accommodate tiled, compressed, etc formats, a per-plane 396 * modifier can be specified. The default value of zero 397 * indicates "native" format as specified by the fourcc. 398 * Vendor specific modifier token. This allows, for example, 399 * different tiling/swizzling pattern on different planes. 400 * See discussion above of DRM_FORMAT_MOD_xxx. 401 */ 402 __u32 handles[4]; 403 __u32 pitches[4]; /* pitch for each plane */ 404 __u32 offsets[4]; /* offset of each plane */ 405 __u64 modifier[4]; /* ie, tiling, compressed (per plane) */ 406}; 407 408#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 409#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 410#define DRM_MODE_FB_DIRTY_FLAGS 0x03 411 412#define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 413 414/* 415 * Mark a region of a framebuffer as dirty. 416 * 417 * Some hardware does not automatically update display contents 418 * as a hardware or software draw to a framebuffer. This ioctl 419 * allows userspace to tell the kernel and the hardware what 420 * regions of the framebuffer have changed. 421 * 422 * The kernel or hardware is free to update more then just the 423 * region specified by the clip rects. The kernel or hardware 424 * may also delay and/or coalesce several calls to dirty into a 425 * single update. 426 * 427 * Userspace may annotate the updates, the annotates are a 428 * promise made by the caller that the change is either a copy 429 * of pixels or a fill of a single color in the region specified. 430 * 431 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then 432 * the number of updated regions are half of num_clips given, 433 * where the clip rects are paired in src and dst. The width and 434 * height of each one of the pairs must match. 435 * 436 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller 437 * promises that the region specified of the clip rects is filled 438 * completely with a single color as given in the color argument. 439 */ 440 441struct drm_mode_fb_dirty_cmd { 442 __u32 fb_id; 443 __u32 flags; 444 __u32 color; 445 __u32 num_clips; 446 __u64 clips_ptr; 447}; 448 449struct drm_mode_mode_cmd { 450 __u32 connector_id; 451 struct drm_mode_modeinfo mode; 452}; 453 454#define DRM_MODE_CURSOR_BO 0x01 455#define DRM_MODE_CURSOR_MOVE 0x02 456#define DRM_MODE_CURSOR_FLAGS 0x03 457 458/* 459 * depending on the value in flags different members are used. 460 * 461 * CURSOR_BO uses 462 * crtc_id 463 * width 464 * height 465 * handle - if 0 turns the cursor off 466 * 467 * CURSOR_MOVE uses 468 * crtc_id 469 * x 470 * y 471 */ 472struct drm_mode_cursor { 473 __u32 flags; 474 __u32 crtc_id; 475 __s32 x; 476 __s32 y; 477 __u32 width; 478 __u32 height; 479 /* driver specific handle */ 480 __u32 handle; 481}; 482 483struct drm_mode_cursor2 { 484 __u32 flags; 485 __u32 crtc_id; 486 __s32 x; 487 __s32 y; 488 __u32 width; 489 __u32 height; 490 /* driver specific handle */ 491 __u32 handle; 492 __s32 hot_x; 493 __s32 hot_y; 494}; 495 496struct drm_mode_crtc_lut { 497 __u32 crtc_id; 498 __u32 gamma_size; 499 500 /* pointers to arrays */ 501 __u64 red; 502 __u64 green; 503 __u64 blue; 504}; 505 506struct drm_color_ctm { 507 /* Conversion matrix in S31.32 format. */ 508 __s64 matrix[9]; 509}; 510 511struct drm_color_lut { 512 /* 513 * Data is U0.16 fixed point format. 514 */ 515 __u16 red; 516 __u16 green; 517 __u16 blue; 518 __u16 reserved; 519}; 520 521#define DRM_MODE_PAGE_FLIP_EVENT 0x01 522#define DRM_MODE_PAGE_FLIP_ASYNC 0x02 523#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 524#define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8 525#define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | \ 526 DRM_MODE_PAGE_FLIP_TARGET_RELATIVE) 527#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | \ 528 DRM_MODE_PAGE_FLIP_ASYNC | \ 529 DRM_MODE_PAGE_FLIP_TARGET) 530 531/* 532 * Request a page flip on the specified crtc. 533 * 534 * This ioctl will ask KMS to schedule a page flip for the specified 535 * crtc. Once any pending rendering targeting the specified fb (as of 536 * ioctl time) has completed, the crtc will be reprogrammed to display 537 * that fb after the next vertical refresh. The ioctl returns 538 * immediately, but subsequent rendering to the current fb will block 539 * in the execbuffer ioctl until the page flip happens. If a page 540 * flip is already pending as the ioctl is called, EBUSY will be 541 * returned. 542 * 543 * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank 544 * event (see drm.h: struct drm_event_vblank) when the page flip is 545 * done. The user_data field passed in with this ioctl will be 546 * returned as the user_data field in the vblank event struct. 547 * 548 * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen 549 * 'as soon as possible', meaning that it not delay waiting for vblank. 550 * This may cause tearing on the screen. 551 * 552 * The reserved field must be zero. 553 */ 554 555struct drm_mode_crtc_page_flip { 556 __u32 crtc_id; 557 __u32 fb_id; 558 __u32 flags; 559 __u32 reserved; 560 __u64 user_data; 561}; 562 563/* 564 * Request a page flip on the specified crtc. 565 * 566 * Same as struct drm_mode_crtc_page_flip, but supports new flags and 567 * re-purposes the reserved field: 568 * 569 * The sequence field must be zero unless either of the 570 * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is specified. When 571 * the ABSOLUTE flag is specified, the sequence field denotes the absolute 572 * vblank sequence when the flip should take effect. When the RELATIVE 573 * flag is specified, the sequence field denotes the relative (to the 574 * current one when the ioctl is called) vblank sequence when the flip 575 * should take effect. NOTE: DRM_IOCTL_WAIT_VBLANK must still be used to 576 * make sure the vblank sequence before the target one has passed before 577 * calling this ioctl. The purpose of the 578 * DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE/RELATIVE flags is merely to clarify 579 * the target for when code dealing with a page flip runs during a 580 * vertical blank period. 581 */ 582 583struct drm_mode_crtc_page_flip_target { 584 __u32 crtc_id; 585 __u32 fb_id; 586 __u32 flags; 587 __u32 sequence; 588 __u64 user_data; 589}; 590 591/* create a dumb scanout buffer */ 592struct drm_mode_create_dumb { 593 __u32 height; 594 __u32 width; 595 __u32 bpp; 596 __u32 flags; 597 /* handle, pitch, size will be returned */ 598 __u32 handle; 599 __u32 pitch; 600 __u64 size; 601}; 602 603/* set up for mmap of a dumb scanout buffer */ 604struct drm_mode_map_dumb { 605 /** Handle for the object being mapped. */ 606 __u32 handle; 607 __u32 pad; 608 /** 609 * Fake offset to use for subsequent mmap call 610 * 611 * This is a fixed-size type for 32/64 compatibility. 612 */ 613 __u64 offset; 614}; 615 616struct drm_mode_destroy_dumb { 617 __u32 handle; 618}; 619 620/* page-flip flags are valid, plus: */ 621#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 622#define DRM_MODE_ATOMIC_NONBLOCK 0x0200 623#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 624 625#define DRM_MODE_ATOMIC_FLAGS (\ 626 DRM_MODE_PAGE_FLIP_EVENT |\ 627 DRM_MODE_PAGE_FLIP_ASYNC |\ 628 DRM_MODE_ATOMIC_TEST_ONLY |\ 629 DRM_MODE_ATOMIC_NONBLOCK |\ 630 DRM_MODE_ATOMIC_ALLOW_MODESET) 631 632struct drm_mode_atomic { 633 __u32 flags; 634 __u32 count_objs; 635 __u64 objs_ptr; 636 __u64 count_props_ptr; 637 __u64 props_ptr; 638 __u64 prop_values_ptr; 639 __u64 reserved; 640 __u64 user_data; 641}; 642 643/** 644 * Create a new 'blob' data property, copying length bytes from data pointer, 645 * and returning new blob ID. 646 */ 647struct drm_mode_create_blob { 648 /** Pointer to data to copy. */ 649 __u64 data; 650 /** Length of data to copy. */ 651 __u32 length; 652 /** Return: new property ID. */ 653 __u32 blob_id; 654}; 655 656/** 657 * Destroy a user-created blob property. 658 */ 659struct drm_mode_destroy_blob { 660 __u32 blob_id; 661}; 662 663#if defined(__cplusplus) 664} 665#endif 666 667#endif 668