drm_mode.h revision e6188e58
1/* 2 * Copyright (c) 2007 Dave Airlie <airlied@linux.ie> 3 * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com> 4 * Copyright (c) 2008 Red Hat Inc. 5 * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA 6 * Copyright (c) 2007-2008 Intel Corporation 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining a 9 * copy of this software and associated documentation files (the "Software"), 10 * to deal in the Software without restriction, including without limitation 11 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 12 * and/or sell copies of the Software, and to permit persons to whom the 13 * Software is furnished to do so, subject to the following conditions: 14 * 15 * The above copyright notice and this permission notice shall be included in 16 * all copies or substantial portions of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 21 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 23 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 24 * IN THE SOFTWARE. 25 */ 26 27#ifndef _DRM_MODE_H 28#define _DRM_MODE_H 29 30#define DRM_DISPLAY_INFO_LEN 32 31#define DRM_CONNECTOR_NAME_LEN 32 32#define DRM_DISPLAY_MODE_LEN 32 33#define DRM_PROP_NAME_LEN 32 34 35#define DRM_MODE_TYPE_BUILTIN (1<<0) 36#define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN) 37#define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN) 38#define DRM_MODE_TYPE_PREFERRED (1<<3) 39#define DRM_MODE_TYPE_DEFAULT (1<<4) 40#define DRM_MODE_TYPE_USERDEF (1<<5) 41#define DRM_MODE_TYPE_DRIVER (1<<6) 42 43/* Video mode flags */ 44/* bit compatible with the xorg definitions. */ 45#define DRM_MODE_FLAG_PHSYNC (1<<0) 46#define DRM_MODE_FLAG_NHSYNC (1<<1) 47#define DRM_MODE_FLAG_PVSYNC (1<<2) 48#define DRM_MODE_FLAG_NVSYNC (1<<3) 49#define DRM_MODE_FLAG_INTERLACE (1<<4) 50#define DRM_MODE_FLAG_DBLSCAN (1<<5) 51#define DRM_MODE_FLAG_CSYNC (1<<6) 52#define DRM_MODE_FLAG_PCSYNC (1<<7) 53#define DRM_MODE_FLAG_NCSYNC (1<<8) 54#define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */ 55#define DRM_MODE_FLAG_BCAST (1<<10) 56#define DRM_MODE_FLAG_PIXMUX (1<<11) 57#define DRM_MODE_FLAG_DBLCLK (1<<12) 58#define DRM_MODE_FLAG_CLKDIV2 (1<<13) 59#define DRM_MODE_FLAG_3D_MASK (0x1f<<14) 60#define DRM_MODE_FLAG_3D_NONE (0<<14) 61#define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14) 62#define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14) 63#define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14) 64#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14) 65#define DRM_MODE_FLAG_3D_L_DEPTH (5<<14) 66#define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14) 67#define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14) 68#define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14) 69 70 71/* DPMS flags */ 72/* bit compatible with the xorg definitions. */ 73#define DRM_MODE_DPMS_ON 0 74#define DRM_MODE_DPMS_STANDBY 1 75#define DRM_MODE_DPMS_SUSPEND 2 76#define DRM_MODE_DPMS_OFF 3 77 78/* Scaling mode options */ 79#define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or 80 software can still scale) */ 81#define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */ 82#define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */ 83#define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */ 84 85/* Dithering mode options */ 86#define DRM_MODE_DITHERING_OFF 0 87#define DRM_MODE_DITHERING_ON 1 88#define DRM_MODE_DITHERING_AUTO 2 89 90/* Dirty info options */ 91#define DRM_MODE_DIRTY_OFF 0 92#define DRM_MODE_DIRTY_ON 1 93#define DRM_MODE_DIRTY_ANNOTATE 2 94 95struct drm_mode_modeinfo { 96 __u32 clock; 97 __u16 hdisplay, hsync_start, hsync_end, htotal, hskew; 98 __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan; 99 100 __u32 vrefresh; 101 102 __u32 flags; 103 __u32 type; 104 char name[DRM_DISPLAY_MODE_LEN]; 105}; 106 107struct drm_mode_card_res { 108 __u64 fb_id_ptr; 109 __u64 crtc_id_ptr; 110 __u64 connector_id_ptr; 111 __u64 encoder_id_ptr; 112 __u32 count_fbs; 113 __u32 count_crtcs; 114 __u32 count_connectors; 115 __u32 count_encoders; 116 __u32 min_width, max_width; 117 __u32 min_height, max_height; 118}; 119 120struct drm_mode_crtc { 121 __u64 set_connectors_ptr; 122 __u32 count_connectors; 123 124 __u32 crtc_id; /**< Id */ 125 __u32 fb_id; /**< Id of framebuffer */ 126 127 __u32 x, y; /**< Position on the frameuffer */ 128 129 __u32 gamma_size; 130 __u32 mode_valid; 131 struct drm_mode_modeinfo mode; 132}; 133 134#define DRM_MODE_PRESENT_TOP_FIELD (1<<0) 135#define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1) 136 137/* Planes blend with or override other bits on the CRTC */ 138struct drm_mode_set_plane { 139 __u32 plane_id; 140 __u32 crtc_id; 141 __u32 fb_id; /* fb object contains surface format type */ 142 __u32 flags; 143 144 /* Signed dest location allows it to be partially off screen */ 145 __s32 crtc_x, crtc_y; 146 __u32 crtc_w, crtc_h; 147 148 /* Source values are 16.16 fixed point */ 149 __u32 src_x, src_y; 150 __u32 src_h, src_w; 151}; 152 153struct drm_mode_get_plane { 154 __u32 plane_id; 155 156 __u32 crtc_id; 157 __u32 fb_id; 158 159 __u32 possible_crtcs; 160 __u32 gamma_size; 161 162 __u32 count_format_types; 163 __u64 format_type_ptr; 164}; 165 166struct drm_mode_get_plane_res { 167 __u64 plane_id_ptr; 168 __u32 count_planes; 169}; 170 171#define DRM_MODE_ENCODER_NONE 0 172#define DRM_MODE_ENCODER_DAC 1 173#define DRM_MODE_ENCODER_TMDS 2 174#define DRM_MODE_ENCODER_LVDS 3 175#define DRM_MODE_ENCODER_TVDAC 4 176#define DRM_MODE_ENCODER_VIRTUAL 5 177#define DRM_MODE_ENCODER_DSI 6 178#define DRM_MODE_ENCODER_DPMST 7 179 180struct drm_mode_get_encoder { 181 __u32 encoder_id; 182 __u32 encoder_type; 183 184 __u32 crtc_id; /**< Id of crtc */ 185 186 __u32 possible_crtcs; 187 __u32 possible_clones; 188}; 189 190/* This is for connectors with multiple signal types. */ 191/* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */ 192#define DRM_MODE_SUBCONNECTOR_Automatic 0 193#define DRM_MODE_SUBCONNECTOR_Unknown 0 194#define DRM_MODE_SUBCONNECTOR_DVID 3 195#define DRM_MODE_SUBCONNECTOR_DVIA 4 196#define DRM_MODE_SUBCONNECTOR_Composite 5 197#define DRM_MODE_SUBCONNECTOR_SVIDEO 6 198#define DRM_MODE_SUBCONNECTOR_Component 8 199#define DRM_MODE_SUBCONNECTOR_SCART 9 200 201#define DRM_MODE_CONNECTOR_Unknown 0 202#define DRM_MODE_CONNECTOR_VGA 1 203#define DRM_MODE_CONNECTOR_DVII 2 204#define DRM_MODE_CONNECTOR_DVID 3 205#define DRM_MODE_CONNECTOR_DVIA 4 206#define DRM_MODE_CONNECTOR_Composite 5 207#define DRM_MODE_CONNECTOR_SVIDEO 6 208#define DRM_MODE_CONNECTOR_LVDS 7 209#define DRM_MODE_CONNECTOR_Component 8 210#define DRM_MODE_CONNECTOR_9PinDIN 9 211#define DRM_MODE_CONNECTOR_DisplayPort 10 212#define DRM_MODE_CONNECTOR_HDMIA 11 213#define DRM_MODE_CONNECTOR_HDMIB 12 214#define DRM_MODE_CONNECTOR_TV 13 215#define DRM_MODE_CONNECTOR_eDP 14 216#define DRM_MODE_CONNECTOR_VIRTUAL 15 217#define DRM_MODE_CONNECTOR_DSI 16 218 219struct drm_mode_get_connector { 220 221 __u64 encoders_ptr; 222 __u64 modes_ptr; 223 __u64 props_ptr; 224 __u64 prop_values_ptr; 225 226 __u32 count_modes; 227 __u32 count_props; 228 __u32 count_encoders; 229 230 __u32 encoder_id; /**< Current Encoder */ 231 __u32 connector_id; /**< Id */ 232 __u32 connector_type; 233 __u32 connector_type_id; 234 235 __u32 connection; 236 __u32 mm_width, mm_height; /**< HxW in millimeters */ 237 __u32 subpixel; 238}; 239 240#define DRM_MODE_PROP_PENDING (1<<0) 241#define DRM_MODE_PROP_RANGE (1<<1) 242#define DRM_MODE_PROP_IMMUTABLE (1<<2) 243#define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */ 244#define DRM_MODE_PROP_BLOB (1<<4) 245#define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */ 246 247/* non-extended types: legacy bitmask, one bit per type: */ 248#define DRM_MODE_PROP_LEGACY_TYPE ( \ 249 DRM_MODE_PROP_RANGE | \ 250 DRM_MODE_PROP_ENUM | \ 251 DRM_MODE_PROP_BLOB | \ 252 DRM_MODE_PROP_BITMASK) 253 254/* extended-types: rather than continue to consume a bit per type, 255 * grab a chunk of the bits to use as integer type id. 256 */ 257#define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 258#define DRM_MODE_PROP_TYPE(n) ((n) << 6) 259#define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 260#define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 261 262struct drm_mode_property_enum { 263 __u64 value; 264 char name[DRM_PROP_NAME_LEN]; 265}; 266 267struct drm_mode_get_property { 268 __u64 values_ptr; /* values and blob lengths */ 269 __u64 enum_blob_ptr; /* enum and blob id ptrs */ 270 271 __u32 prop_id; 272 __u32 flags; 273 char name[DRM_PROP_NAME_LEN]; 274 275 __u32 count_values; 276 __u32 count_enum_blobs; 277}; 278 279struct drm_mode_connector_set_property { 280 __u64 value; 281 __u32 prop_id; 282 __u32 connector_id; 283}; 284 285#define DRM_MODE_OBJECT_CRTC 0xcccccccc 286#define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 287#define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 288#define DRM_MODE_OBJECT_MODE 0xdededede 289#define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 290#define DRM_MODE_OBJECT_FB 0xfbfbfbfb 291#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 292#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 293 294struct drm_mode_obj_get_properties { 295 __u64 props_ptr; 296 __u64 prop_values_ptr; 297 __u32 count_props; 298 __u32 obj_id; 299 __u32 obj_type; 300}; 301 302struct drm_mode_obj_set_property { 303 __u64 value; 304 __u32 prop_id; 305 __u32 obj_id; 306 __u32 obj_type; 307}; 308 309struct drm_mode_get_blob { 310 __u32 blob_id; 311 __u32 length; 312 __u64 data; 313}; 314 315struct drm_mode_fb_cmd { 316 __u32 fb_id; 317 __u32 width, height; 318 __u32 pitch; 319 __u32 bpp; 320 __u32 depth; 321 /* driver specific handle */ 322 __u32 handle; 323}; 324 325#define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */ 326 327struct drm_mode_fb_cmd2 { 328 __u32 fb_id; 329 __u32 width, height; 330 __u32 pixel_format; /* fourcc code from drm_fourcc.h */ 331 __u32 flags; 332 333 /* 334 * In case of planar formats, this ioctl allows up to 4 335 * buffer objects with offsets and pitches per plane. 336 * The pitch and offset order is dictated by the fourcc, 337 * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as: 338 * 339 * YUV 4:2:0 image with a plane of 8 bit Y samples 340 * followed by an interleaved U/V plane containing 341 * 8 bit 2x2 subsampled colour difference samples. 342 * 343 * So it would consist of Y as offset[0] and UV as 344 * offset[1]. Note that offset[0] will generally 345 * be 0. 346 */ 347 __u32 handles[4]; 348 __u32 pitches[4]; /* pitch for each plane */ 349 __u32 offsets[4]; /* offset of each plane */ 350}; 351 352#define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 353#define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 354#define DRM_MODE_FB_DIRTY_FLAGS 0x03 355 356/* 357 * Mark a region of a framebuffer as dirty. 358 * 359 * Some hardware does not automatically update display contents 360 * as a hardware or software draw to a framebuffer. This ioctl 361 * allows userspace to tell the kernel and the hardware what 362 * regions of the framebuffer have changed. 363 * 364 * The kernel or hardware is free to update more then just the 365 * region specified by the clip rects. The kernel or hardware 366 * may also delay and/or coalesce several calls to dirty into a 367 * single update. 368 * 369 * Userspace may annotate the updates, the annotates are a 370 * promise made by the caller that the change is either a copy 371 * of pixels or a fill of a single color in the region specified. 372 * 373 * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then 374 * the number of updated regions are half of num_clips given, 375 * where the clip rects are paired in src and dst. The width and 376 * height of each one of the pairs must match. 377 * 378 * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller 379 * promises that the region specified of the clip rects is filled 380 * completely with a single color as given in the color argument. 381 */ 382 383struct drm_mode_fb_dirty_cmd { 384 __u32 fb_id; 385 __u32 flags; 386 __u32 color; 387 __u32 num_clips; 388 __u64 clips_ptr; 389}; 390 391struct drm_mode_mode_cmd { 392 __u32 connector_id; 393 struct drm_mode_modeinfo mode; 394}; 395 396#define DRM_MODE_CURSOR_BO (1<<0) 397#define DRM_MODE_CURSOR_MOVE (1<<1) 398 399/* 400 * depending on the value in flags diffrent members are used. 401 * 402 * CURSOR_BO uses 403 * crtc 404 * width 405 * height 406 * handle - if 0 turns the cursor of 407 * 408 * CURSOR_MOVE uses 409 * crtc 410 * x 411 * y 412 */ 413struct drm_mode_cursor { 414 __u32 flags; 415 __u32 crtc_id; 416 __s32 x; 417 __s32 y; 418 __u32 width; 419 __u32 height; 420 /* driver specific handle */ 421 __u32 handle; 422}; 423 424struct drm_mode_cursor2 { 425 __u32 flags; 426 __u32 crtc_id; 427 __s32 x; 428 __s32 y; 429 __u32 width; 430 __u32 height; 431 /* driver specific handle */ 432 __u32 handle; 433 __s32 hot_x; 434 __s32 hot_y; 435}; 436 437struct drm_mode_crtc_lut { 438 __u32 crtc_id; 439 __u32 gamma_size; 440 441 /* pointers to arrays */ 442 __u64 red; 443 __u64 green; 444 __u64 blue; 445}; 446 447#define DRM_MODE_PAGE_FLIP_EVENT 0x01 448#define DRM_MODE_PAGE_FLIP_ASYNC 0x02 449#define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC) 450 451/* 452 * Request a page flip on the specified crtc. 453 * 454 * This ioctl will ask KMS to schedule a page flip for the specified 455 * crtc. Once any pending rendering targeting the specified fb (as of 456 * ioctl time) has completed, the crtc will be reprogrammed to display 457 * that fb after the next vertical refresh. The ioctl returns 458 * immediately, but subsequent rendering to the current fb will block 459 * in the execbuffer ioctl until the page flip happens. If a page 460 * flip is already pending as the ioctl is called, EBUSY will be 461 * returned. 462 * 463 * The ioctl supports one flag, DRM_MODE_PAGE_FLIP_EVENT, which will 464 * request that drm sends back a vblank event (see drm.h: struct 465 * drm_event_vblank) when the page flip is done. The user_data field 466 * passed in with this ioctl will be returned as the user_data field 467 * in the vblank event struct. 468 * 469 * The reserved field must be zero until we figure out something 470 * clever to use it for. 471 */ 472 473struct drm_mode_crtc_page_flip { 474 __u32 crtc_id; 475 __u32 fb_id; 476 __u32 flags; 477 __u32 reserved; 478 __u64 user_data; 479}; 480 481/* create a dumb scanout buffer */ 482struct drm_mode_create_dumb { 483 __u32 height; 484 __u32 width; 485 __u32 bpp; 486 __u32 flags; 487 /* handle, pitch, size will be returned */ 488 __u32 handle; 489 __u32 pitch; 490 __u64 size; 491}; 492 493/* set up for mmap of a dumb scanout buffer */ 494struct drm_mode_map_dumb { 495 /** Handle for the object being mapped. */ 496 __u32 handle; 497 __u32 pad; 498 /** 499 * Fake offset to use for subsequent mmap call 500 * 501 * This is a fixed-size type for 32/64 compatibility. 502 */ 503 __u64 offset; 504}; 505 506struct drm_mode_destroy_dumb { 507 __u32 handle; 508}; 509 510/* page-flip flags are valid, plus: */ 511#define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 512#define DRM_MODE_ATOMIC_NONBLOCK 0x0200 513#define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 514 515struct drm_mode_atomic { 516 __u32 flags; 517 __u32 count_objs; 518 __u64 objs_ptr; 519 __u64 count_props_ptr; 520 __u64 props_ptr; 521 __u64 prop_values_ptr; 522 __u64 reserved; 523 __u64 user_data; 524}; 525 526/** 527 * Create a new 'blob' data property, copying length bytes from data pointer, 528 * and returning new blob ID. 529 */ 530struct drm_mode_create_blob { 531 /** Pointer to data to copy. */ 532 __u64 data; 533 /** Length of data to copy. */ 534 __u32 length; 535 /** Return: new property ID. */ 536 __u32 blob_id; 537}; 538 539/** 540 * Destroy a user-created blob property. 541 */ 542struct drm_mode_destroy_blob { 543 __u32 blob_id; 544}; 545 546 547#endif 548