1/* 2 * Copyright (c) 2005 ASPEED Technology Inc. 3 * 4 * Permission to use, copy, modify, distribute, and sell this software and its 5 * documentation for any purpose is hereby granted without fee, provided that 6 * the above copyright notice appear in all copies and that both that 7 * copyright notice and this permission notice appear in supporting 8 * documentation, and that the name of the authors not be used in 9 * advertising or publicity pertaining to distribution of the software without 10 * specific, written prior permission. The authors makes no representations 11 * about the suitability of this software for any purpose. It is provided 12 * "as is" without express or implied warranty. 13 * 14 * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 16 * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 20 * PERFORMANCE OF THIS SOFTWARE. 21 */ 22 23/* Eng Capability Definition */ 24#define ENG_CAP_Sync 0x0001 25#define ENG_CAP_ScreenToScreenCopy 0x0002 26#define ENG_CAP_SolidFill 0x0004 27#define ENG_CAP_SolidLine 0x0008 28#define ENG_CAP_DashedLine 0x0010 29#define ENG_CAP_Mono8x8PatternFill 0x0020 30#define ENG_CAP_Color8x8PatternFill 0x0040 31#define ENG_CAP_CPUToScreenColorExpand 0x0080 32#define ENG_CAP_ScreenToScreenColorExpand 0x0100 33#define ENG_CAP_Clipping 0x0200 34#define ENG_CAP_ALL (ENG_CAP_Sync | ENG_CAP_ScreenToScreenCopy | ENG_CAP_SolidFill | \ 35 ENG_CAP_SolidLine | ENG_CAP_DashedLine | \ 36 ENG_CAP_Mono8x8PatternFill | ENG_CAP_Color8x8PatternFill | \ 37 ENG_CAP_Clipping); 38 39/* CMDQ Definition */ 40#define AGP_CMD_QUEUE 1 41#define VM_CMD_QUEUE 0 42#define VM_CMD_MMIO 2 43 44#define CMD_QUEUE_SIZE_256K 0x00040000 45#define CMD_QUEUE_SIZE_512K 0x00080000 46#define CMD_QUEUE_SIZE_1M 0x00100000 47#define CMD_QUEUE_SIZE_2M 0x00200000 48#define CMD_QUEUE_SIZE_4M 0x00400000 49 50#define PIXEL_FMT_YV12 FOURCC_YV12 /* 0x32315659 */ 51#define PIXEL_FMT_UYVY FOURCC_UYVY /* 0x59565955 */ 52#define PIXEL_FMT_YUY2 FOURCC_YUY2 /* 0x32595559 */ 53#define PIXEL_FMT_RGB5 0x35315652 54#define PIXEL_FMT_RGB6 0x36315652 55#define PIXEL_FMT_YVYU 0x55595659 56#define PIXEL_FMT_NV12 0x3231564e 57#define PIXEL_FMT_NV21 0x3132564e 58 59/* CMD Type Info */ 60#define PKT_NULL_CMD 0x00009561 61#define PKT_BURST_CMD_HEADER0 0x00009564 62 63#define PKT_SINGLE_LENGTH 8 64#define PKT_SINGLE_CMD_HEADER 0x00009562 65 66typedef struct _PKT_SC 67{ 68 ULONG PKT_SC_dwHeader; 69 ULONG PKT_SC_dwData[1]; 70 71} PKT_SC, *PPKT_SC; 72 73/* Packet CMD Scale */ 74#define PKT_TYPESCALE_LENGTH 56 75#define PKT_TYPESCALE_DATALENGTH (0xC<<16) 76#define PKT_TYPESCALE_ADDRSTART 0x00000000 77 78typedef struct _BURSTSCALECMD 79{ 80 ULONG dwHeader0; 81 ULONG dwSrcBaseAddr; /* 8000 */ 82 union 83 { 84 struct 85 { 86 USHORT wSrcDummy; /* 8004 */ 87 USHORT wSrcPitch; /* 8006 */ 88 }; 89 ULONG dwSrcPitch; /* 8004 */ 90 }; 91 ULONG dwDstBaseAddr; /* 8008 */ 92 union 93 { 94 struct 95 { 96 USHORT wDstHeight; /* 800C */ 97 USHORT wDstPitch; /* 800E */ 98 }; 99 ULONG dwDstHeightPitch; /* 800C */ 100 }; 101 union 102 { 103 struct 104 { 105 short wDstY; /* 8010 */ 106 short wDstX; /* 8012 */ 107 }; 108 ULONG dwDstXY; /* 8010 */ 109 }; 110 union 111 { 112 struct 113 { 114 short wSrcY; /* 8014 */ 115 short wSrcX; /* 8016 */ 116 }; 117 ULONG dwSrcXY; /* 8014 */ 118 }; 119 union 120 { 121 struct 122 { 123 USHORT wRecHeight; /* 8018 */ 124 USHORT wRecWidth; /* 801A */ 125 }; 126 ULONG dwRecHeightWidth; /* 8018 */ 127 }; 128 ULONG dwInitScaleFactorH; /* 801C */ 129 ULONG dwInitScaleFactorV; /* 8020 */ 130 ULONG dwScaleFactorH; /* 8024 */ 131 ULONG dwScaleFactorV; /* 8028 */ 132 133 ULONG dwCmd; /* 823C */ 134 ULONG NullData[1]; 135} BURSTSCALECMD, *PBURSTSCALECMD; 136 137/* Eng Reg. Limitation */ 138#define MAX_SRC_X 0x7FF 139#define MAX_SRC_Y 0x7FF 140#define MAX_DST_X 0x7FF 141#define MAX_DST_Y 0x7FF 142 143#define MASK_SRC_PITCH 0x1FFF 144#define MASK_DST_PITCH 0x1FFF 145#define MASK_DST_HEIGHT 0x7FF 146#define MASK_SRC_X 0xFFF 147#define MASK_SRC_Y 0xFFF 148#define MASK_DST_X 0xFFF 149#define MASK_DST_Y 0xFFF 150#define MASK_RECT_WIDTH 0x7FF 151#define MASK_RECT_HEIGHT 0x7FF 152#define MASK_CLIP 0xFFF 153 154#define MASK_LINE_X 0xFFF 155#define MASK_LINE_Y 0xFFF 156#define MASK_LINE_ERR 0x3FFFFF 157#define MASK_LINE_WIDTH 0x7FF 158#define MASK_LINE_K1 0x3FFFFF 159#define MASK_LINE_K2 0x3FFFFF 160#define MASK_AIPLINE_X 0xFFF 161#define MASK_AIPLINE_Y 0xFFF 162 163#define MAX_PATReg_Size 256 164 165/* Eng Reg. Definition */ 166/* MMIO Reg */ 167#define MMIOREG_SRC_BASE (pAST->MMIOVirtualAddr + 0x8000) 168#define MMIOREG_SRC_PITCH (pAST->MMIOVirtualAddr + 0x8004) 169#define MMIOREG_DST_BASE (pAST->MMIOVirtualAddr + 0x8008) 170#define MMIOREG_DST_PITCH (pAST->MMIOVirtualAddr + 0x800C) 171#define MMIOREG_DST_XY (pAST->MMIOVirtualAddr + 0x8010) 172#define MMIOREG_SRC_XY (pAST->MMIOVirtualAddr + 0x8014) 173#define MMIOREG_RECT_XY (pAST->MMIOVirtualAddr + 0x8018) 174#define MMIOREG_FG (pAST->MMIOVirtualAddr + 0x801C) 175#define MMIOREG_BG (pAST->MMIOVirtualAddr + 0x8020) 176#define MMIOREG_FG_SRC (pAST->MMIOVirtualAddr + 0x8024) 177#define MMIOREG_BG_SRC (pAST->MMIOVirtualAddr + 0x8028) 178#define MMIOREG_MONO1 (pAST->MMIOVirtualAddr + 0x802C) 179#define MMIOREG_MONO2 (pAST->MMIOVirtualAddr + 0x8030) 180#define MMIOREG_CLIP1 (pAST->MMIOVirtualAddr + 0x8034) 181#define MMIOREG_CLIP2 (pAST->MMIOVirtualAddr + 0x8038) 182#define MMIOREG_CMD (pAST->MMIOVirtualAddr + 0x803C) 183#define MMIOREG_PAT (pAST->MMIOVirtualAddr + 0x8100) 184 185#define MMIOREG_LINE_XY (pAST->MMIOVirtualAddr + 0x8010) 186#define MMIOREG_LINE_Err (pAST->MMIOVirtualAddr + 0x8014) 187#define MMIOREG_LINE_WIDTH (pAST->MMIOVirtualAddr + 0x8018) 188#define MMIOREG_LINE_K1 (pAST->MMIOVirtualAddr + 0x8024) 189#define MMIOREG_LINE_K2 (pAST->MMIOVirtualAddr + 0x8028) 190#define MMIOREG_LINE_STYLE1 (pAST->MMIOVirtualAddr + 0x802C) 191#define MMIOREG_LINE_STYLE2 (pAST->MMIOVirtualAddr + 0x8030) 192#define MMIOREG_LINE_XY2 (pAST->MMIOVirtualAddr + 0x8014) 193#define MMIOREG_LINE_NUMBER (pAST->MMIOVirtualAddr + 0x8018) 194 195/* CMDQ Reg */ 196#define CMDQREG_SRC_BASE (0x00 << 24) 197#define CMDQREG_SRC_PITCH (0x01 << 24) 198#define CMDQREG_DST_BASE (0x02 << 24) 199#define CMDQREG_DST_PITCH (0x03 << 24) 200#define CMDQREG_DST_XY (0x04 << 24) 201#define CMDQREG_SRC_XY (0x05 << 24) 202#define CMDQREG_RECT_XY (0x06 << 24) 203#define CMDQREG_FG (0x07 << 24) 204#define CMDQREG_BG (0x08 << 24) 205#define CMDQREG_FG_SRC (0x09 << 24) 206#define CMDQREG_BG_SRC (0x0A << 24) 207#define CMDQREG_MONO1 (0x0B << 24) 208#define CMDQREG_MONO2 (0x0C << 24) 209#define CMDQREG_CLIP1 (0x0D << 24) 210#define CMDQREG_CLIP2 (0x0E << 24) 211#define CMDQREG_CMD (0x0F << 24) 212#define CMDQREG_PAT (0x40 << 24) 213 214#define CMDQREG_LINE_XY (0x04 << 24) 215#define CMDQREG_LINE_Err (0x05 << 24) 216#define CMDQREG_LINE_WIDTH (0x06 << 24) 217#define CMDQREG_LINE_K1 (0x09 << 24) 218#define CMDQREG_LINE_K2 (0x0A << 24) 219#define CMDQREG_LINE_STYLE1 (0x0B << 24) 220#define CMDQREG_LINE_STYLE2 (0x0C << 24) 221#define CMDQREG_LINE_XY2 (0x05 << 24) 222#define CMDQREG_LINE_NUMBER (0x06 << 24) 223 224/* CMD Reg. Definition */ 225#define CMD_BITBLT 0x00000000 226#define CMD_LINEDRAW 0x00000001 227#define CMD_COLOREXP 0x00000002 228#define CMD_ENHCOLOREXP 0x00000003 229#define CMD_TRANSPARENTBLT 0x00000004 230#define CMD_TYPE_SCALE 0x00000005 231#define CMD_MASK 0x00000007 232 233#define CMD_DISABLE_CLIP 0x00000000 234#define CMD_ENABLE_CLIP 0x00000008 235 236#define CMD_COLOR_08 0x00000000 237#define CMD_COLOR_16 0x00000010 238#define CMD_COLOR_32 0x00000020 239 240#define CMD_SRC_SIQ 0x00000040 241 242#define CMD_TRANSPARENT 0x00000080 243 244#define CMD_PAT_FGCOLOR 0x00000000 245#define CMD_PAT_MONOMASK 0x00010000 246#define CMD_PAT_PATREG 0x00020000 247 248#define CMD_OPAQUE 0x00000000 249#define CMD_FONT_TRANSPARENT 0x00040000 250 251#define CMD_X_INC 0x00000000 252#define CMD_X_DEC 0x00200000 253 254#define CMD_Y_INC 0x00000000 255#define CMD_Y_DEC 0x00100000 256 257#define CMD_NT_LINE 0x00000000 258#define CMD_NORMAL_LINE 0x00400000 259 260#define CMD_DRAW_LAST_PIXEL 0x00000000 261#define CMD_NOT_DRAW_LAST_PIXEL 0x00800000 262 263#define CMD_DISABLE_LINE_STYLE 0x00000000 264#define CMD_ENABLE_LINE_STYLE 0x40000000 265 266#define CMD_RESET_STYLE_COUNTER 0x80000000 267#define CMD_NOT_RESET_STYLE_COUNTER 0x00000000 268 269#define BURST_FORCE_CMD 0x80000000 270 271#define YUV_FORMAT_YUYV (0UL<<12) 272#define YUV_FORMAT_YVYU (1UL<<12) 273#define YUV_FORMAT_UYVY (2UL<<12) 274#define YUV_FORMAT_VYUY (3UL<<12) 275 276#define SCALE_FORMAT_RGB2RGB (0UL<<14) 277#define SCALE_FORMAT_YUV2RGB (1UL<<14) 278#define SCALE_FORMAT_RGB2RGB_DOWN (2UL<<14) /* RGB32 to RGB16 */ 279#define SCALE_FORMAT_RGB2RGB_UP (3UL<<14) /* RGB16 to RGB32 */ 280#define SCALE_SEG_NUM_1 (0x3FUL<<24) /* DstWi >= SrcWi */ 281#define SCALE_SEG_NUM_2 (0x1FUL<<24) /* DstWi < SrcWi */ 282#define SCALE_EQUAL_VER (0x1UL<<23) 283 284/* Line */ 285#define LINEPARAM_XM 0x00000001 286#define LINEPARAM_X_DEC 0x00000002 287#define LINEPARAM_Y_DEC 0x00000004 288 289typedef struct _LINEPARAM { 290 USHORT dsLineX; 291 USHORT dsLineY; 292 USHORT dsLineWidth; 293 ULONG dwErrorTerm; 294 ULONG dwK1Term; 295 ULONG dwK2Term; 296 ULONG dwLineAttributes; 297} LINEPARAM, *PLINEPARAM; 298 299typedef struct { 300 301 LONG X1; 302 LONG Y1; 303 LONG X2; 304 LONG Y2; 305 306} _LINEInfo; 307 308/* Macro */ 309/* MMIO 2D Macro */ 310#define ASTSetupSRCBase_MMIO(base) \ 311 { \ 312 do { \ 313 *(ULONG *)(MMIOREG_SRC_BASE) = (ULONG) (base); \ 314 } while (*(volatile ULONG *)(MMIOREG_SRC_BASE) != (ULONG) (base)); \ 315 } 316#define ASTSetupSRCPitch_MMIO(pitch) \ 317 { \ 318 do { \ 319 *(ULONG *)(MMIOREG_SRC_PITCH) = (ULONG)(pitch << 16); \ 320 } while (*(volatile ULONG *)(MMIOREG_SRC_PITCH) != (ULONG)(pitch << 16)); \ 321 } 322#define ASTSetupDSTBase_MMIO(base) \ 323 { \ 324 do { \ 325 *(ULONG *)(MMIOREG_DST_BASE) = (ULONG)(base); \ 326 } while (*(volatile ULONG *)(MMIOREG_DST_BASE) != (ULONG)(base)); \ 327 } 328#define ASTSetupDSTPitchHeight_MMIO(pitch, height) \ 329 { \ 330 ULONG dstpitch; \ 331 dstpitch = (ULONG)((pitch << 16) + ((height) & MASK_DST_HEIGHT)); \ 332 do { \ 333 *(ULONG *)(MMIOREG_DST_PITCH) = dstpitch; \ 334 } while (*(volatile ULONG *)(MMIOREG_DST_PITCH) != dstpitch); \ 335 } 336#define ASTSetupDSTXY_MMIO(x, y) \ 337 { \ 338 ULONG dstxy; \ 339 dstxy = (ULONG)(((x & MASK_DST_X) << 16) + (y & MASK_DST_Y)); \ 340 do { \ 341 *(ULONG *)(MMIOREG_DST_XY) = dstxy; \ 342 } while (*(volatile ULONG *)(MMIOREG_DST_XY) != dstxy); \ 343 } 344#define ASTSetupSRCXY_MMIO(x, y) \ 345 { \ 346 ULONG srcxy; \ 347 srcxy = (ULONG)(((x & MASK_SRC_X) << 16) + (y & MASK_SRC_Y)); \ 348 do { \ 349 *(ULONG *)(MMIOREG_SRC_XY) = srcxy; \ 350 } while (*(volatile ULONG *)(MMIOREG_SRC_XY) != srcxy); \ 351 } 352#define ASTSetupRECTXY_MMIO(x, y) \ 353 { \ 354 ULONG rectxy; \ 355 rectxy = (ULONG)(((x & MASK_RECT_WIDTH) << 16) + (y & MASK_RECT_WIDTH)); \ 356 do { \ 357 *(ULONG *)(MMIOREG_RECT_XY) = rectxy; \ 358 } while (*(volatile ULONG *)(MMIOREG_RECT_XY) != rectxy); \ 359 } 360#define ASTSetupFG_MMIO(color) \ 361 { \ 362 do { \ 363 *(ULONG *)(MMIOREG_FG) = (ULONG)(color); \ 364 } while (*(volatile ULONG *)(MMIOREG_FG) != (ULONG)(color)); \ 365 } 366#define ASTSetupBG_MMIO(color) \ 367 { \ 368 do { \ 369 *(ULONG *)(MMIOREG_BG) = (ULONG)(color); \ 370 } while (*(volatile ULONG *)(MMIOREG_BG) != (ULONG)(color)); \ 371 } 372#define ASTSetupMONO1_MMIO(pat) \ 373 { \ 374 do { \ 375 *(ULONG *)(MMIOREG_MONO1) = (ULONG)(pat); \ 376 } while (*(volatile ULONG *)(MMIOREG_MONO1) != (ULONG)(pat)); \ 377 } 378#define ASTSetupMONO2_MMIO(pat) \ 379 { \ 380 do { \ 381 *(ULONG *)(MMIOREG_MONO2) = (ULONG)(pat); \ 382 } while (*(volatile ULONG *)(MMIOREG_MONO2) != (ULONG)(pat)); \ 383 } 384#define ASTSetupCLIP1_MMIO(left, top) \ 385 { \ 386 ULONG clip1; \ 387 clip1 = (ULONG)(((left & MASK_CLIP) << 16) + (top & MASK_CLIP)); \ 388 do { \ 389 *(ULONG *)(MMIOREG_CLIP1) = clip1; \ 390 } while (*(volatile ULONG *)(MMIOREG_CLIP1) != clip1); \ 391 } 392#define ASTSetupCLIP2_MMIO(right, bottom) \ 393 { \ 394 ULONG clip2; \ 395 clip2 = (ULONG)(((right & MASK_CLIP) << 16) + (bottom & MASK_CLIP)); \ 396 do { \ 397 *(ULONG *)(MMIOREG_CLIP2) = clip2; \ 398 } while (*(volatile ULONG *)(MMIOREG_CLIP2) != clip2); \ 399 } 400#define ASTSetupCMDReg_MMIO(reg) \ 401 { \ 402 *(ULONG *)(MMIOREG_CMD) = (ULONG)(reg); \ 403 } 404#define ASTSetupPatReg_MMIO(patreg, pat) \ 405 { \ 406 do { \ 407 *(ULONG *)(MMIOREG_PAT + patreg*4) = (ULONG)(pat); \ 408 } while (*(volatile ULONG *)(MMIOREG_PAT + patreg*4) != (ULONG)(pat)); \ 409 } 410 411/* Line CMD */ 412#define ASTSetupLineXY_MMIO(x, y) \ 413 { \ 414 ULONG linexy; \ 415 linexy = (ULONG)(((x & MASK_LINE_X) << 16) + (y & MASK_LINE_Y)); \ 416 do { \ 417 *(ULONG *)(MMIOREG_LINE_XY) = linexy; \ 418 } while (*(volatile ULONG *)(MMIOREG_LINE_XY) != linexy); \ 419 } 420#define ASTSetupLineXMErrTerm_MMIO(xm, err) \ 421 { \ 422 ULONG lineerr; \ 423 lineerr = (ULONG)((xm << 24) + (err & MASK_LINE_ERR)); \ 424 do { \ 425 *(ULONG *)(MMIOREG_LINE_Err) = lineerr; \ 426 } while (*(volatile ULONG *)(MMIOREG_LINE_Err) != lineerr); \ 427 } 428#define ASTSetupLineWidth_MMIO(width) \ 429 { \ 430 ULONG linewidth; \ 431 linewidth = (ULONG)((width & MASK_LINE_WIDTH) << 16); \ 432 do { \ 433 *(ULONG *)(MMIOREG_LINE_WIDTH) = linewidth; \ 434 } while (*(volatile ULONG *)(MMIOREG_LINE_WIDTH) != linewidth); \ 435 } 436#define ASTSetupLineK1Term_MMIO(err) \ 437 { \ 438 do { \ 439 *(ULONG *)(MMIOREG_LINE_K1) = (ULONG)(err & MASK_LINE_K1); \ 440 } while (*(volatile ULONG *)(MMIOREG_LINE_K1) != (ULONG)(err & MASK_LINE_K1)); \ 441 } 442#define ASTSetupLineK2Term_MMIO(err) \ 443 { \ 444 do { \ 445 *(ULONG *)(MMIOREG_LINE_K2) = (ULONG)(err & MASK_LINE_K2); \ 446 } while (*(volatile ULONG *)(MMIOREG_LINE_K2) != (ULONG)(err & MASK_LINE_K2)); \ 447 } 448#define ASTSetupLineStyle1_MMIO(pat) \ 449 { \ 450 do { \ 451 *(ULONG *)(MMIOREG_LINE_STYLE1) = (ULONG)(pat); \ 452 } while (*(volatile ULONG *)(MMIOREG_LINE_STYLE1) != (ULONG)(pat)); \ 453 } 454#define ASTSetupLineStyle2_MMIO(pat) \ 455 { \ 456 do { \ 457 *(ULONG *)(MMIOREG_LINE_STYLE2) = (ULONG)(pat); \ 458 } while (*(volatile ULONG *)(MMIOREG_LINE_STYLE2) != (ULONG)(pat)); \ 459 } 460 461/* AIP Line CMD */ 462#define AIPSetupLineXY_MMIO(x, y) \ 463 { \ 464 ULONG linexy; \ 465 linexy = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \ 466 do { \ 467 *(ULONG *)(MMIOREG_LINE_XY) = linexy; \ 468 } while (*(volatile ULONG *)(MMIOREG_LINE_XY) != linexy); \ 469 } 470#define AIPSetupLineXY2_MMIO(x, y) \ 471 { \ 472 ULONG linexy; \ 473 linexy = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \ 474 do { \ 475 *(ULONG *)(MMIOREG_LINE_XY2) = linexy; \ 476 } while (*(volatile ULONG *)(MMIOREG_LINE_XY2) != linexy); \ 477 } 478#define AIPSetupLineNumber_MMIO(no) \ 479 { \ 480 do { \ 481 *(ULONG *)(MMIOREG_LINE_NUMBER) = (ULONG) no; \ 482 } while (*(volatile ULONG *)(MMIOREG_LINE_NUMBER) != (ULONG) no); \ 483 } 484 485/* CMDQ Mode Macro */ 486#define mUpdateWritePointer *(ULONG *) (pAST->CMDQInfo.pjWritePort) = (pAST->CMDQInfo.ulWritePointer >>3) 487 488/* General CMD */ 489#define ASTSetupSRCBase(addr, base) \ 490 { \ 491 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_BASE); \ 492 addr->PKT_SC_dwData[0] = (ULONG)(base); \ 493 } 494#define ASTSetupSRCPitch(addr, pitch) \ 495 { \ 496 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_PITCH); \ 497 addr->PKT_SC_dwData[0] = (ULONG)(pitch << 16); \ 498 } 499#define ASTSetupDSTBase(addr, base) \ 500 { \ 501 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_BASE); \ 502 addr->PKT_SC_dwData[0] = (ULONG)(base); \ 503 } 504#define ASTSetupDSTPitchHeight(addr, pitch, height) \ 505 { \ 506 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_PITCH); \ 507 addr->PKT_SC_dwData[0] = (ULONG)((pitch << 16) + ((height) & MASK_DST_HEIGHT)); \ 508 } 509#define ASTSetupDSTXY(addr, x, y) \ 510 { \ 511 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_XY); \ 512 addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_DST_X) << 16) + (y & MASK_DST_Y)); \ 513 } 514#define ASTSetupSRCXY(addr, x, y) \ 515 { \ 516 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_XY); \ 517 addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_SRC_X) << 16) + (y & MASK_SRC_Y)); \ 518 } 519#define ASTSetupRECTXY(addr, x, y) \ 520 { \ 521 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_RECT_XY); \ 522 addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_RECT_WIDTH) << 16) + (y & MASK_RECT_WIDTH)); \ 523 } 524#define ASTSetupFG(addr, color) \ 525 { \ 526 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_FG); \ 527 addr->PKT_SC_dwData[0] = (ULONG)(color); \ 528 } 529#define ASTSetupBG(addr, color) \ 530 { \ 531 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_BG); \ 532 addr->PKT_SC_dwData[0] = (ULONG)(color); \ 533 } 534#define ASTSetupMONO1(addr, pat) \ 535 { \ 536 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_MONO1); \ 537 addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 538 } 539#define ASTSetupMONO2(addr, pat) \ 540 { \ 541 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_MONO2); \ 542 addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 543 } 544#define ASTSetupCLIP1(addr, left, top) \ 545 { \ 546 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CLIP1); \ 547 addr->PKT_SC_dwData[0] = (ULONG)(((left & MASK_CLIP) << 16) + (top & MASK_CLIP)); \ 548 } 549#define ASTSetupCLIP2(addr, right, bottom) \ 550 { \ 551 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CLIP2); \ 552 addr->PKT_SC_dwData[0] = (ULONG)(((right & MASK_CLIP) << 16) + (bottom & MASK_CLIP)); \ 553 } 554#define ASTSetupCMDReg(addr, reg) \ 555 { \ 556 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CMD); \ 557 addr->PKT_SC_dwData[0] = (ULONG)(reg); \ 558 } 559#define ASTSetupPatReg(addr, patreg, pat) \ 560 { \ 561 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + (CMDQREG_PAT + (patreg << 24))); \ 562 addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 563 } 564 565/* Line CMD */ 566#define ASTSetupLineXY(addr, x, y) \ 567 { \ 568 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY); \ 569 addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_LINE_X) << 16) + (y & MASK_LINE_Y)); \ 570 } 571#define ASTSetupLineXMErrTerm(addr, xm, err) \ 572 { \ 573 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_Err); \ 574 addr->PKT_SC_dwData[0] = (ULONG)((xm << 24) + (err & MASK_LINE_ERR)); \ 575 } 576#define ASTSetupLineWidth(addr, width) \ 577 { \ 578 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_WIDTH); \ 579 addr->PKT_SC_dwData[0] = (ULONG)((width & MASK_LINE_WIDTH) << 16); \ 580 } 581#define ASTSetupLineK1Term(addr, err) \ 582 { \ 583 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_K1); \ 584 addr->PKT_SC_dwData[0] = (ULONG)(err & MASK_LINE_K1); \ 585 } 586#define ASTSetupLineK2Term(addr, err) \ 587 { \ 588 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_K2); \ 589 addr->PKT_SC_dwData[0] = (ULONG)(err & MASK_LINE_K2); \ 590 } 591#define ASTSetupLineStyle1(addr, pat) \ 592 { \ 593 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_STYLE1); \ 594 addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 595 } 596#define ASTSetupLineStyle2(addr, pat) \ 597 { \ 598 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_STYLE2); \ 599 addr->PKT_SC_dwData[0] = (ULONG)(pat); \ 600 } 601 602#define ASTSetupNULLCMD(addr) \ 603 { \ 604 addr->PKT_SC_dwHeader = (ULONG) (PKT_NULL_CMD); \ 605 addr->PKT_SC_dwData[0] = (ULONG) 0; \ 606 } 607 608/* AIP Line CMD */ 609#define AIPSetupLineXY(addr, x, y) \ 610 { \ 611 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY); \ 612 addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \ 613 } 614#define AIPSetupLineXY2(addr, x, y) \ 615 { \ 616 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY2); \ 617 addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \ 618 } 619#define AIPSetupLineNumber(addr, no) \ 620 { \ 621 addr->PKT_SC_dwHeader = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_NUMBER); \ 622 addr->PKT_SC_dwData[0] = (ULONG)(no); \ 623 } 624 625Bool bASTGetLineTerm(_LINEInfo *LineInfo, LINEPARAM *dsLineParam); 626