ast_2dtool.h revision b410ddbe
1/*
2 * Copyright (c) 2005 ASPEED Technology Inc.
3 *
4 * Permission to use, copy, modify, distribute, and sell this software and its
5 * documentation for any purpose is hereby granted without fee, provided that
6 * the above copyright notice appear in all copies and that both that
7 * copyright notice and this permission notice appear in supporting
8 * documentation, and that the name of the authors not be used in
9 * advertising or publicity pertaining to distribution of the software without
10 * specific, written prior permission.  The authors makes no representations
11 * about the suitability of this software for any purpose.  It is provided
12 * "as is" without express or implied warranty.
13 *
14 * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16 * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
20 * PERFORMANCE OF THIS SOFTWARE.
21 */
22
23/* Eng Capability Definition */
24#define	ENG_CAP_Sync				0x0001
25#define	ENG_CAP_ScreenToScreenCopy		0x0002
26#define	ENG_CAP_SolidFill			0x0004
27#define	ENG_CAP_SolidLine			0x0008
28#define	ENG_CAP_DashedLine			0x0010
29#define	ENG_CAP_Mono8x8PatternFill		0x0020
30#define	ENG_CAP_Color8x8PatternFill		0x0040
31#define	ENG_CAP_CPUToScreenColorExpand		0x0080
32#define	ENG_CAP_ScreenToScreenColorExpand	0x0100
33#define	ENG_CAP_Clipping			0x0200
34#define ENG_CAP_ALL	(ENG_CAP_Sync | ENG_CAP_ScreenToScreenCopy | ENG_CAP_SolidFill	|	\
35                         ENG_CAP_SolidLine | ENG_CAP_DashedLine |				\
36                         ENG_CAP_Mono8x8PatternFill | ENG_CAP_Color8x8PatternFill |		\
37                         ENG_CAP_Clipping);
38
39/* CMDQ Definition */
40#define    AGP_CMD_QUEUE                   	1
41#define    VM_CMD_QUEUE                    	0
42#define    VM_CMD_MMIO                     	2
43
44#define    CMD_QUEUE_SIZE_256K             	0x00040000
45#define    CMD_QUEUE_SIZE_512K             	0x00080000
46#define    CMD_QUEUE_SIZE_1M               	0x00100000
47#define    CMD_QUEUE_SIZE_2M               	0x00200000
48#define    CMD_QUEUE_SIZE_4M               	0x00400000
49
50/* CMD Type Info */
51#define    PKT_NULL_CMD             		0x00009561
52
53#define    PKT_SINGLE_LENGTH        		8
54#define    PKT_SINGLE_CMD_HEADER    		0x00009562
55
56typedef struct  _PKT_SC
57{
58    ULONG    PKT_SC_dwHeader;
59    ULONG    PKT_SC_dwData[1];
60
61} PKT_SC, *PPKT_SC;
62
63/* Eng Reg. Limitation */
64#define	MAX_SRC_X				0x7FF
65#define	MAX_SRC_Y				0x7FF
66#define	MAX_DST_X				0x7FF
67#define	MAX_DST_Y				0x7FF
68
69#define	MASK_SRC_PITCH				0x1FFF
70#define	MASK_DST_PITCH				0x1FFF
71#define	MASK_DST_HEIGHT				0x7FF
72#define	MASK_SRC_X				0xFFF
73#define	MASK_SRC_Y				0xFFF
74#define	MASK_DST_X				0xFFF
75#define	MASK_DST_Y				0xFFF
76#define	MASK_RECT_WIDTH				0x7FF
77#define	MASK_RECT_HEIGHT			0x7FF
78#define MASK_CLIP				0xFFF
79
80#define MASK_LINE_X        			0xFFF
81#define MASK_LINE_Y           			0xFFF
82#define MASK_LINE_ERR   			0x3FFFFF
83#define MASK_LINE_WIDTH   			0x7FF
84#define MASK_LINE_K1				0x3FFFFF
85#define MASK_LINE_K2				0x3FFFFF
86#define MASK_AIPLINE_X        			0xFFF
87#define MASK_AIPLINE_Y         			0xFFF
88
89#define MAX_PATReg_Size				256
90
91/* Eng Reg. Definition */
92/* MMIO Reg */
93#define MMIOREG_SRC_BASE	(pAST->MMIOVirtualAddr + 0x8000)
94#define MMIOREG_SRC_PITCH	(pAST->MMIOVirtualAddr + 0x8004)
95#define MMIOREG_DST_BASE	(pAST->MMIOVirtualAddr + 0x8008)
96#define MMIOREG_DST_PITCH	(pAST->MMIOVirtualAddr + 0x800C)
97#define MMIOREG_DST_XY		(pAST->MMIOVirtualAddr + 0x8010)
98#define MMIOREG_SRC_XY		(pAST->MMIOVirtualAddr + 0x8014)
99#define MMIOREG_RECT_XY		(pAST->MMIOVirtualAddr + 0x8018)
100#define MMIOREG_FG		(pAST->MMIOVirtualAddr + 0x801C)
101#define MMIOREG_BG		(pAST->MMIOVirtualAddr + 0x8020)
102#define MMIOREG_FG_SRC		(pAST->MMIOVirtualAddr + 0x8024)
103#define MMIOREG_BG_SRC		(pAST->MMIOVirtualAddr + 0x8028)
104#define MMIOREG_MONO1		(pAST->MMIOVirtualAddr + 0x802C)
105#define MMIOREG_MONO2		(pAST->MMIOVirtualAddr + 0x8030)
106#define MMIOREG_CLIP1		(pAST->MMIOVirtualAddr + 0x8034)
107#define MMIOREG_CLIP2		(pAST->MMIOVirtualAddr + 0x8038)
108#define MMIOREG_CMD		(pAST->MMIOVirtualAddr + 0x803C)
109#define MMIOREG_PAT		(pAST->MMIOVirtualAddr + 0x8100)
110
111#define MMIOREG_LINE_XY         (pAST->MMIOVirtualAddr + 0x8010)
112#define MMIOREG_LINE_Err        (pAST->MMIOVirtualAddr + 0x8014)
113#define MMIOREG_LINE_WIDTH      (pAST->MMIOVirtualAddr + 0x8018)
114#define MMIOREG_LINE_K1         (pAST->MMIOVirtualAddr + 0x8024)
115#define MMIOREG_LINE_K2         (pAST->MMIOVirtualAddr + 0x8028)
116#define MMIOREG_LINE_STYLE1     (pAST->MMIOVirtualAddr + 0x802C)
117#define MMIOREG_LINE_STYLE2     (pAST->MMIOVirtualAddr + 0x8030)
118#define MMIOREG_LINE_XY2        (pAST->MMIOVirtualAddr + 0x8014)
119#define MMIOREG_LINE_NUMBER     (pAST->MMIOVirtualAddr + 0x8018)
120
121/* CMDQ Reg */
122#define CMDQREG_SRC_BASE	(0x00 << 24)
123#define CMDQREG_SRC_PITCH	(0x01 << 24)
124#define CMDQREG_DST_BASE	(0x02 << 24)
125#define CMDQREG_DST_PITCH	(0x03 << 24)
126#define CMDQREG_DST_XY		(0x04 << 24)
127#define CMDQREG_SRC_XY		(0x05 << 24)
128#define CMDQREG_RECT_XY		(0x06 << 24)
129#define CMDQREG_FG		(0x07 << 24)
130#define CMDQREG_BG		(0x08 << 24)
131#define CMDQREG_FG_SRC		(0x09 << 24)
132#define CMDQREG_BG_SRC		(0x0A << 24)
133#define CMDQREG_MONO1		(0x0B << 24)
134#define CMDQREG_MONO2		(0x0C << 24)
135#define CMDQREG_CLIP1		(0x0D << 24)
136#define CMDQREG_CLIP2		(0x0E << 24)
137#define CMDQREG_CMD		(0x0F << 24)
138#define CMDQREG_PAT		(0x40 << 24)
139
140#define CMDQREG_LINE_XY         (0x04 << 24)
141#define CMDQREG_LINE_Err        (0x05 << 24)
142#define CMDQREG_LINE_WIDTH      (0x06 << 24)
143#define CMDQREG_LINE_K1         (0x09 << 24)
144#define CMDQREG_LINE_K2         (0x0A << 24)
145#define CMDQREG_LINE_STYLE1     (0x0B << 24)
146#define CMDQREG_LINE_STYLE2     (0x0C << 24)
147#define CMDQREG_LINE_XY2        (0x05 << 24)
148#define CMDQREG_LINE_NUMBER     (0x06 << 24)
149
150/* CMD Reg. Definition */
151#define   CMD_BITBLT                 		0x00000000
152#define   CMD_LINEDRAW               		0x00000001
153#define   CMD_COLOREXP               		0x00000002
154#define   CMD_ENHCOLOREXP            		0x00000003
155#define   CMD_TRANSPARENTBLT           		0x00000004
156#define   CMD_MASK            	        	0x00000007
157
158#define   CMD_DISABLE_CLIP           		0x00000000
159#define   CMD_ENABLE_CLIP            		0x00000008
160
161#define   CMD_COLOR_08               		0x00000000
162#define   CMD_COLOR_16               		0x00000010
163#define   CMD_COLOR_32               		0x00000020
164
165#define   CMD_SRC_SIQ                		0x00000040
166
167#define   CMD_TRANSPARENT               	0x00000080
168
169#define   CMD_PAT_FGCOLOR            		0x00000000
170#define   CMD_PAT_MONOMASK           		0x00010000
171#define   CMD_PAT_PATREG             		0x00020000
172
173#define   CMD_OPAQUE                 		0x00000000
174#define   CMD_FONT_TRANSPARENT          	0x00040000
175
176#define   CMD_X_INC				0x00000000
177#define   CMD_X_DEC				0x00200000
178
179#define   CMD_Y_INC				0x00000000
180#define   CMD_Y_DEC				0x00100000
181
182#define   CMD_NT_LINE				0x00000000
183#define	  CMD_NORMAL_LINE			0x00400000
184
185#define   CMD_DRAW_LAST_PIXEL           	0x00000000
186#define   CMD_NOT_DRAW_LAST_PIXEL       	0x00800000
187
188#define   CMD_DISABLE_LINE_STYLE     		0x00000000
189#define   CMD_ENABLE_LINE_STYLE      		0x40000000
190
191#define   CMD_RESET_STYLE_COUNTER       	0x80000000
192#define   CMD_NOT_RESET_STYLE_COUNTER   	0x00000000
193
194#define   BURST_FORCE_CMD            		0x80000000
195
196/* Line */
197#define	LINEPARAM_XM				0x00000001
198#define	LINEPARAM_X_DEC				0x00000002
199#define	LINEPARAM_Y_DEC				0x00000004
200
201typedef struct _LINEPARAM {
202    USHORT	dsLineX;
203    USHORT	dsLineY;
204    USHORT	dsLineWidth;
205    ULONG	dwErrorTerm;
206    ULONG	dwK1Term;
207    ULONG	dwK2Term;
208    ULONG	dwLineAttributes;
209} LINEPARAM, *PLINEPARAM;
210
211typedef struct {
212
213    LONG X1;
214    LONG Y1;
215    LONG X2;
216    LONG Y2;
217
218} _LINEInfo;
219
220/* Macro */
221/* MMIO 2D Macro */
222#define ASTSetupSRCBase_MMIO(base) \
223      { \
224        do { \
225           *(ULONG *)(MMIOREG_SRC_BASE) = (ULONG) (base); \
226        } while (*(volatile ULONG *)(MMIOREG_SRC_BASE) != (ULONG) (base)); \
227      }
228#define ASTSetupSRCPitch_MMIO(pitch) \
229      { \
230        do { \
231           *(ULONG *)(MMIOREG_SRC_PITCH) = (ULONG)(pitch << 16); \
232        } while (*(volatile ULONG *)(MMIOREG_SRC_PITCH) != (ULONG)(pitch << 16)); \
233      }
234#define ASTSetupDSTBase_MMIO(base) \
235      { \
236        do { \
237           *(ULONG *)(MMIOREG_DST_BASE) = (ULONG)(base); \
238        } while (*(volatile ULONG *)(MMIOREG_DST_BASE) != (ULONG)(base)); \
239      }
240#define ASTSetupDSTPitchHeight_MMIO(pitch, height) \
241      { \
242        ULONG dstpitch; \
243        dstpitch = (ULONG)((pitch << 16) + ((height) & MASK_DST_HEIGHT)); \
244        do { \
245           *(ULONG *)(MMIOREG_DST_PITCH) = dstpitch; \
246        } while (*(volatile ULONG *)(MMIOREG_DST_PITCH) != dstpitch); \
247      }
248#define ASTSetupDSTXY_MMIO(x, y) \
249      { \
250        ULONG dstxy; \
251        dstxy = (ULONG)(((x & MASK_DST_X) << 16) + (y & MASK_DST_Y)); \
252        do { \
253           *(ULONG *)(MMIOREG_DST_XY) = dstxy; \
254        } while (*(volatile ULONG *)(MMIOREG_DST_XY) != dstxy); \
255      }
256#define ASTSetupSRCXY_MMIO(x, y) \
257      { \
258        ULONG srcxy; \
259        srcxy = (ULONG)(((x & MASK_SRC_X) << 16) + (y & MASK_SRC_Y)); \
260        do { \
261           *(ULONG *)(MMIOREG_SRC_XY) = srcxy; \
262        } while (*(volatile ULONG *)(MMIOREG_SRC_XY) != srcxy); \
263      }
264#define ASTSetupRECTXY_MMIO(x, y) \
265      { \
266        ULONG rectxy; \
267        rectxy = (ULONG)(((x & MASK_RECT_WIDTH) << 16) + (y & MASK_RECT_WIDTH)); \
268        do { \
269           *(ULONG *)(MMIOREG_RECT_XY) = rectxy; \
270        } while (*(volatile ULONG *)(MMIOREG_RECT_XY) != rectxy); \
271      }
272#define ASTSetupFG_MMIO(color) \
273      { \
274        do { \
275           *(ULONG *)(MMIOREG_FG) = (ULONG)(color); \
276        } while (*(volatile ULONG *)(MMIOREG_FG) != (ULONG)(color)); \
277      }
278#define ASTSetupBG_MMIO(color) \
279      { \
280        do { \
281           *(ULONG *)(MMIOREG_BG) = (ULONG)(color); \
282        } while (*(volatile ULONG *)(MMIOREG_BG) != (ULONG)(color)); \
283      }
284#define ASTSetupMONO1_MMIO(pat) \
285      { \
286        do { \
287          *(ULONG *)(MMIOREG_MONO1) = (ULONG)(pat); \
288        } while (*(volatile ULONG *)(MMIOREG_MONO1) != (ULONG)(pat)); \
289      }
290#define ASTSetupMONO2_MMIO(pat) \
291      { \
292        do { \
293          *(ULONG *)(MMIOREG_MONO2) = (ULONG)(pat); \
294        } while (*(volatile ULONG *)(MMIOREG_MONO2) != (ULONG)(pat)); \
295      }
296#define ASTSetupCLIP1_MMIO(left, top) \
297      { \
298       ULONG clip1; \
299       clip1 = (ULONG)(((left & MASK_CLIP) << 16) + (top & MASK_CLIP)); \
300       do { \
301          *(ULONG *)(MMIOREG_CLIP1) = clip1; \
302       } while (*(volatile ULONG *)(MMIOREG_CLIP1) != clip1); \
303      }
304#define ASTSetupCLIP2_MMIO(right, bottom) \
305      { \
306       ULONG clip2; \
307       clip2 = (ULONG)(((right & MASK_CLIP) << 16) + (bottom & MASK_CLIP)); \
308       do { \
309          *(ULONG *)(MMIOREG_CLIP2) = clip2; \
310       } while (*(volatile ULONG *)(MMIOREG_CLIP2) != clip2); \
311      }
312#define ASTSetupCMDReg_MMIO(reg) \
313      { \
314        *(ULONG *)(MMIOREG_CMD) = (ULONG)(reg);	\
315      }
316#define ASTSetupPatReg_MMIO(patreg, pat) \
317      { \
318       do { \
319          *(ULONG *)(MMIOREG_PAT + patreg*4) = (ULONG)(pat); \
320       } while (*(volatile ULONG *)(MMIOREG_PAT + patreg*4) != (ULONG)(pat)); \
321      }
322
323/* Line CMD */
324#define ASTSetupLineXY_MMIO(x, y) \
325      { \
326        ULONG linexy; \
327        linexy = (ULONG)(((x & MASK_LINE_X) << 16) + (y & MASK_LINE_Y)); \
328        do { \
329           *(ULONG *)(MMIOREG_LINE_XY) = linexy; \
330        } while (*(volatile ULONG *)(MMIOREG_LINE_XY) != linexy); \
331      }
332#define ASTSetupLineXMErrTerm_MMIO(xm, err) \
333      { \
334        ULONG lineerr; \
335        lineerr = (ULONG)((xm << 24) + (err & MASK_LINE_ERR)); \
336        do { \
337           *(ULONG *)(MMIOREG_LINE_Err) = lineerr; \
338        } while (*(volatile ULONG *)(MMIOREG_LINE_Err) != lineerr); \
339      }
340#define ASTSetupLineWidth_MMIO(width) \
341      { \
342        ULONG linewidth; \
343        linewidth = (ULONG)((width & MASK_LINE_WIDTH) << 16); \
344        do { \
345          *(ULONG *)(MMIOREG_LINE_WIDTH) = linewidth; \
346        } while (*(volatile ULONG *)(MMIOREG_LINE_WIDTH) != linewidth); \
347      }
348#define ASTSetupLineK1Term_MMIO(err) \
349      { \
350        do { \
351          *(ULONG *)(MMIOREG_LINE_K1) = (ULONG)(err & MASK_LINE_K1); \
352        } while (*(volatile ULONG *)(MMIOREG_LINE_K1) != (ULONG)(err & MASK_LINE_K1)); \
353      }
354#define ASTSetupLineK2Term_MMIO(err) \
355      { \
356        do { \
357           *(ULONG *)(MMIOREG_LINE_K2) = (ULONG)(err & MASK_LINE_K2); \
358        } while (*(volatile ULONG *)(MMIOREG_LINE_K2) != (ULONG)(err & MASK_LINE_K2)); \
359      }
360#define ASTSetupLineStyle1_MMIO(pat) \
361      { \
362        do { \
363           *(ULONG *)(MMIOREG_LINE_STYLE1) = (ULONG)(pat); \
364        } while (*(volatile ULONG *)(MMIOREG_LINE_STYLE1) != (ULONG)(pat)); \
365      }
366#define ASTSetupLineStyle2_MMIO(pat) \
367      { \
368        do { \
369          *(ULONG *)(MMIOREG_LINE_STYLE2) = (ULONG)(pat); \
370        } while (*(volatile ULONG *)(MMIOREG_LINE_STYLE2) != (ULONG)(pat)); \
371      }
372
373/* AIP Line CMD */
374#define AIPSetupLineXY_MMIO(x, y) \
375      { \
376        ULONG linexy; \
377        linexy = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \
378        do { \
379           *(ULONG *)(MMIOREG_LINE_XY) = linexy; \
380        } while (*(volatile ULONG *)(MMIOREG_LINE_XY) != linexy); \
381      }
382#define AIPSetupLineXY2_MMIO(x, y) \
383      { \
384        ULONG linexy; \
385        linexy = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y)); \
386        do { \
387           *(ULONG *)(MMIOREG_LINE_XY2) = linexy; \
388        } while (*(volatile ULONG *)(MMIOREG_LINE_XY2) != linexy); \
389      }
390#define AIPSetupLineNumber_MMIO(no) \
391      { \
392        do { \
393           *(ULONG *)(MMIOREG_LINE_NUMBER) = (ULONG) no; \
394        } while (*(volatile ULONG *)(MMIOREG_LINE_NUMBER) != (ULONG) no); \
395      }
396
397/* CMDQ Mode Macro */
398#define mUpdateWritePointer *(ULONG *) (pAST->CMDQInfo.pjWritePort) = (pAST->CMDQInfo.ulWritePointer >>3)
399
400/* General CMD */
401#define ASTSetupSRCBase(addr, base) \
402      { \
403        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_BASE); 	\
404        addr->PKT_SC_dwData[0] = (ULONG)(base);					\
405      }
406#define ASTSetupSRCPitch(addr, pitch) \
407      { \
408        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_PITCH); 	\
409        addr->PKT_SC_dwData[0] = (ULONG)(pitch << 16);					\
410      }
411#define ASTSetupDSTBase(addr, base) \
412      { \
413        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_BASE); 	\
414        addr->PKT_SC_dwData[0] = (ULONG)(base);					\
415      }
416#define ASTSetupDSTPitchHeight(addr, pitch, height) \
417      { \
418        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_PITCH); 	\
419        addr->PKT_SC_dwData[0] = (ULONG)((pitch << 16) + ((height) & MASK_DST_HEIGHT));					\
420      }
421#define ASTSetupDSTXY(addr, x, y) \
422      { \
423        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_DST_XY); 	\
424        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_DST_X) << 16) + (y & MASK_DST_Y));					\
425      }
426#define ASTSetupSRCXY(addr, x, y) \
427      { \
428        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_SRC_XY); 	\
429        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_SRC_X) << 16) + (y & MASK_SRC_Y));					\
430      }
431#define ASTSetupRECTXY(addr, x, y) \
432      { \
433        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_RECT_XY); 	\
434        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_RECT_WIDTH) << 16) + (y & MASK_RECT_WIDTH));					\
435      }
436#define ASTSetupFG(addr, color) \
437      { \
438        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_FG); 	\
439        addr->PKT_SC_dwData[0] = (ULONG)(color);					\
440      }
441#define ASTSetupBG(addr, color) \
442      { \
443        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_BG); 	\
444        addr->PKT_SC_dwData[0] = (ULONG)(color);					\
445      }
446#define ASTSetupMONO1(addr, pat) \
447      { \
448        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_MONO1); 	\
449        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
450      }
451#define ASTSetupMONO2(addr, pat) \
452      { \
453        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_MONO2); 	\
454        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
455      }
456#define ASTSetupCLIP1(addr, left, top) \
457      { \
458        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CLIP1); 	\
459        addr->PKT_SC_dwData[0] = (ULONG)(((left & MASK_CLIP) << 16) + (top & MASK_CLIP));	\
460      }
461#define ASTSetupCLIP2(addr, right, bottom) \
462      { \
463        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CLIP2); 	\
464        addr->PKT_SC_dwData[0] = (ULONG)(((right & MASK_CLIP) << 16) + (bottom & MASK_CLIP));	\
465      }
466#define ASTSetupCMDReg(addr, reg) \
467      { \
468        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_CMD); 	\
469        addr->PKT_SC_dwData[0] = (ULONG)(reg);					\
470      }
471#define ASTSetupPatReg(addr, patreg, pat) \
472      { \
473        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + (CMDQREG_PAT + (patreg << 24))); 	\
474        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
475      }
476
477/* Line CMD */
478#define ASTSetupLineXY(addr, x, y) \
479      { \
480        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY); 	\
481        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_LINE_X) << 16) + (y & MASK_LINE_Y));					\
482      }
483#define ASTSetupLineXMErrTerm(addr, xm, err) \
484      { \
485        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_Err); 	\
486        addr->PKT_SC_dwData[0] = (ULONG)((xm << 24) + (err & MASK_LINE_ERR));					\
487      }
488#define ASTSetupLineWidth(addr, width) \
489      { \
490        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_WIDTH); 	\
491        addr->PKT_SC_dwData[0] = (ULONG)((width & MASK_LINE_WIDTH) << 16);				\
492      }
493#define ASTSetupLineK1Term(addr, err) \
494      { \
495        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_K1); 	\
496        addr->PKT_SC_dwData[0] = (ULONG)(err & MASK_LINE_K1);				\
497      }
498#define ASTSetupLineK2Term(addr, err) \
499      { \
500        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_K2); 	\
501        addr->PKT_SC_dwData[0] = (ULONG)(err & MASK_LINE_K2);				\
502      }
503#define ASTSetupLineStyle1(addr, pat) \
504      { \
505        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_STYLE1); 	\
506        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
507      }
508#define ASTSetupLineStyle2(addr, pat) \
509      { \
510        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_STYLE2); 	\
511        addr->PKT_SC_dwData[0] = (ULONG)(pat);				\
512      }
513
514#define ASTSetupNULLCMD(addr) \
515      { \
516        addr->PKT_SC_dwHeader  = (ULONG) (PKT_NULL_CMD); 			\
517        addr->PKT_SC_dwData[0] = (ULONG) 0;					\
518      }
519
520/* AIP Line CMD */
521#define AIPSetupLineXY(addr, x, y) \
522      { \
523        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY); 	\
524        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y));					\
525      }
526#define AIPSetupLineXY2(addr, x, y) \
527      { \
528        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_XY2); 	\
529        addr->PKT_SC_dwData[0] = (ULONG)(((x & MASK_AIPLINE_X) << 16) + (y & MASK_AIPLINE_Y));					\
530      }
531#define AIPSetupLineNumber(addr, no) \
532      { \
533        addr->PKT_SC_dwHeader  = (ULONG)(PKT_SINGLE_CMD_HEADER + CMDQREG_LINE_NUMBER); 	\
534        addr->PKT_SC_dwData[0] = (ULONG)(no);					\
535      }
536