drmmode_display.h revision 3ed65abb
1de2362d3Smrg/*
2de2362d3Smrg * Copyright © 2007 Red Hat, Inc.
3de2362d3Smrg *
4de2362d3Smrg * Permission is hereby granted, free of charge, to any person obtaining a
5de2362d3Smrg * copy of this software and associated documentation files (the "Software"),
6de2362d3Smrg * to deal in the Software without restriction, including without limitation
7de2362d3Smrg * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8de2362d3Smrg * and/or sell copies of the Software, and to permit persons to whom the
9de2362d3Smrg * Software is furnished to do so, subject to the following conditions:
10de2362d3Smrg *
11de2362d3Smrg * The above copyright notice and this permission notice (including the next
12de2362d3Smrg * paragraph) shall be included in all copies or substantial portions of the
13de2362d3Smrg * Software.
14de2362d3Smrg *
15de2362d3Smrg * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16de2362d3Smrg * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17de2362d3Smrg * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18de2362d3Smrg * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19de2362d3Smrg * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20de2362d3Smrg * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21de2362d3Smrg * SOFTWARE.
22de2362d3Smrg *
23de2362d3Smrg * Authors:
24de2362d3Smrg *     Dave Airlie <airlied@redhat.com>
25de2362d3Smrg *
26de2362d3Smrg */
27de2362d3Smrg#ifndef DRMMODE_DISPLAY_H
28de2362d3Smrg#define DRMMODE_DISPLAY_H
29de2362d3Smrg
30de2362d3Smrg#include "xf86drmMode.h"
31de2362d3Smrg#ifdef HAVE_LIBUDEV
32de2362d3Smrg#include "libudev.h"
33de2362d3Smrg#endif
34de2362d3Smrg
3518781e08Smrg#include "radeon_drm_queue.h"
36de2362d3Smrg#include "radeon_probe.h"
37de2362d3Smrg
3818781e08Smrg#ifndef DRM_CAP_TIMESTAMP_MONOTONIC
3918781e08Smrg#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6
4018781e08Smrg#endif
4118781e08Smrg
42de2362d3Smrgtypedef struct {
43de2362d3Smrg  int fd;
44de2362d3Smrg  unsigned fb_id;
45de2362d3Smrg  drmModeFBPtr mode_fb;
46de2362d3Smrg  int cpp;
47de2362d3Smrg  struct radeon_bo_manager *bufmgr;
48de2362d3Smrg  ScrnInfoPtr scrn;
49de2362d3Smrg#ifdef HAVE_LIBUDEV
50de2362d3Smrg  struct udev_monitor *uevent_monitor;
51de2362d3Smrg  InputHandlerProc uevent_handler;
52de2362d3Smrg#endif
53de2362d3Smrg  drmEventContext event_context;
5418781e08Smrg  int count_crtcs;
5518781e08Smrg
5618781e08Smrg  Bool delete_dp_12_displays;
5718781e08Smrg
5818781e08Smrg  Bool dri2_flipping;
5918781e08Smrg  Bool present_flipping;
60de2362d3Smrg} drmmode_rec, *drmmode_ptr;
61de2362d3Smrg
62de2362d3Smrgtypedef struct {
63de2362d3Smrg  unsigned old_fb_id;
64de2362d3Smrg  int flip_count;
65de2362d3Smrg  void *event_data;
66de2362d3Smrg  unsigned int fe_frame;
6718781e08Smrg  uint64_t fe_usec;
6818781e08Smrg  xf86CrtcPtr fe_crtc;
6918781e08Smrg  radeon_drm_handler_proc handler;
7018781e08Smrg  radeon_drm_abort_proc abort;
71de2362d3Smrg} drmmode_flipdata_rec, *drmmode_flipdata_ptr;
72de2362d3Smrg
7318781e08Smrgstruct drmmode_scanout {
7418781e08Smrg    struct radeon_bo *bo;
7518781e08Smrg    PixmapPtr pixmap;
7618781e08Smrg    unsigned fb_id;
7718781e08Smrg    int width, height;
7818781e08Smrg};
79de2362d3Smrg
80de2362d3Smrgtypedef struct {
81de2362d3Smrg    drmmode_ptr drmmode;
82de2362d3Smrg    drmModeCrtcPtr mode_crtc;
83de2362d3Smrg    int hw_id;
84de2362d3Smrg    struct radeon_bo *cursor_bo;
8518781e08Smrg    struct drmmode_scanout rotate;
8618781e08Smrg    struct drmmode_scanout scanout[2];
8718781e08Smrg    struct drmmode_scanout scanout_destroy[2];
8818781e08Smrg    DamagePtr scanout_damage;
8918781e08Smrg    RegionRec scanout_last_region;
9018781e08Smrg    unsigned scanout_id;
9118781e08Smrg    Bool scanout_update_pending;
923ed65abbSmrg    Bool tear_free;
93de2362d3Smrg    int dpms_mode;
9418781e08Smrg    /* For when a flip is pending when DPMS off requested */
9518781e08Smrg    int pending_dpms_mode;
9618781e08Smrg    CARD64 dpms_last_ust;
9718781e08Smrg    uint32_t dpms_last_seq;
9818781e08Smrg    int dpms_last_fps;
9918781e08Smrg    uint32_t interpolated_vblanks;
10018781e08Smrg
10118781e08Smrg    /* Modeset needed (for DPMS on or after a page flip crossing with a
10218781e08Smrg     * modeset)
10318781e08Smrg     */
10418781e08Smrg    Bool need_modeset;
10518781e08Smrg    /* A flip is pending for this CRTC */
10618781e08Smrg    Bool flip_pending;
107de2362d3Smrg} drmmode_crtc_private_rec, *drmmode_crtc_private_ptr;
108de2362d3Smrg
109de2362d3Smrgtypedef struct {
110de2362d3Smrg    drmModePropertyPtr mode_prop;
111de2362d3Smrg    uint64_t value;
112de2362d3Smrg    int num_atoms; /* if range prop, num_atoms == 1; if enum prop, num_atoms == num_enums + 1 */
113de2362d3Smrg    Atom *atoms;
114de2362d3Smrg} drmmode_prop_rec, *drmmode_prop_ptr;
115de2362d3Smrg
116de2362d3Smrg
117de2362d3Smrgtypedef struct {
118de2362d3Smrg    drmmode_ptr drmmode;
119de2362d3Smrg    int output_id;
120de2362d3Smrg    drmModeConnectorPtr mode_output;
121de2362d3Smrg    drmModeEncoderPtr *mode_encoders;
122de2362d3Smrg    drmModePropertyBlobPtr edid_blob;
123de2362d3Smrg    int dpms_enum_id;
124de2362d3Smrg    int num_props;
125de2362d3Smrg    drmmode_prop_ptr props;
126de2362d3Smrg    int enc_mask;
127de2362d3Smrg    int enc_clone_mask;
1283ed65abbSmrg    int tear_free;
129de2362d3Smrg} drmmode_output_private_rec, *drmmode_output_private_ptr;
130de2362d3Smrg
131de2362d3Smrg
13218781e08Smrgenum drmmode_flip_sync {
13318781e08Smrg    FLIP_VSYNC,
13418781e08Smrg    FLIP_ASYNC,
13518781e08Smrg};
13618781e08Smrg
13718781e08Smrg
1383ed65abbSmrgextern int drmmode_page_flip_target_absolute(RADEONEntPtr pRADEONEnt,
1393ed65abbSmrg					     drmmode_crtc_private_ptr drmmode_crtc,
1403ed65abbSmrg					     int fb_id, uint32_t flags,
1413ed65abbSmrg					     uintptr_t drm_queue_seq,
1423ed65abbSmrg					     uint32_t target_msc);
1433ed65abbSmrgextern int drmmode_page_flip_target_relative(RADEONEntPtr pRADEONEnt,
1443ed65abbSmrg					     drmmode_crtc_private_ptr drmmode_crtc,
1453ed65abbSmrg					     int fb_id, uint32_t flags,
1463ed65abbSmrg					     uintptr_t drm_queue_seq,
1473ed65abbSmrg					     uint32_t target_msc);
148de2362d3Smrgextern Bool drmmode_pre_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int cpp);
149de2362d3Smrgextern void drmmode_init(ScrnInfoPtr pScrn, drmmode_ptr drmmode);
15018781e08Smrgextern void drmmode_fini(ScrnInfoPtr pScrn, drmmode_ptr drmmode);
151de2362d3Smrgextern Bool drmmode_set_bufmgr(ScrnInfoPtr pScrn, drmmode_ptr drmmode, struct radeon_bo_manager *bufmgr);
152de2362d3Smrgextern void drmmode_set_cursor(ScrnInfoPtr scrn, drmmode_ptr drmmode, int id, struct radeon_bo *bo);
153de2362d3Smrgvoid drmmode_adjust_frame(ScrnInfoPtr pScrn, drmmode_ptr drmmode, int x, int y);
15418781e08Smrgextern Bool drmmode_set_desired_modes(ScrnInfoPtr pScrn, drmmode_ptr drmmode,
15518781e08Smrg				      Bool set_hw);
156de2362d3Smrgextern void drmmode_copy_fb(ScrnInfoPtr pScrn, drmmode_ptr drmmode);
157de2362d3Smrgextern Bool drmmode_setup_colormap(ScreenPtr pScreen, ScrnInfoPtr pScrn);
158de2362d3Smrg
15918781e08Smrgextern void drmmode_scanout_free(ScrnInfoPtr scrn);
16018781e08Smrg
161de2362d3Smrgextern void drmmode_uevent_init(ScrnInfoPtr scrn, drmmode_ptr drmmode);
162de2362d3Smrgextern void drmmode_uevent_fini(ScrnInfoPtr scrn, drmmode_ptr drmmode);
163de2362d3Smrg
16418781e08Smrgextern int drmmode_get_crtc_id(xf86CrtcPtr crtc);
165de2362d3Smrgextern int drmmode_get_height_align(ScrnInfoPtr scrn, uint32_t tiling);
166de2362d3Smrgextern int drmmode_get_pitch_align(ScrnInfoPtr scrn, int bpe, uint32_t tiling);
167de2362d3Smrgextern int drmmode_get_base_align(ScrnInfoPtr scrn, int bpe, uint32_t tiling);
16818781e08Smrgextern void drmmode_clear_pending_flip(xf86CrtcPtr crtc);
169de2362d3Smrg
17018781e08SmrgBool radeon_do_pageflip(ScrnInfoPtr scrn, ClientPtr client,
17118781e08Smrg			uint32_t new_front_handle, uint64_t id, void *data,
17218781e08Smrg			int ref_crtc_hw_id, radeon_drm_handler_proc handler,
17318781e08Smrg			radeon_drm_abort_proc abort,
1743ed65abbSmrg			enum drmmode_flip_sync flip_sync,
1753ed65abbSmrg			uint32_t target_msc);
17618781e08Smrgint drmmode_crtc_get_ust_msc(xf86CrtcPtr crtc, CARD64 *ust, CARD64 *msc);
17718781e08Smrgint drmmode_get_current_ust(int drm_fd, CARD64 *ust);
178de2362d3Smrg
179de2362d3Smrg#endif
180de2362d3Smrg
181