1/*
2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23/**
24
25Module Name:
26
27    hwserv_drv.c
28
29Abstract:
30
31		Functions defined in the Command Decoder Specification document
32
33Revision History:
34
35	NEG:27.09.2002	Initiated.
36--*/
37#ifdef HAVE_CONFIG_H
38#include "config.h"
39#endif
40
41#include <X11/Xos.h>
42#include "xorg-server.h"
43
44#include "Decoder.h"
45
46//trace settings
47#if DEBUG_OUTPUT_DEVICE & 1
48	#define TRACE_USING_STDERR          //define it to use stderr as trace output,
49#endif
50#if DEBUG_OUTPUT_DEVICE & 2
51	#define TRACE_USING_RS232
52#endif
53#if DEBUG_OUTPUT_DEVICE & 4
54	#define TRACE_USING_LPT
55#endif
56
57
58#if DEBUG_PARSER == 4
59	#define IO_TRACE					//IO access trace switch, undefine it to turn off
60	#define PCI_TRACE					//PCI access trace switch, undefine it to turn off
61	#define MEM_TRACE					//MEM access trace switch, undefine it to turn off
62#endif
63
64UINT32 CailReadATIRegister(VOID*,UINT32);
65VOID   CailWriteATIRegister(VOID*,UINT32,UINT32);
66VOID*  CailAllocateMemory(VOID*,UINT16);
67VOID   CailReleaseMemory(VOID *,VOID *);
68VOID   CailDelayMicroSeconds(VOID *,UINT32 );
69VOID   CailReadPCIConfigData(VOID*,VOID*,UINT32,UINT16);
70VOID   CailWritePCIConfigData(VOID*,VOID*,UINT32,UINT16);
71UINT32 CailReadFBData(VOID*,UINT32);
72VOID   CailWriteFBData(VOID*,UINT32,UINT32);
73ULONG  CailReadPLL(VOID *Context ,ULONG Address);
74VOID   CailWritePLL(VOID *Context,ULONG Address,ULONG Data);
75ULONG  CailReadMC(VOID *Context ,ULONG Address);
76VOID   CailWriteMC(VOID *Context ,ULONG Address,ULONG Data);
77
78
79#if DEBUG_PARSER>0
80VOID   CailVideoDebugPrint(VOID*,ULONG_PTR, UINT16);
81#endif
82// Delay function
83#if ( defined ENABLE_PARSER_DELAY || defined ENABLE_ALL_SERVICE_FUNCTIONS )
84
85VOID	DelayMilliseconds(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
86{
87	    CailDelayMicroSeconds(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->SourceData32*1000);
88}
89
90VOID	DelayMicroseconds(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
91{
92	    CailDelayMicroSeconds(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->SourceData32);
93}
94#endif
95
96VOID	PostCharOutput(PARSER_TEMP_DATA STACK_BASED * pParserTempData)
97{
98}
99
100VOID	CallerDebugFunc(PARSER_TEMP_DATA STACK_BASED * pParserTempData)
101{
102}
103
104
105// PCI READ Access
106
107#if ( defined ENABLE_PARSER_PCIREAD8 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
108UINT8   ReadPCIReg8(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
109{
110    UINT8 rvl;
111    CailReadPCIConfigData(pWorkingTableData->pDeviceData->CAIL,&rvl,pWorkingTableData->Index,sizeof(UINT8));
112	return rvl;
113}
114#endif
115
116
117#if ( defined ENABLE_PARSER_PCIREAD16 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
118UINT16	ReadPCIReg16(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
119{
120
121    UINT16 rvl;
122    CailReadPCIConfigData(pWorkingTableData->pDeviceData->CAIL,&rvl,pWorkingTableData->Index,sizeof(UINT16));
123    return rvl;
124
125}
126#endif
127
128
129
130#if ( defined ENABLE_PARSER_PCIREAD32 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
131UINT32  ReadPCIReg32   (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
132{
133
134    UINT32 rvl;
135    CailReadPCIConfigData(pWorkingTableData->pDeviceData->CAIL,&rvl,pWorkingTableData->Index,sizeof(UINT32));
136    return rvl;
137}
138#endif
139
140
141// PCI WRITE Access
142
143#if ( defined ENABLE_PARSER_PCIWRITE8 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
144VOID	WritePCIReg8	(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
145{
146
147    CailWritePCIConfigData(pWorkingTableData->pDeviceData->CAIL,&(pWorkingTableData->DestData32),pWorkingTableData->Index,sizeof(UINT8));
148
149}
150
151#endif
152
153
154#if ( defined ENABLE_PARSER_PCIWRITE16 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
155VOID    WritePCIReg16  (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
156{
157
158        CailWritePCIConfigData(pWorkingTableData->pDeviceData->CAIL,&(pWorkingTableData->DestData32),pWorkingTableData->Index,sizeof(UINT16));
159}
160
161#endif
162
163
164#if ( defined ENABLE_PARSER_PCIWRITE32 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
165VOID    WritePCIReg32  (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
166{
167    CailWritePCIConfigData(pWorkingTableData->pDeviceData->CAIL,&(pWorkingTableData->DestData32),pWorkingTableData->Index,sizeof(UINT32));
168}
169#endif
170
171
172
173
174// System IO Access
175#if ( defined ENABLE_PARSER_SYS_IOREAD8 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
176UINT8   ReadSysIOReg8    (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
177{
178    UINT8 rvl;
179    rvl=0;
180    //rvl= (UINT8) ReadGenericPciCfg(dev,reg,sizeof(UINT8));
181	return rvl;
182}
183#endif
184
185
186#if ( defined ENABLE_PARSER_SYS_IOREAD16 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
187UINT16	ReadSysIOReg16(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
188{
189
190    UINT16 rvl;
191    rvl=0;
192    //rvl= (UINT16) ReadGenericPciCfg(dev,reg,sizeof(UINT16));
193    return rvl;
194
195}
196#endif
197
198
199
200#if ( defined ENABLE_PARSER_SYS_IOREAD32 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
201UINT32  ReadSysIOReg32   (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
202{
203
204    UINT32 rvl;
205    rvl=0;
206    //rvl= (UINT32) ReadGenericPciCfg(dev,reg,sizeof(UINT32));
207    return rvl;
208}
209#endif
210
211
212// PCI WRITE Access
213
214#if ( defined ENABLE_PARSER_SYS_IOWRITE8 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
215VOID	WriteSysIOReg8	(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
216{
217
218    //WriteGenericPciCfg(dev,reg,sizeof(UINT8),(UINT32)value);
219}
220
221#endif
222
223
224#if ( defined ENABLE_PARSER_SYS_IOWRITE16 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
225VOID    WriteSysIOReg16  (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
226{
227
228    //WriteGenericPciCfg(dev,reg,sizeof(UINT16),(UINT32)value);
229}
230
231#endif
232
233
234#if ( defined ENABLE_PARSER_SYS_IOWRITE32 || defined ENABLE_ALL_SERVICE_FUNCTIONS )
235VOID    WriteSysIOReg32  (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
236{
237    //WriteGenericPciCfg(dev,reg,sizeof(UINT32),(UINT32)value);
238}
239#endif
240
241// ATI Registers Memory Mapped Access
242
243#if ( defined ENABLE_PARSER_REGISTERS_MEMORY_ACCESS || defined ENABLE_ALL_SERVICE_FUNCTIONS)
244
245UINT32	ReadReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
246{
247    return CailReadATIRegister(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index);
248}
249
250VOID	WriteReg32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
251{
252    CailWriteATIRegister(pWorkingTableData->pDeviceData->CAIL,(UINT16)pWorkingTableData->Index,pWorkingTableData->DestData32 );
253}
254
255
256VOID	ReadIndReg32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
257{
258    pWorkingTableData->IndirectData = CailReadATIRegister(pWorkingTableData->pDeviceData->CAIL,UINT16LE_TO_CPU(*(UINT16*)(pWorkingTableData->IndirectIOTablePointer+1)));
259}
260
261VOID	WriteIndReg32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
262{
263    CailWriteATIRegister(pWorkingTableData->pDeviceData->CAIL,UINT16LE_TO_CPU(*(UINT16*)(pWorkingTableData->IndirectIOTablePointer+1)),pWorkingTableData->IndirectData);
264}
265
266#endif
267
268// ATI Registers IO Mapped Access
269
270#if ( defined ENABLE_PARSER_REGISTERS_IO_ACCESS || defined ENABLE_ALL_SERVICE_FUNCTIONS )
271UINT32	ReadRegIO (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
272{
273    //return CailReadATIRegister(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index);
274    return 0;
275}
276VOID	WriteRegIO(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
277{
278      //  return CailWriteATIRegister(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index,pWorkingTableData->DestData32 );
279}
280#endif
281
282// access to Frame buffer, dummy function, need more information to implement it
283UINT32	ReadFrameBuffer32 (PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
284{
285
286    return CailReadFBData(pWorkingTableData->pDeviceData->CAIL, (pWorkingTableData->Index <<2 ));
287
288}
289
290VOID	WriteFrameBuffer32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
291{
292    CailWriteFBData(pWorkingTableData->pDeviceData->CAIL,(pWorkingTableData->Index <<2), pWorkingTableData->DestData32);
293
294}
295
296
297VOID *AllocateMemory(DEVICE_DATA *pDeviceData , UINT16 MemSize)
298{
299    if(MemSize)
300        return(CailAllocateMemory(pDeviceData->CAIL,MemSize));
301    else
302        return NULL;
303}
304
305
306VOID ReleaseMemory(DEVICE_DATA *pDeviceData , WORKING_TABLE_DATA* pWorkingTableData)
307{
308    if( pWorkingTableData)
309        CailReleaseMemory(pDeviceData->CAIL, pWorkingTableData);
310}
311
312
313UINT32	ReadMC32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
314{
315    UINT32 ReadData;
316    ReadData=(UINT32)CailReadMC(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index);
317    return ReadData;
318}
319
320VOID	WriteMC32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
321{
322    CailWriteMC(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index,pWorkingTableData->DestData32);
323}
324
325UINT32	ReadPLL32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
326{
327    UINT32 ReadData;
328    ReadData=(UINT32)CailReadPLL(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index);
329    return ReadData;
330
331}
332
333VOID	WritePLL32(PARSER_TEMP_DATA STACK_BASED * pWorkingTableData)
334{
335    CailWritePLL(pWorkingTableData->pDeviceData->CAIL,pWorkingTableData->Index,pWorkingTableData->DestData32);
336
337}
338
339
340
341#if DEBUG_PARSER>0
342VOID CD_print_string	(DEVICE_DATA *pDeviceData, UINT8 *str)
343{
344    CailVideoDebugPrint( pDeviceData->CAIL, (ULONG_PTR) str, PARSER_STRINGS);
345}
346
347VOID CD_print_value	(DEVICE_DATA *pDeviceData, ULONG_PTR value, UINT16 value_type )
348{
349    CailVideoDebugPrint( pDeviceData->CAIL, (ULONG_PTR)value, value_type);
350}
351
352#endif
353
354// EOF
355