1 2 3 4 5 6 7/* Definitions for the Chips and Technology BitBLT engine communication. */ 8/* registers */ 9/* Do not read 87D0 while BitBLT is active */ 10/* 83D0: 11-0 source offset, width of 'screen' */ 11/* 15-12 reserved (0) */ 12/* 27-16 destination offset, width of screen */ 13/* 31-28 reserved (0) */ 14/* 87D0: 20-0 pattern (aligned 8 pixel x 8 line) pointer */ 15/* 31-21 reserved (0) */ 16/* 8BD0: 15-0 background colour */ 17/* 31-6 duplicate of 15-0 */ 18/* 8FD0: 15-0 foregroud/solid colour */ 19/* 31-6 duplicate of 15-0 */ 20/* 93D0: 7-0 ROP, same as MS-Windows */ 21/* 8 BitBLT Y direction, if 0 bottom to top, 1 top to bottom */ 22/* 9 BitBLT X direction, if 0 right to left, 1 left to right */ 23/* 10 source data, if 0 source is selected bit 14, 1 foregourd colour */ 24/* 11 source depth, if 0 source is colour, */ 25/* 1 source is monochrome(Font expansion) */ 26/* 12 pattern depth, if 0 colour, else monochrome */ 27/* 13 background, if 0 opaque (8BD0), else transparent */ 28/* 14 BitBLT source, if 0 screen, else system memory */ 29/* 15 reserved (0, destination?) */ 30/* 18-16 starting row of 8x8 pattern */ 31/* 19 if 1 solid pattern (Brush), else bitmap */ 32/* 20(R) BitBLT status, if 1 active */ 33/* 23-21 reserved (0) */ 34/* 27-24 vacancy in buffer */ 35/* 31-25 reserved (0) */ 36/* 97D0: 20-0 source address (byte aligned) */ 37/* 31-21 reserved (0) */ 38/* 9BD0: 20-0 destination address (byte aligned) */ 39/* 31-21 reserved (0) */ 40/* 9FD0: 11-0 number of bytes to be transferred per line */ 41/* 15-12 reserved (0) */ 42/* 27-16 height in lines of the block to be transferred */ 43/* 31-28 reserved (0) */ 44 45/* BitBLT modes for register 93D0. */ 46 47#define ctPATCOPY 0xF0 48#define ctTOP2BOTTOM 0x100 49#define ctBOTTOM2TOP 0x000 50#define ctLEFT2RIGHT 0x200 51#define ctRIGHT2LEFT 0x000 52#define ctSRCFG 0x400 53#define ctSRCMONO 0x800 54#define ctPATMONO 0x1000 55#define ctBGTRANSPARENT 0x2000 56#define ctSRCSYSTEM 0x4000 57#define ctPATSOLID 0x80000L 58#define ctPATSTART0 0x00000L 59#define ctPATSTART1 0x10000L 60#define ctPATSTART2 0x20000L 61#define ctPATSTART3 0x30000L 62#define ctPATSTART4 0x40000L 63#define ctPATSTART5 0x50000L 64#define ctPATSTART6 0x60000L 65#define ctPATSTART7 0x70000L 66 67/* Macros to do useful things with the C&T BitBLT engine */ 68 69#define ctBLTWAIT \ 70 {HW_DEBUG(0x4+2); while(inw(cPtr->PIOBase+DR(0x4)+2)&0x10){};} 71 72#define ctSETROP(op) \ 73 {HW_DEBUG(0x4); outl(cPtr->PIOBase+DR(0x4),(op));} 74 75#define ctSETSRCADDR(srcAddr) \ 76 {HW_DEBUG(0x5); outl(cPtr->PIOBase+DR(0x5),((srcAddr)&0x1FFFFFL));} 77 78#define ctSETDSTADDR(dstAddr) \ 79 {HW_DEBUG(0x6); outl(cPtr->PIOBase+DR(0x6),((dstAddr)&0x1FFFFFL));} 80 81#define ctSETPITCH(srcPitch,dstPitch) \ 82 {HW_DEBUG(0x0); outl(cPtr->PIOBase+DR(0x0),(((dstPitch)<<16)|(srcPitch)));} 83 84/* Note that this command signal a blit to commence */ 85#define ctSETHEIGHTWIDTHGO(Height,Width)\ 86 {HW_DEBUG(0x7); outl(cPtr->PIOBase+DR(0x7),(((Height)<<16)|(Width)));} 87 88#define ctSETPATSRCADDR(srcAddr)\ 89 {HW_DEBUG(0x1); outl(cPtr->PIOBase+DR(0x1),((srcAddr)&0x1FFFFFL));} 90 91/* I can't help pointing out at this point that I'm not complaining 92 * about the american spelling of Colour!! [DGB] */ 93 94#define ctSETBGCOLOR8(c) {\ 95 HW_DEBUG(0x2); \ 96 if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \ 97 cAcl->bgColor = (c); \ 98 outl(cPtr->PIOBase+DR(0x2),((((((c)&0xFF)<<8)|((c)&0xFF))<<16) | \ 99 ((((c)&0xFF)<<8)|((c)&0xFF)))); \ 100 } \ 101} 102 103#define ctSETBGCOLOR16(c) {\ 104 HW_DEBUG(0x2); \ 105 if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \ 106 cAcl->bgColor = (c); \ 107 outl(cPtr->PIOBase+DR(0x2),((((c)&0xFFFF)<<16)|((c)&0xFFFF))); \ 108 } \ 109} 110 111/* As the 6554x doesn't support 24bpp colour expansion this doesn't work */ 112#define ctSETBGCOLOR24(c) {\ 113 HW_DEBUG(0x2); \ 114 if ((cAcl->bgColor != (c)) || (cAcl->bgColor == -1)) { \ 115 cAcl->bgColor = (c); \ 116 outl(cPtr->PIOBase+DR(0x2),(c)&0xFFFFFF); \ 117 } \ 118} 119 120#define ctSETFGCOLOR8(c) {\ 121 HW_DEBUG(0x3); \ 122 if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \ 123 cAcl->fgColor = (c); \ 124 outl(cPtr->PIOBase+DR(0x3),((((((c)&0xFF)<<8)|((c)&0xFF))<<16) | \ 125 ((((c)&0xFF)<<8)|((c)&0xFF)))); \ 126 } \ 127} 128 129#define ctSETFGCOLOR16(c) {\ 130 HW_DEBUG(0x3); \ 131 if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \ 132 cAcl->fgColor = (c); \ 133 outl(cPtr->PIOBase+DR(0x3),((((c)&0xFFFF)<<16)|((c)&0xFFFF))); \ 134 } \ 135} 136 137/* As the 6554x doesn't support 24bpp colour expansion this doesn't work */ 138#define ctSETFGCOLOR24(c) {\ 139 HW_DEBUG(0x3); \ 140 if ((cAcl->fgColor != (c)) || (cAcl->fgColor == -1)) { \ 141 cAcl->fgColor = (c); \ 142 outl(cPtr->PIOBase+DR(0x3),(c)&0xFFFFFF); \ 143 } \ 144} 145 146/* Define a Macro to replicate a planemask 64 times and write to address 147 * allocated for planemask pattern */ 148#define ctWRITEPLANEMASK8(mask,addr) { \ 149 if (cAcl->planemask != (mask&0xFF)) { \ 150 cAcl->planemask = (mask&0xFF); \ 151 memset((unsigned char *)cPtr->FbBase + addr, (mask&0xFF), 64); \ 152 } \ 153} 154 155#define ctWRITEPLANEMASK16(mask,addr) { \ 156 if (cAcl->planemask != (mask&0xFFFF)) { \ 157 cAcl->planemask = (mask&0xFFFF); \ 158 { int i; \ 159 for (i = 0; i < 64; i++) { \ 160 memcpy((unsigned char *)cPtr->FbBase + addr \ 161 + i * 2, &mask, 2); \ 162 } \ 163 } \ 164 } \ 165} 166 167