ct_bank.c revision c06b6b69
1c06b6b69Smrg/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/chips/ct_bank.c,v 1.6 2002/01/25 21:55:58 tsi Exp $ */
2c06b6b69Smrg
3c06b6b69Smrg/*
4c06b6b69Smrg * Copyright 1997
5c06b6b69Smrg * Digital Equipment Corporation. All rights reserved.
6c06b6b69Smrg * This software is furnished under license and may be used and copied only in
7c06b6b69Smrg * accordance with the following terms and conditions.  Subject to these
8c06b6b69Smrg * conditions, you may download, copy, install, use, modify and distribute
9c06b6b69Smrg * this software in source and/or binary form. No title or ownership is
10c06b6b69Smrg * transferred hereby.
11c06b6b69Smrg * 1) Any source code used, modified or distributed must reproduce and retain
12c06b6b69Smrg *    this copyright notice and list of conditions as they appear in the
13c06b6b69Smrg *    source file.
14c06b6b69Smrg *
15c06b6b69Smrg * 2) No right is granted to use any trade name, trademark, or logo of Digital
16c06b6b69Smrg *    Equipment Corporation. Neither the "Digital Equipment Corporation" name
17c06b6b69Smrg *    nor any trademark or logo of Digital Equipment Corporation may be used
18c06b6b69Smrg *    to endorse or promote products derived from this software without the
19c06b6b69Smrg *    prior written permission of Digital Equipment Corporation.
20c06b6b69Smrg *
21c06b6b69Smrg * 3) This software is provided "AS-IS" and any express or implied warranties,
22c06b6b69Smrg *    including but not limited to, any implied warranties of merchantability,
23c06b6b69Smrg *    fitness for a particular purpose, or non-infringement are disclaimed. In
24c06b6b69Smrg *    no event shall DIGITAL be liable for any damages whatsoever, and in
25c06b6b69Smrg *    particular, DIGITAL shall not be liable for special, indirect,
26c06b6b69Smrg *    consequential, or incidental damages or damages for lost profits, loss
27c06b6b69Smrg *    of revenue or loss of use, whether such damages arise in contract,
28c06b6b69Smrg *    negligence, tort, under statute, in equity, at law or otherwise, even if
29c06b6b69Smrg *    advised of the possibility of such damage.
30c06b6b69Smrg */
31c06b6b69Smrg
32c06b6b69Smrg#ifdef HAVE_CONFIG_H
33c06b6b69Smrg#include "config.h"
34c06b6b69Smrg#endif
35c06b6b69Smrg
36c06b6b69Smrg#define PSZ 8
37c06b6b69Smrg
38c06b6b69Smrg/*
39c06b6b69Smrg * Define DIRECT_REGISTER_ACCESS if you want to bypass the wrapped register
40c06b6b69Smrg * access functions
41c06b6b69Smrg */
42c06b6b69Smrg/* #define DIRECT_REGISTER_ACCESS */
43c06b6b69Smrg
44c06b6b69Smrg/* All drivers should typically include these */
45c06b6b69Smrg#include "xf86.h"
46c06b6b69Smrg#include "xf86_OSproc.h"
47c06b6b69Smrg
48c06b6b69Smrg/* Everything using inb/outb, etc needs "compiler.h" */
49c06b6b69Smrg#include "compiler.h"
50c06b6b69Smrg
51c06b6b69Smrg/* Drivers for PCI hardware need this */
52c06b6b69Smrg#include "xf86PciInfo.h"
53c06b6b69Smrg
54c06b6b69Smrg/* Drivers that need to access the PCI config space directly need this */
55c06b6b69Smrg#include "xf86Pci.h"
56c06b6b69Smrg
57c06b6b69Smrg/* Driver specific headers */
58c06b6b69Smrg#include "ct_driver.h"
59c06b6b69Smrg
60c06b6b69Smrg#if defined(__arm32__) && defined(__NetBSD__)
61c06b6b69Smrg#include <machine/sysarch.h>
62c06b6b69Smrg#define	arm32_drain_writebuf()	sysarch(1, 0)
63c06b6b69Smrg#elif defined(__arm32__)
64c06b6b69Smrg#define arm32_drain_writebuf()
65c06b6b69Smrg#endif
66c06b6b69Smrg
67c06b6b69Smrg#define ChipsBank(pScreen) CHIPSPTR(xf86Screens[pScreen->myNum])->Bank
68c06b6b69Smrg
69c06b6b69Smrg#ifdef DIRECT_REGISTER_ACCESS
70c06b6b69Smrgint
71c06b6b69SmrgCHIPSSetRead(ScreenPtr pScreen, int bank)
72c06b6b69Smrg{
73c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
74c06b6b69Smrg
75c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x10));
76c06b6b69Smrg
77c06b6b69Smrg#ifdef	__arm32__
78c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
79c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
80c06b6b69Smrg	arm32_drain_writebuf();
81c06b6b69Smrg	ChipsBank(pScreen) = bank;
82c06b6b69Smrg    }
83c06b6b69Smrg#endif
84c06b6b69Smrg
85c06b6b69Smrg    return 0;
86c06b6b69Smrg}
87c06b6b69Smrg
88c06b6b69Smrg
89c06b6b69Smrgint
90c06b6b69SmrgCHIPSSetWrite(ScreenPtr pScreen, int bank)
91c06b6b69Smrg{
92c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
93c06b6b69Smrg
94c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x11));
95c06b6b69Smrg
96c06b6b69Smrg#ifdef	__arm32__
97c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
98c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
99c06b6b69Smrg	arm32_drain_writebuf();
100c06b6b69Smrg	ChipsBank(pScreen) = bank;
101c06b6b69Smrg    }
102c06b6b69Smrg#endif
103c06b6b69Smrg
104c06b6b69Smrg    return 0;
105c06b6b69Smrg}
106c06b6b69Smrg
107c06b6b69Smrg
108c06b6b69Smrgint
109c06b6b69SmrgCHIPSSetReadWrite(ScreenPtr pScreen, int bank)
110c06b6b69Smrg{
111c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
112c06b6b69Smrg
113c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x10));
114c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x11));
115c06b6b69Smrg
116c06b6b69Smrg#ifdef	__arm32__
117c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
118c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
119c06b6b69Smrg	arm32_drain_writebuf();
120c06b6b69Smrg	ChipsBank(pScreen) = bank;
121c06b6b69Smrg    }
122c06b6b69Smrg#endif
123c06b6b69Smrg
124c06b6b69Smrg    return 0;
125c06b6b69Smrg}
126c06b6b69Smrg
127c06b6b69Smrgint
128c06b6b69SmrgCHIPSSetReadPlanar(ScreenPtr pScreen, int bank)
129c06b6b69Smrg{
130c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
131c06b6b69Smrg
132c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x10));
133c06b6b69Smrg
134c06b6b69Smrg#ifdef	__arm32__
135c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
136c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
137c06b6b69Smrg	arm32_drain_writebuf();
138c06b6b69Smrg	ChipsBank(pScreen) = bank;
139c06b6b69Smrg    }
140c06b6b69Smrg#endif
141c06b6b69Smrg
142c06b6b69Smrg    return 0;
143c06b6b69Smrg}
144c06b6b69Smrg
145c06b6b69Smrgint
146c06b6b69SmrgCHIPSSetWritePlanar(ScreenPtr pScreen, int bank)
147c06b6b69Smrg{
148c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
149c06b6b69Smrg
150c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x11));
151c06b6b69Smrg
152c06b6b69Smrg#ifdef	__arm32__
153c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
154c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
155c06b6b69Smrg	arm32_drain_writebuf();
156c06b6b69Smrg	ChipsBank(pScreen) = bank;
157c06b6b69Smrg    }
158c06b6b69Smrg#endif
159c06b6b69Smrg
160c06b6b69Smrg    return 0;
161c06b6b69Smrg}
162c06b6b69Smrg
163c06b6b69Smrgint
164c06b6b69SmrgCHIPSSetReadWritePlanar(ScreenPtr pScreen, int bank)
165c06b6b69Smrg{
166c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
167c06b6b69Smrg
168c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x10));
169c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x11));
170c06b6b69Smrg
171c06b6b69Smrg#ifdef	__arm32__
172c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
173c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
174c06b6b69Smrg	arm32_drain_writebuf();
175c06b6b69Smrg	ChipsBank(pScreen) = bank;
176c06b6b69Smrg    }
177c06b6b69Smrg#endif
178c06b6b69Smrg
179c06b6b69Smrg    return 0;
180c06b6b69Smrg}
181c06b6b69Smrg
182c06b6b69Smrgint
183c06b6b69SmrgCHIPSWINSetRead(ScreenPtr pScreen, int bank)
184c06b6b69Smrg{
185c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
186c06b6b69Smrg    register unsigned char tmp;
187c06b6b69Smrg
188c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x10));
189c06b6b69Smrg    outb(cPtr->PIOBase + 0x3D6, 0x0C);
190c06b6b69Smrg    tmp = inb(cPtr->PIOBase + 0x3D7) & 0xEF;
191c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, (((((bank >> 1) & 0x10) | tmp) << 8) | 0x0C));
192c06b6b69Smrg
193c06b6b69Smrg#ifdef	__arm32__
194c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
195c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
196c06b6b69Smrg	arm32_drain_writebuf();
197c06b6b69Smrg	ChipsBank(pScreen) = bank;
198c06b6b69Smrg    }
199c06b6b69Smrg#endif
200c06b6b69Smrg
201c06b6b69Smrg    return 0;
202c06b6b69Smrg}
203c06b6b69Smrg
204c06b6b69Smrg
205c06b6b69Smrgint
206c06b6b69SmrgCHIPSWINSetWrite(ScreenPtr pScreen, int bank)
207c06b6b69Smrg{
208c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
209c06b6b69Smrg    register unsigned char tmp;
210c06b6b69Smrg
211c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x11));
212c06b6b69Smrg    outb(cPtr->PIOBase + 0x3D6, 0x0C);
213c06b6b69Smrg    tmp = inb(cPtr->PIOBase + 0x3D7) & 0xBF;
214c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, (((((bank << 1) & 0x40) | tmp) << 8) | 0x0C));
215c06b6b69Smrg
216c06b6b69Smrg#ifdef	__arm32__
217c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
218c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
219c06b6b69Smrg	arm32_drain_writebuf();
220c06b6b69Smrg	ChipsBank(pScreen) = bank;
221c06b6b69Smrg    }
222c06b6b69Smrg#endif
223c06b6b69Smrg
224c06b6b69Smrg    return 0;
225c06b6b69Smrg}
226c06b6b69Smrg
227c06b6b69Smrgint
228c06b6b69SmrgCHIPSWINSetReadWrite(ScreenPtr pScreen, int bank)
229c06b6b69Smrg{
230c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
231c06b6b69Smrg    register unsigned char tmp;
232c06b6b69Smrg
233c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x10));
234c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 3) & 0xFF) << 8) | 0x11));
235c06b6b69Smrg    outb(cPtr->PIOBase + 0x3D6, 0x0C);
236c06b6b69Smrg    tmp = inb(cPtr->PIOBase + 0x3D7) & 0xAF;
237c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6,
238c06b6b69Smrg	(((((bank << 1) & 0x40) | ((bank >> 1) & 0x10) | tmp) << 8) | 0x0C));
239c06b6b69Smrg
240c06b6b69Smrg#ifdef	__arm32__
241c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
242c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
243c06b6b69Smrg	arm32_drain_writebuf();
244c06b6b69Smrg	ChipsBank(pScreen) = bank;
245c06b6b69Smrg    }
246c06b6b69Smrg#endif
247c06b6b69Smrg
248c06b6b69Smrg    return 0;
249c06b6b69Smrg}
250c06b6b69Smrg
251c06b6b69Smrgint
252c06b6b69SmrgCHIPSWINSetReadPlanar(ScreenPtr pScreen, int bank)
253c06b6b69Smrg{
254c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
255c06b6b69Smrg    register unsigned char tmp;
256c06b6b69Smrg
257c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x10));
258c06b6b69Smrg    outb(cPtr->PIOBase + 0x3D6, 0x0C);
259c06b6b69Smrg    tmp = inb(cPtr->PIOBase + 0x3D7) & 0xEF;
260c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, (((((bank << 1) & 0x10) | tmp) << 8) | 0x0C));
261c06b6b69Smrg
262c06b6b69Smrg#ifdef	__arm32__
263c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
264c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
265c06b6b69Smrg	arm32_drain_writebuf();
266c06b6b69Smrg	ChipsBank(pScreen) = bank;
267c06b6b69Smrg    }
268c06b6b69Smrg#endif
269c06b6b69Smrg
270c06b6b69Smrg    return 0;
271c06b6b69Smrg}
272c06b6b69Smrg
273c06b6b69Smrgint
274c06b6b69SmrgCHIPSWINSetWritePlanar(ScreenPtr pScreen, int bank)
275c06b6b69Smrg{
276c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
277c06b6b69Smrg    register unsigned char tmp;
278c06b6b69Smrg
279c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x11));
280c06b6b69Smrg    outb(cPtr->PIOBase + 0x3D6, 0x0C);
281c06b6b69Smrg    tmp = inb(cPtr->PIOBase + 0x3D7) & 0xBF;
282c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, (((((bank << 3) & 0x40) | tmp) << 8) | 0x0C));
283c06b6b69Smrg
284c06b6b69Smrg#ifdef	__arm32__
285c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
286c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
287c06b6b69Smrg	arm32_drain_writebuf();
288c06b6b69Smrg	ChipsBank(pScreen) = bank;
289c06b6b69Smrg    }
290c06b6b69Smrg#endif
291c06b6b69Smrg
292c06b6b69Smrg    return 0;
293c06b6b69Smrg}
294c06b6b69Smrg
295c06b6b69Smrgint
296c06b6b69SmrgCHIPSWINSetReadWritePlanar(ScreenPtr pScreen, int bank)
297c06b6b69Smrg{
298c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
299c06b6b69Smrg    register unsigned char tmp;
300c06b6b69Smrg
301c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x10));
302c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 5) & 0xFF) << 8) | 0x11));
303c06b6b69Smrg    outb(cPtr->PIOBase + 0x3D6, 0x0C);
304c06b6b69Smrg    tmp = inb(cPtr->PIOBase + 0x3D7) & 0xAF;
305c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6,
306c06b6b69Smrg	(((((bank << 3) & 0x40) | ((bank << 1) & 0x10) | tmp) << 8) | 0x0C));
307c06b6b69Smrg
308c06b6b69Smrg#ifdef	__arm32__
309c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
310c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
311c06b6b69Smrg	arm32_drain_writebuf();
312c06b6b69Smrg	ChipsBank(pScreen) = bank;
313c06b6b69Smrg    }
314c06b6b69Smrg#endif
315c06b6b69Smrg
316c06b6b69Smrg    return 0;
317c06b6b69Smrg}
318c06b6b69Smrg
319c06b6b69Smrgint
320c06b6b69SmrgCHIPSHiQVSetReadWrite(ScreenPtr pScreen, int bank)
321c06b6b69Smrg{
322c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
323c06b6b69Smrg
324c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, (((bank & 0x7F) << 8) | 0x0E));
325c06b6b69Smrg
326c06b6b69Smrg#ifdef	__arm32__
327c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
328c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
329c06b6b69Smrg	arm32_drain_writebuf();
330c06b6b69Smrg	ChipsBank(pScreen) = bank;
331c06b6b69Smrg    }
332c06b6b69Smrg#endif
333c06b6b69Smrg
334c06b6b69Smrg    return 0;
335c06b6b69Smrg}
336c06b6b69Smrg
337c06b6b69Smrgint
338c06b6b69SmrgCHIPSHiQVSetReadWritePlanar(ScreenPtr pScreen, int bank)
339c06b6b69Smrg{
340c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
341c06b6b69Smrg
342c06b6b69Smrg    outw(cPtr->PIOBase + 0x3D6, ((((bank << 2) & 0x7F) << 8) | 0x0E));
343c06b6b69Smrg
344c06b6b69Smrg#ifdef	__arm32__
345c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
346c06b6b69Smrg    if (bank != ChipsBank(pScreen)) {
347c06b6b69Smrg	arm32_drain_writebuf();
348c06b6b69Smrg	ChipsBank(pScreen) = bank;
349c06b6b69Smrg    }
350c06b6b69Smrg#endif
351c06b6b69Smrg
352c06b6b69Smrg    return 0;
353c06b6b69Smrg}
354c06b6b69Smrg
355c06b6b69Smrg#else /* DIRECT_REGISTER_ACCESS */
356c06b6b69Smrg
357c06b6b69Smrgint
358c06b6b69SmrgCHIPSSetRead(ScreenPtr pScreen, int bank)
359c06b6b69Smrg{
360c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
361c06b6b69Smrg
362c06b6b69Smrg    cPtr->writeXR(cPtr, 0x10, ((bank << 3) & 0xFF));
363c06b6b69Smrg
364c06b6b69Smrg#ifdef	__arm32__
365c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
366c06b6b69Smrg    if (bank != cPtr->Bank) {
367c06b6b69Smrg	arm32_drain_writebuf();
368c06b6b69Smrg	cPtr->Bank = bank;
369c06b6b69Smrg    }
370c06b6b69Smrg#endif
371c06b6b69Smrg
372c06b6b69Smrg    return 0;
373c06b6b69Smrg}
374c06b6b69Smrg
375c06b6b69Smrg
376c06b6b69Smrgint
377c06b6b69SmrgCHIPSSetWrite(ScreenPtr pScreen, int bank)
378c06b6b69Smrg{
379c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
380c06b6b69Smrg
381c06b6b69Smrg    cPtr->writeXR(cPtr, 0x11, ((bank << 3) & 0xFF));
382c06b6b69Smrg
383c06b6b69Smrg#ifdef	__arm32__
384c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
385c06b6b69Smrg    if (bank != cPtr->Bank) {
386c06b6b69Smrg	arm32_drain_writebuf();
387c06b6b69Smrg	cPtr->Bank = bank;
388c06b6b69Smrg    }
389c06b6b69Smrg#endif
390c06b6b69Smrg
391c06b6b69Smrg    return 0;
392c06b6b69Smrg}
393c06b6b69Smrg
394c06b6b69Smrg
395c06b6b69Smrgint
396c06b6b69SmrgCHIPSSetReadWrite(ScreenPtr pScreen, int bank)
397c06b6b69Smrg{
398c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
399c06b6b69Smrg
400c06b6b69Smrg    cPtr->writeXR(cPtr, 0x10, ((bank << 3) & 0xFF));
401c06b6b69Smrg    cPtr->writeXR(cPtr, 0x11, ((bank << 3) & 0xFF));
402c06b6b69Smrg
403c06b6b69Smrg#ifdef	__arm32__
404c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
405c06b6b69Smrg    if (bank != cPtr->Bank) {
406c06b6b69Smrg	arm32_drain_writebuf();
407c06b6b69Smrg	cPtr->Bank = bank;
408c06b6b69Smrg    }
409c06b6b69Smrg#endif
410c06b6b69Smrg
411c06b6b69Smrg    return 0;
412c06b6b69Smrg}
413c06b6b69Smrg
414c06b6b69Smrgint
415c06b6b69SmrgCHIPSSetReadPlanar(ScreenPtr pScreen, int bank)
416c06b6b69Smrg{
417c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
418c06b6b69Smrg
419c06b6b69Smrg    cPtr->writeXR(cPtr, 0x10, ((bank << 5) & 0xFF));
420c06b6b69Smrg
421c06b6b69Smrg#ifdef	__arm32__
422c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
423c06b6b69Smrg    if (bank != cPtr->Bank) {
424c06b6b69Smrg	arm32_drain_writebuf();
425c06b6b69Smrg	cPtr->Bank = bank;
426c06b6b69Smrg    }
427c06b6b69Smrg#endif
428c06b6b69Smrg
429c06b6b69Smrg    return 0;
430c06b6b69Smrg}
431c06b6b69Smrg
432c06b6b69Smrgint
433c06b6b69SmrgCHIPSSetWritePlanar(ScreenPtr pScreen, int bank)
434c06b6b69Smrg{
435c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
436c06b6b69Smrg
437c06b6b69Smrg    cPtr->writeXR(cPtr, 0x11, ((bank << 5) & 0xFF));
438c06b6b69Smrg
439c06b6b69Smrg#ifdef	__arm32__
440c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
441c06b6b69Smrg    if (bank != cPtr->Bank) {
442c06b6b69Smrg	arm32_drain_writebuf();
443c06b6b69Smrg	cPtr->Bank = bank;
444c06b6b69Smrg    }
445c06b6b69Smrg#endif
446c06b6b69Smrg
447c06b6b69Smrg    return 0;
448c06b6b69Smrg}
449c06b6b69Smrg
450c06b6b69Smrgint
451c06b6b69SmrgCHIPSSetReadWritePlanar(ScreenPtr pScreen, int bank)
452c06b6b69Smrg{
453c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
454c06b6b69Smrg
455c06b6b69Smrg    cPtr->writeXR(cPtr, 0x10, ((bank << 5) & 0xFF));
456c06b6b69Smrg    cPtr->writeXR(cPtr, 0x11, ((bank << 5) & 0xFF));
457c06b6b69Smrg
458c06b6b69Smrg#ifdef	__arm32__
459c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
460c06b6b69Smrg    if (bank != cPtr->Bank) {
461c06b6b69Smrg	arm32_drain_writebuf();
462c06b6b69Smrg	cPtr->Bank = bank;
463c06b6b69Smrg    }
464c06b6b69Smrg#endif
465c06b6b69Smrg
466c06b6b69Smrg    return 0;
467c06b6b69Smrg}
468c06b6b69Smrg
469c06b6b69Smrgint
470c06b6b69SmrgCHIPSWINSetRead(ScreenPtr pScreen, int bank)
471c06b6b69Smrg{
472c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
473c06b6b69Smrg    register unsigned char tmp;
474c06b6b69Smrg
475c06b6b69Smrg    cPtr->writeXR(cPtr, 0x10, ((bank << 3) & 0xFF));
476c06b6b69Smrg    tmp = cPtr->readXR(cPtr, 0x0C) & 0xEF;
477c06b6b69Smrg    cPtr->writeXR(cPtr, 0x0C, ((bank >> 1) & 0x10) | tmp);
478c06b6b69Smrg
479c06b6b69Smrg#ifdef	__arm32__
480c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
481c06b6b69Smrg    if (bank != cPtr->Bank) {
482c06b6b69Smrg	arm32_drain_writebuf();
483c06b6b69Smrg	cPtr->Bank = bank;
484c06b6b69Smrg    }
485c06b6b69Smrg#endif
486c06b6b69Smrg
487c06b6b69Smrg    return 0;
488c06b6b69Smrg}
489c06b6b69Smrg
490c06b6b69Smrg
491c06b6b69Smrgint
492c06b6b69SmrgCHIPSWINSetWrite(ScreenPtr pScreen, int bank)
493c06b6b69Smrg{
494c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
495c06b6b69Smrg    register unsigned char tmp;
496c06b6b69Smrg
497c06b6b69Smrg    cPtr->writeXR(cPtr, 0x11, ((bank << 3) & 0xFF));
498c06b6b69Smrg    tmp = cPtr->readXR(cPtr, 0x0C) & 0xBF;
499c06b6b69Smrg    cPtr->writeXR(cPtr, 0x0C, ((bank << 1) & 0x40) | tmp);
500c06b6b69Smrg
501c06b6b69Smrg#ifdef	__arm32__
502c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
503c06b6b69Smrg    if (bank != cPtr->Bank) {
504c06b6b69Smrg	arm32_drain_writebuf();
505c06b6b69Smrg	cPtr->Bank = bank;
506c06b6b69Smrg    }
507c06b6b69Smrg#endif
508c06b6b69Smrg
509c06b6b69Smrg    return 0;
510c06b6b69Smrg}
511c06b6b69Smrg
512c06b6b69Smrgint
513c06b6b69SmrgCHIPSWINSetReadWrite(ScreenPtr pScreen, int bank)
514c06b6b69Smrg{
515c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
516c06b6b69Smrg    register unsigned char tmp;
517c06b6b69Smrg
518c06b6b69Smrg    cPtr->writeXR(cPtr, 0x10, ((bank << 3) & 0xFF));
519c06b6b69Smrg    cPtr->writeXR(cPtr, 0x11, ((bank << 3) & 0xFF));
520c06b6b69Smrg    tmp = cPtr->readXR(cPtr, 0x0C) & 0xAF;
521c06b6b69Smrg    cPtr->writeXR(cPtr, 0x0C, ((bank << 1) & 0x40) | ((bank >> 1) & 0x10) | tmp);
522c06b6b69Smrg
523c06b6b69Smrg#ifdef	__arm32__
524c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
525c06b6b69Smrg    if (bank != cPtr->Bank) {
526c06b6b69Smrg	arm32_drain_writebuf();
527c06b6b69Smrg	cPtr->Bank = bank;
528c06b6b69Smrg    }
529c06b6b69Smrg#endif
530c06b6b69Smrg
531c06b6b69Smrg    return 0;
532c06b6b69Smrg}
533c06b6b69Smrg
534c06b6b69Smrgint
535c06b6b69SmrgCHIPSWINSetReadPlanar(ScreenPtr pScreen, int bank)
536c06b6b69Smrg{
537c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
538c06b6b69Smrg    register unsigned char tmp;
539c06b6b69Smrg
540c06b6b69Smrg    cPtr->writeXR(cPtr, 0x10, ((bank << 5) & 0xFF));
541c06b6b69Smrg    tmp = cPtr->readXR(cPtr, 0x0C) & 0xEF;
542c06b6b69Smrg    cPtr->writeXR(cPtr, 0x0C, ((bank << 1) & 0x10) | tmp);
543c06b6b69Smrg
544c06b6b69Smrg#ifdef	__arm32__
545c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
546c06b6b69Smrg    if (bank != cPtr->Bank) {
547c06b6b69Smrg	arm32_drain_writebuf();
548c06b6b69Smrg	cPtr->Bank = bank;
549c06b6b69Smrg    }
550c06b6b69Smrg#endif
551c06b6b69Smrg
552c06b6b69Smrg    return 0;
553c06b6b69Smrg}
554c06b6b69Smrg
555c06b6b69Smrgint
556c06b6b69SmrgCHIPSWINSetWritePlanar(ScreenPtr pScreen, int bank)
557c06b6b69Smrg{
558c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
559c06b6b69Smrg    register unsigned char tmp;
560c06b6b69Smrg
561c06b6b69Smrg    cPtr->writeXR(cPtr, 0x11, ((bank << 5) & 0xFF));
562c06b6b69Smrg    tmp = cPtr->readXR(cPtr, 0x0C) & 0xBF;
563c06b6b69Smrg    cPtr->writeXR(cPtr, 0x0C, ((bank << 3) & 0x40) | tmp);
564c06b6b69Smrg
565c06b6b69Smrg#ifdef	__arm32__
566c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
567c06b6b69Smrg    if (bank != cPtr->Bank) {
568c06b6b69Smrg	arm32_drain_writebuf();
569c06b6b69Smrg	cPtr->Bank = bank;
570c06b6b69Smrg    }
571c06b6b69Smrg#endif
572c06b6b69Smrg
573c06b6b69Smrg    return 0;
574c06b6b69Smrg}
575c06b6b69Smrg
576c06b6b69Smrgint
577c06b6b69SmrgCHIPSWINSetReadWritePlanar(ScreenPtr pScreen, int bank)
578c06b6b69Smrg{
579c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
580c06b6b69Smrg    register unsigned char tmp;
581c06b6b69Smrg
582c06b6b69Smrg    cPtr->writeXR(cPtr, 0x10, ((bank << 5) & 0xFF));
583c06b6b69Smrg    cPtr->writeXR(cPtr, 0x11, ((bank << 5) & 0xFF));
584c06b6b69Smrg    tmp = cPtr->readXR(cPtr, 0x0C) & 0xAF;
585c06b6b69Smrg    cPtr->writeXR(cPtr, 0x0C, ((bank << 3) & 0x40) | ((bank << 1) & 0x10) | tmp);
586c06b6b69Smrg
587c06b6b69Smrg#ifdef	__arm32__
588c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
589c06b6b69Smrg    if (bank != cPtr->Bank) {
590c06b6b69Smrg	arm32_drain_writebuf();
591c06b6b69Smrg	cPtr->Bank = bank;
592c06b6b69Smrg    }
593c06b6b69Smrg#endif
594c06b6b69Smrg
595c06b6b69Smrg    return 0;
596c06b6b69Smrg}
597c06b6b69Smrg
598c06b6b69Smrgint
599c06b6b69SmrgCHIPSHiQVSetReadWrite(ScreenPtr pScreen, int bank)
600c06b6b69Smrg{
601c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
602c06b6b69Smrg
603c06b6b69Smrg    cPtr->writeXR(cPtr, 0x0E, bank & 0x7F);
604c06b6b69Smrg
605c06b6b69Smrg#ifdef	__arm32__
606c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
607c06b6b69Smrg    if (bank != cPtr->Bank) {
608c06b6b69Smrg	arm32_drain_writebuf();
609c06b6b69Smrg	cPtr->Bank = bank;
610c06b6b69Smrg    }
611c06b6b69Smrg#endif
612c06b6b69Smrg
613c06b6b69Smrg    return 0;
614c06b6b69Smrg}
615c06b6b69Smrg
616c06b6b69Smrgint
617c06b6b69SmrgCHIPSHiQVSetReadWritePlanar(ScreenPtr pScreen, int bank)
618c06b6b69Smrg{
619c06b6b69Smrg    CHIPSPtr cPtr = CHIPSPTR(xf86Screens[pScreen->myNum]);
620c06b6b69Smrg
621c06b6b69Smrg    cPtr->writeXR(cPtr, 0x0E, (bank << 2) & 0x7F);
622c06b6b69Smrg
623c06b6b69Smrg#ifdef	__arm32__
624c06b6b69Smrg    /* Must drain StrongARM write buffer on bank switch! */
625c06b6b69Smrg    if (bank != cPtr->Bank) {
626c06b6b69Smrg	arm32_drain_writebuf();
627c06b6b69Smrg	cPtr->Bank = bank;
628c06b6b69Smrg    }
629c06b6b69Smrg#endif
630c06b6b69Smrg
631c06b6b69Smrg    return 0;
632c06b6b69Smrg}
633c06b6b69Smrg#endif
634