1/* 2 * Copyright 1994-2000 by Robin Cutshaw <robin@XFree86.Org> 3 * 4 * Permission to use, copy, modify, distribute, and sell this software and its 5 * documentation for any purpose is hereby granted without fee, provided that 6 * the above copyright notice appear in all copies and that both that 7 * copyright notice and this permission notice appear in supporting 8 * documentation, and that the name of Robin Cutshaw not be used in 9 * advertising or publicity pertaining to distribution of the software without 10 * specific, written prior permission. Robin Cutshaw makes no representations 11 * about the suitability of this software for any purpose. It is provided 12 * "as is" without express or implied warranty. 13 * 14 * ROBIN CUTSHAW DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 16 * EVENT SHALL ROBIN CUTSHAW BE LIABLE FOR ANY SPECIAL, INDIRECT OR 17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 20 * PERFORMANCE OF THIS SOFTWARE. 21 * 22 */ 23 24#include "compiler.h" 25 26/* Indirect indexed registers */ 27 28#define TI_CURS_X_LOW 0x00 29#define TI_CURS_X_HIGH 0x01 /* only lower 4 bits are used */ 30#define TI_CURS_Y_LOW 0x02 31#define TI_CURS_Y_HIGH 0x03 /* only lower 4 bits are used */ 32#define TI_SPRITE_ORIGIN_X 0x04 33#define TI_SPRITE_ORIGIN_Y 0x05 34#define TI_CURS_CONTROL 0x06 35#define TI_PLANAR_ACCESS 0x80 /* 3025 only - 80 == BT485 mode */ 36#define TI_CURS_SPRITE_ENABLE 0x40 37#define TI_CURS_X_WINDOW_MODE 0x10 38#define TI_CURS_CTRL_MASK (TI_CURS_SPRITE_ENABLE | TI_CURS_X_WINDOW_MODE) 39#define TI_CURS_RAM_ADDR_LOW 0x08 40#define TI_CURS_RAM_ADDR_HIGH 0x09 41#define TI_CURS_RAM_DATA 0x0A 42#define TI_TRUE_COLOR_CONTROL 0x0E /* 3025 only */ 43#define TI_TC_BTMODE 0x04 /* on = BT485 mode, off = TI3020 mode */ 44#define TI_TC_NONVGAMODE 0x02 /* on = nonvgamode, off = vgamode */ 45#define TI_TC_8BIT 0x01 /* on = 8/4bit, off = 16/32bit */ 46#define TI_VGA_SWITCH_CONTROL 0x0F /* 3025 only */ 47#define TI_LATCH_CONTROL 0x0F /* 3026 only */ 48#define TI_WINDOW_START_X_LOW 0x10 49#define TI_WINDOW_START_X_HIGH 0x11 50#define TI_WINDOW_STOP_X_LOW 0x12 51#define TI_WINDOW_STOP_X_HIGH 0x13 52#define TI_WINDOW_START_Y_LOW 0x14 53#define TI_WINDOW_START_Y_HIGH 0x15 54#define TI_WINDOW_STOP_Y_LOW 0x16 55#define TI_WINDOW_STOP_Y_HIGH 0x17 56#define TI_MUX_CONTROL_1 0x18 57#define TI_MUX1_PSEUDO_COLOR 0x80 58#define TI_MUX1_DIRECT_888 0x06 59#define TI_MUX1_DIRECT_565 0x05 60#define TI_MUX1_DIRECT_555 0x04 61#define TI_MUX1_DIRECT_664 0x03 62#define TI_MUX1_TRUE_888 0x46 63#define TI_MUX1_TRUE_565 0x45 64#define TI_MUX1_TRUE_555 0x44 65#define TI_MUX1_TRUE_664 0x43 66#define TI_MUX1_3025D_888 0x0E /* 3025 only */ 67#define TI_MUX1_3025D_565 0x0D /* 3025 only */ 68#define TI_MUX1_3025D_555 0x0C /* 3025 only */ 69#define TI_MUX1_3025T_888 0x4E /* 3025 only */ 70#define TI_MUX1_3025T_565 0x4D /* 3025 only */ 71#define TI_MUX1_3025T_555 0x4C /* 3025 only */ 72#define TI_MUX1_3026D_888 0x06 /* 3026 only */ 73#define TI_MUX1_3026D_565 0x05 /* 3026 only */ 74#define TI_MUX1_3026D_555 0x04 /* 3026 only */ 75#define TI_MUX1_3026D_888_P8 0x16 /* 3026 only */ 76#define TI_MUX1_3026D_888_P5 0x1e /* 3026 only */ 77#define TI_MUX1_3026T_888 0x46 /* 3026 only */ 78#define TI_MUX1_3026T_565 0x45 /* 3026 only */ 79#define TI_MUX1_3026T_555 0x44 /* 3026 only */ 80#define TI_MUX1_3026T_888_P8 0x56 /* 3026 only */ 81#define TI_MUX1_3026T_888_P5 0x5e /* 3026 only */ 82#define TI_MUX_CONTROL_2 0x19 83#define TI_MUX2_BUS_VGA 0x98 84#define TI_MUX2_BUS_PC_D8P64 0x1C 85#define TI_MUX2_BUS_DC_D24P64 0x1C 86#define TI_MUX2_BUS_DC_D16P64 0x04 87#define TI_MUX2_BUS_DC_D15P64 0x04 88#define TI_MUX2_BUS_TC_D24P64 0x04 89#define TI_MUX2_BUS_TC_D16P64 0x04 90#define TI_MUX2_BUS_TC_D15P64 0x04 91#define TI_MUX2_BUS_3026PC_D8P64 0x4C 92#define TI_MUX2_BUS_3026DC_D24P64 0x5C 93#define TI_MUX2_BUS_3026DC_D16P64 0x54 94#define TI_MUX2_BUS_3026DC_D15P64 0x54 95#define TI_MUX2_BUS_3026TC_D24P64 0x5c 96#define TI_MUX2_BUS_3026TC_D16P64 0x54 97#define TI_MUX2_BUS_3026TC_D15P64 0x54 98#define TI_MUX2_BUS_3030PC_D8P128 0x4d 99#define TI_MUX2_BUS_3030DC_D24P128 0x5d 100#define TI_MUX2_BUS_3030DC_D16P128 0x55 101#define TI_MUX2_BUS_3030DC_D15P128 0x55 102#define TI_MUX2_BUS_3030TC_D24P128 0x5d 103#define TI_MUX2_BUS_3030TC_D16P128 0x55 104#define TI_MUX2_BUS_3030TC_D15P128 0x55 105#define TI_INPUT_CLOCK_SELECT 0x1A 106#define TI_ICLK_CLK0 0x00 107#define TI_ICLK_CLK0_DOUBLE 0x10 108#define TI_ICLK_CLK1 0x01 109#define TI_ICLK_CLK1_DOUBLE 0x11 110#define TI_ICLK_CLK2 0x02 /* 3025 only */ 111#define TI_ICLK_CLK2_DOUBLE 0x12 /* 3025 only */ 112#define TI_ICLK_CLK2_I 0x03 /* 3025 only */ 113#define TI_ICLK_CLK2_I_DOUBLE 0x13 /* 3025 only */ 114#define TI_ICLK_CLK2_E 0x04 /* 3025 only */ 115#define TI_ICLK_CLK2_E_DOUBLE 0x14 /* 3025 only */ 116#define TI_ICLK_PLL 0x05 /* 3025 only */ 117#define TI_OUTPUT_CLOCK_SELECT 0x1B 118#define TI_OCLK_VGA 0x3E 119#define TI_OCLK_S 0x40 120#define TI_OCLK_NS 0x80 /* 3025 only */ 121#define TI_OCLK_V1 0x00 122#define TI_OCLK_V2 0x08 123#define TI_OCLK_V4 0x10 124#define TI_OCLK_V8 0x18 125#define TI_OCLK_R1 0x00 126#define TI_OCLK_R2 0x01 127#define TI_OCLK_R4 0x02 128#define TI_OCLK_R8 0x03 129#define TI_OCLK_S_V1_R8 (TI_OCLK_S | TI_OCLK_V1 | TI_OCLK_R8) 130#define TI_OCLK_S_V2_R8 (TI_OCLK_S | TI_OCLK_V2 | TI_OCLK_R8) 131#define TI_OCLK_S_V4_R8 (TI_OCLK_S | TI_OCLK_V4 | TI_OCLK_R8) 132#define TI_OCLK_S_V8_R8 (TI_OCLK_S | TI_OCLK_V8 | TI_OCLK_R8) 133#define TI_OCLK_S_V2_R4 (TI_OCLK_S | TI_OCLK_V2 | TI_OCLK_R4) 134#define TI_OCLK_S_V4_R4 (TI_OCLK_S | TI_OCLK_V4 | TI_OCLK_R4) 135#define TI_OCLK_S_V1_R2 (TI_OCLK_S | TI_OCLK_V1 | TI_OCLK_R2) 136#define TI_OCLK_S_V2_R2 (TI_OCLK_S | TI_OCLK_V2 | TI_OCLK_R2) 137#define TI_OCLK_NS_V1_R1 (TI_OCLK_NS | TI_OCLK_V1 | TI_OCLK_R1) 138#define TI_OCLK_NS_V2_R2 (TI_OCLK_NS | TI_OCLK_V2 | TI_OCLK_R2) 139#define TI_OCLK_NS_V4_R4 (TI_OCLK_NS | TI_OCLK_V4 | TI_OCLK_R4) 140#define TI_PALETTE_PAGE 0x1C 141#define TI_GENERAL_CONTROL 0x1D 142#define TI_MISC_CONTROL 0x1E /* 3025 only */ 143#define TI_MC_POWER_DOWN 0x01 144#define TI_MC_DOTCLK_DISABLE 0x02 145#define TI_MC_INT_6_8_CONTROL 0x04 /* 00 == external 6/8 pin */ 146#define TI_MC_8_BPP 0x08 /* 00 == 6bpp */ 147#define TI_MC_PSEL_POLARITY 0x20 /* 3026 only, PSEL polarity select */ 148#define TI_MC_VCLK_POLARITY 0x20 149#define TI_MC_LCLK_LATCH 0x40 /* VCLK == 00, default */ 150#define TI_MC_LOOP_PLL_RCLK 0x80 151#define TI_OVERSCAN_COLOR_RED 0x20 152#define TI_OVERSCAN_COLOR_GREEN 0x21 153#define TI_OVERSCAN_COLOR_BLUE 0x22 154#define TI_CURSOR_COLOR_0_RED 0x23 155#define TI_CURSOR_COLOR_0_GREEN 0x24 156#define TI_CURSOR_COLOR_0_BLUE 0x25 157#define TI_CURSOR_COLOR_1_RED 0x26 158#define TI_CURSOR_COLOR_1_GREEN 0x27 159#define TI_CURSOR_COLOR_1_BLUE 0x28 160#define TI_AUXILIARY_CONTROL 0x29 161#define TI_AUX_SELF_CLOCK 0x08 162#define TI_AUX_W_CMPL 0x01 163#define TI_GENERAL_IO_CONTROL 0x2A 164#define TI_GIC_ALL_BITS 0x1F 165#define TI_GENERAL_IO_DATA 0x2B 166#define TI_GID_W2000_6BIT 0x00 167#define TI_GID_N9_964 0x01 168#define TI_GID_ELSA_SOG 0x04 169#define TI_GID_W2000_8BIT 0x08 170#define TI_GID_S3_DAC_6BIT 0x1C 171#define TI_GID_S3_DAC_8BIT 0x1E 172#define TI_GID_TI_DAC_6BIT 0x1D 173#define TI_GID_TI_DAC_8BIT 0x1F 174#define TI_PLL_CONTROL 0x2C /* 3025 only */ 175#define TI_PIXEL_CLOCK_PLL_DATA 0x2D /* 3025 only */ 176#define TI_PLL_ENABLE 0x08 /* 3025 only */ 177#define TI_MCLK_PLL_DATA 0x2E /* 3025 only */ 178#define TI_LOOP_CLOCK_PLL_DATA 0x2F /* 3025 only */ 179#define TI_COLOR_KEY_OLVGA_LOW 0x30 180#define TI_COLOR_KEY_OLVGA_HIGH 0x31 181#define TI_COLOR_KEY_RED_LOW 0x32 182#define TI_COLOR_KEY_RED_HIGH 0x33 183#define TI_COLOR_KEY_GREEN_LOW 0x34 184#define TI_COLOR_KEY_GREEN_HIGH 0x35 185#define TI_COLOR_KEY_BLUE_LOW 0x36 186#define TI_COLOR_KEY_BLUE_HIGH 0x37 187#define TI_COLOR_KEY_CONTROL 0x38 188#define TI_COLOR_KEY_CMPL 0x10 189#define TI_MCLK_DCLK_CONTROL 0x39 /* 3025 only */ 190#define TI_MCLK_LCLK_CONTROL 0x39 /* 3026 only */ 191#define TI_SENSE_TEST 0x3A 192#define TI_TEST_DATA 0x3B 193#define TI_CRC_LOW 0x3C 194#define TI_CRC_HIGH 0x3D 195#define TI_CRC_CONTROL 0x3E 196#define TI_ID 0x3F 197#define TI_VIEWPOINT20_ID 0x20 198#define TI_VIEWPOINT25_ID 0x25 199#define TI_MODE_85_CONTROL 0xD5 /* 3025 only */ 200 201#define TI_REF_FREQ 14.31818 /* 3025 only */ 202 203/* 204 * which clocks should be set (just flags...) 205 */ 206#define TI_BOTH_CLOCKS 1 207#define TI_LOOP_CLOCK 2 208