1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28 29#ifndef _I915_REG_H_ 30#define _I915_REG_H_ 31 32#define I915_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) 33 34#define CMD_3D (0x3<<29) 35 36#define PRIM3D_INLINE (CMD_3D | (0x1f<<24)) 37#define PRIM3D_TRILIST (0x0<<18) 38#define PRIM3D_TRISTRIP (0x1<<18) 39#define PRIM3D_TRISTRIP_RVRSE (0x2<<18) 40#define PRIM3D_TRIFAN (0x3<<18) 41#define PRIM3D_POLY (0x4<<18) 42#define PRIM3D_LINELIST (0x5<<18) 43#define PRIM3D_LINESTRIP (0x6<<18) 44#define PRIM3D_RECTLIST (0x7<<18) 45#define PRIM3D_POINTLIST (0x8<<18) 46#define PRIM3D_DIB (0x9<<18) 47#define PRIM3D_CLEAR_RECT (0xa<<18) 48#define PRIM3D_ZONE_INIT (0xd<<18) 49#define PRIM3D_MASK (0x1f<<18) 50 51/* p137 */ 52#define _3DSTATE_AA_CMD (CMD_3D | (0x06<<24)) 53#define AA_LINE_ECAAR_WIDTH_ENABLE (1<<16) 54#define AA_LINE_ECAAR_WIDTH_0_5 0 55#define AA_LINE_ECAAR_WIDTH_1_0 (1<<14) 56#define AA_LINE_ECAAR_WIDTH_2_0 (2<<14) 57#define AA_LINE_ECAAR_WIDTH_4_0 (3<<14) 58#define AA_LINE_REGION_WIDTH_ENABLE (1<<8) 59#define AA_LINE_REGION_WIDTH_0_5 0 60#define AA_LINE_REGION_WIDTH_1_0 (1<<6) 61#define AA_LINE_REGION_WIDTH_2_0 (2<<6) 62#define AA_LINE_REGION_WIDTH_4_0 (3<<6) 63 64/* 3DSTATE_BACKFACE_STENCIL_OPS, p138*/ 65#define _3DSTATE_BACKFACE_STENCIL_OPS (CMD_3D | (0x8<<24)) 66#define BFO_ENABLE_STENCIL_REF (1<<23) 67#define BFO_STENCIL_REF_SHIFT 15 68#define BFO_STENCIL_REF_MASK (0xff<<15) 69#define BFO_ENABLE_STENCIL_FUNCS (1<<14) 70#define BFO_STENCIL_TEST_SHIFT 11 71#define BFO_STENCIL_TEST_MASK (0x7<<11) 72#define BFO_STENCIL_FAIL_SHIFT 8 73#define BFO_STENCIL_FAIL_MASK (0x7<<8) 74#define BFO_STENCIL_PASS_Z_FAIL_SHIFT 5 75#define BFO_STENCIL_PASS_Z_FAIL_MASK (0x7<<5) 76#define BFO_STENCIL_PASS_Z_PASS_SHIFT 2 77#define BFO_STENCIL_PASS_Z_PASS_MASK (0x7<<2) 78#define BFO_ENABLE_STENCIL_TWO_SIDE (1<<1) 79#define BFO_STENCIL_TWO_SIDE (1<<0) 80 81 82/* 3DSTATE_BACKFACE_STENCIL_MASKS, p140 */ 83#define _3DSTATE_BACKFACE_STENCIL_MASKS (CMD_3D | (0x9<<24)) 84#define BFM_ENABLE_STENCIL_TEST_MASK (1<<17) 85#define BFM_ENABLE_STENCIL_WRITE_MASK (1<<16) 86#define BFM_STENCIL_TEST_MASK_SHIFT 8 87#define BFM_STENCIL_TEST_MASK_MASK (0xff<<8) 88#define BFM_STENCIL_WRITE_MASK_SHIFT 0 89#define BFM_STENCIL_WRITE_MASK_MASK (0xff<<0) 90 91 92 93/* 3DSTATE_BIN_CONTROL p141 */ 94 95/* p143 */ 96#define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) 97/* Dword 1 */ 98#define BUF_3D_ID_COLOR_BACK (0x3<<24) 99#define BUF_3D_ID_DEPTH (0x7<<24) 100#define BUF_3D_USE_FENCE (1<<23) 101#define BUF_3D_TILED_SURFACE (1<<22) 102#define BUF_3D_TILE_WALK_X 0 103#define BUF_3D_TILE_WALK_Y (1<<21) 104#define BUF_3D_PITCH(x) (((x)/4)<<2) 105/* Dword 2 */ 106#define BUF_3D_ADDR(x) ((x) & ~0x3) 107 108 109/* 3DSTATE_CHROMA_KEY */ 110 111/* 3DSTATE_CLEAR_PARAMETERS, p150 */ 112#define _3DSTATE_CLEAR_PARAMETERS (CMD_3D | (0x1d<<24) | (0x9c<<16) | 5) 113/* Dword 1 */ 114#define CLEARPARAM_CLEAR_RECT (1 << 16) 115#define CLEARPARAM_ZONE_INIT (0 << 16) 116#define CLEARPARAM_WRITE_COLOR (1 << 2) 117#define CLEARPARAM_WRITE_DEPTH (1 << 1) 118#define CLEARPARAM_WRITE_STENCIL (1 << 0) 119 120/* 3DSTATE_CONSTANT_BLEND_COLOR, p153 */ 121#define _3DSTATE_CONST_BLEND_COLOR_CMD (CMD_3D | (0x1d<<24) | (0x88<<16)) 122 123 124 125/* 3DSTATE_COORD_SET_BINDINGS, p154 */ 126#define _3DSTATE_COORD_SET_BINDINGS (CMD_3D | (0x16<<24)) 127#define CSB_TCB(iunit, eunit) ((eunit)<<(iunit*3)) 128 129/* p156 */ 130#define _3DSTATE_DFLT_DIFFUSE_CMD (CMD_3D | (0x1d<<24) | (0x99<<16)) 131 132/* p157 */ 133#define _3DSTATE_DFLT_SPEC_CMD (CMD_3D | (0x1d<<24) | (0x9a<<16)) 134 135/* p158 */ 136#define _3DSTATE_DFLT_Z_CMD (CMD_3D | (0x1d<<24) | (0x98<<16)) 137 138 139/* 3DSTATE_DEPTH_OFFSET_SCALE, p159 */ 140#define _3DSTATE_DEPTH_OFFSET_SCALE (CMD_3D | (0x1d<<24) | (0x97<<16)) 141/* scale in dword 1 */ 142 143/* The depth subrectangle is not supported, but must be disabled. */ 144/* 3DSTATE_DEPTH_SUBRECT_DISABLE, p160 */ 145#define _3DSTATE_DEPTH_SUBRECT_DISABLE (CMD_3D | (0x1c<<24) | (0x11<<19) | (1 << 1) | (0 << 0)) 146 147/* p161 */ 148#define _3DSTATE_DST_BUF_VARS_CMD (CMD_3D | (0x1d<<24) | (0x85<<16)) 149/* Dword 1 */ 150#define TEX_DEFAULT_COLOR_OGL (0<<30) 151#define TEX_DEFAULT_COLOR_D3D (1<<30) 152#define ZR_EARLY_DEPTH (1<<29) 153#define LOD_PRECLAMP_OGL (1<<28) 154#define LOD_PRECLAMP_D3D (0<<28) 155#define DITHER_FULL_ALWAYS (0<<26) 156#define DITHER_FULL_ON_FB_BLEND (1<<26) 157#define DITHER_CLAMPED_ALWAYS (2<<26) 158#define LINEAR_GAMMA_BLEND_32BPP (1<<25) 159#define DEBUG_DISABLE_ENH_DITHER (1<<24) 160#define DSTORG_HORT_BIAS(x) ((x)<<20) 161#define DSTORG_VERT_BIAS(x) ((x)<<16) 162#define COLOR_4_2_2_CHNL_WRT_ALL 0 163#define COLOR_4_2_2_CHNL_WRT_Y (1<<12) 164#define COLOR_4_2_2_CHNL_WRT_CR (2<<12) 165#define COLOR_4_2_2_CHNL_WRT_CB (3<<12) 166#define COLOR_4_2_2_CHNL_WRT_CRCB (4<<12) 167#define COLR_BUF_8BIT 0 168#define COLR_BUF_RGB555 (1<<8) 169#define COLR_BUF_RGB565 (2<<8) 170#define COLR_BUF_ARGB8888 (3<<8) 171#define COLR_BUF_ARGB4444 (8<<8) 172#define COLR_BUF_ARGB1555 (9<<8) 173#define COLR_BUF_ARGB2AAA (0xa<<8) 174#define DEPTH_FRMT_16_FIXED 0 175#define DEPTH_FRMT_16_FLOAT (1<<2) 176#define DEPTH_FRMT_24_FIXED_8_OTHER (2<<2) 177#define VERT_LINE_STRIDE_1 (1<<1) 178#define VERT_LINE_STRIDE_0 (0<<1) 179#define VERT_LINE_STRIDE_OFS_1 1 180#define VERT_LINE_STRIDE_OFS_0 0 181 182/* p166 */ 183#define _3DSTATE_DRAW_RECT_CMD (CMD_3D|(0x1d<<24)|(0x80<<16)|3) 184/* Dword 1 */ 185#define DRAW_RECT_DIS_DEPTH_OFS (1<<30) 186#define DRAW_DITHER_OFS_X(x) ((x)<<26) 187#define DRAW_DITHER_OFS_Y(x) ((x)<<24) 188/* Dword 2 */ 189#define DRAW_YMIN(x) ((x)<<16) 190#define DRAW_XMIN(x) (x) 191/* Dword 3 */ 192#define DRAW_YMAX(x) ((x)<<16) 193#define DRAW_XMAX(x) (x) 194/* Dword 4 */ 195#define DRAW_YORG(x) ((x)<<16) 196#define DRAW_XORG(x) (x) 197 198 199/* 3DSTATE_FILTER_COEFFICIENTS_4X4, p170 */ 200 201/* 3DSTATE_FILTER_COEFFICIENTS_6X5, p172 */ 202 203 204/* _3DSTATE_FOG_COLOR, p173 */ 205#define _3DSTATE_FOG_COLOR_CMD (CMD_3D|(0x15<<24)) 206#define FOG_COLOR_RED(x) ((x)<<16) 207#define FOG_COLOR_GREEN(x) ((x)<<8) 208#define FOG_COLOR_BLUE(x) (x) 209 210/* _3DSTATE_FOG_MODE, p174 */ 211#define _3DSTATE_FOG_MODE_CMD (CMD_3D|(0x1d<<24)|(0x89<<16)|2) 212/* Dword 1 */ 213#define FMC1_FOGFUNC_MODIFY_ENABLE (1<<31) 214#define FMC1_FOGFUNC_VERTEX (0<<28) 215#define FMC1_FOGFUNC_PIXEL_EXP (1<<28) 216#define FMC1_FOGFUNC_PIXEL_EXP2 (2<<28) 217#define FMC1_FOGFUNC_PIXEL_LINEAR (3<<28) 218#define FMC1_FOGFUNC_MASK (3<<28) 219#define FMC1_FOGINDEX_MODIFY_ENABLE (1<<27) 220#define FMC1_FOGINDEX_Z (0<<25) 221#define FMC1_FOGINDEX_W (1<<25) 222#define FMC1_C1_C2_MODIFY_ENABLE (1<<24) 223#define FMC1_DENSITY_MODIFY_ENABLE (1<<23) 224#define FMC1_C1_ONE (1<<13) 225#define FMC1_C1_MASK (0xffff<<4) 226/* Dword 2 */ 227#define FMC2_C2_ONE (1<<16) 228/* Dword 3 */ 229#define FMC3_D_ONE (1<<16) 230 231 232 233/* _3DSTATE_INDEPENDENT_ALPHA_BLEND, p177 */ 234#define _3DSTATE_INDEPENDENT_ALPHA_BLEND_CMD (CMD_3D|(0x0b<<24)) 235#define IAB_MODIFY_ENABLE (1<<23) 236#define IAB_ENABLE (1<<22) 237#define IAB_MODIFY_FUNC (1<<21) 238#define IAB_FUNC_SHIFT 16 239#define IAB_MODIFY_SRC_FACTOR (1<<11) 240#define IAB_SRC_FACTOR_SHIFT 6 241#define IAB_SRC_FACTOR_MASK (BLENDFACT_MASK<<6) 242#define IAB_MODIFY_DST_FACTOR (1<<5) 243#define IAB_DST_FACTOR_SHIFT 0 244#define IAB_DST_FACTOR_MASK (BLENDFACT_MASK<<0) 245 246#define BLENDFACT_ZERO 0x01 247#define BLENDFACT_ONE 0x02 248#define BLENDFACT_SRC_COLR 0x03 249#define BLENDFACT_INV_SRC_COLR 0x04 250#define BLENDFACT_SRC_ALPHA 0x05 251#define BLENDFACT_INV_SRC_ALPHA 0x06 252#define BLENDFACT_DST_ALPHA 0x07 253#define BLENDFACT_INV_DST_ALPHA 0x08 254#define BLENDFACT_DST_COLR 0x09 255#define BLENDFACT_INV_DST_COLR 0x0a 256#define BLENDFACT_SRC_ALPHA_SATURATE 0x0b 257#define BLENDFACT_CONST_COLOR 0x0c 258#define BLENDFACT_INV_CONST_COLOR 0x0d 259#define BLENDFACT_CONST_ALPHA 0x0e 260#define BLENDFACT_INV_CONST_ALPHA 0x0f 261#define BLENDFACT_MASK 0x0f 262 263#define BLENDFUNC_ADD 0x0 264#define BLENDFUNC_SUBTRACT 0x1 265#define BLENDFUNC_REVERSE_SUBTRACT 0x2 266#define BLENDFUNC_MIN 0x3 267#define BLENDFUNC_MAX 0x4 268#define BLENDFUNC_MASK 0x7 269 270/* 3DSTATE_LOAD_INDIRECT, p180 */ 271 272#define _3DSTATE_LOAD_INDIRECT (CMD_3D|(0x1d<<24)|(0x7<<16)) 273#define LI0_STATE_STATIC_INDIRECT (0x01<<8) 274#define LI0_STATE_DYNAMIC_INDIRECT (0x02<<8) 275#define LI0_STATE_SAMPLER (0x04<<8) 276#define LI0_STATE_MAP (0x08<<8) 277#define LI0_STATE_PROGRAM (0x10<<8) 278#define LI0_STATE_CONSTANTS (0x20<<8) 279 280#define SIS0_BUFFER_ADDRESS(x) ((x)&~0x3) 281#define SIS0_FORCE_LOAD (1<<1) 282#define SIS0_BUFFER_VALID (1<<0) 283#define SIS1_BUFFER_LENGTH(x) ((x)&0xff) 284 285#define DIS0_BUFFER_ADDRESS(x) ((x)&~0x3) 286#define DIS0_BUFFER_RESET (1<<1) 287#define DIS0_BUFFER_VALID (1<<0) 288 289#define SSB0_BUFFER_ADDRESS(x) ((x)&~0x3) 290#define SSB0_FORCE_LOAD (1<<1) 291#define SSB0_BUFFER_VALID (1<<0) 292#define SSB1_BUFFER_LENGTH(x) ((x)&0xff) 293 294#define MSB0_BUFFER_ADDRESS(x) ((x)&~0x3) 295#define MSB0_FORCE_LOAD (1<<1) 296#define MSB0_BUFFER_VALID (1<<0) 297#define MSB1_BUFFER_LENGTH(x) ((x)&0xff) 298 299#define PSP0_BUFFER_ADDRESS(x) ((x)&~0x3) 300#define PSP0_FORCE_LOAD (1<<1) 301#define PSP0_BUFFER_VALID (1<<0) 302#define PSP1_BUFFER_LENGTH(x) ((x)&0xff) 303 304#define PSC0_BUFFER_ADDRESS(x) ((x)&~0x3) 305#define PSC0_FORCE_LOAD (1<<1) 306#define PSC0_BUFFER_VALID (1<<0) 307#define PSC1_BUFFER_LENGTH(x) ((x)&0xff) 308 309 310 311 312 313/* _3DSTATE_RASTERIZATION_RULES */ 314#define _3DSTATE_RASTER_RULES_CMD (CMD_3D|(0x07<<24)) 315#define ENABLE_POINT_RASTER_RULE (1<<15) 316#define OGL_POINT_RASTER_RULE (1<<13) 317#define ENABLE_TEXKILL_3D_4D (1<<10) 318#define TEXKILL_3D (0<<9) 319#define TEXKILL_4D (1<<9) 320#define ENABLE_LINE_STRIP_PROVOKE_VRTX (1<<8) 321#define ENABLE_TRI_FAN_PROVOKE_VRTX (1<<5) 322#define LINE_STRIP_PROVOKE_VRTX(x) ((x)<<6) 323#define TRI_FAN_PROVOKE_VRTX(x) ((x)<<3) 324 325/* _3DSTATE_SCISSOR_ENABLE, p256 */ 326#define _3DSTATE_SCISSOR_ENABLE_CMD (CMD_3D|(0x1c<<24)|(0x10<<19)) 327#define ENABLE_SCISSOR_RECT ((1<<1) | 1) 328#define DISABLE_SCISSOR_RECT (1<<1) 329 330/* _3DSTATE_SCISSOR_RECTANGLE_0, p257 */ 331#define _3DSTATE_SCISSOR_RECT_0_CMD (CMD_3D|(0x1d<<24)|(0x81<<16)|1) 332/* Dword 1 */ 333#define SCISSOR_RECT_0_YMIN(x) ((x)<<16) 334#define SCISSOR_RECT_0_XMIN(x) (x) 335/* Dword 2 */ 336#define SCISSOR_RECT_0_YMAX(x) ((x)<<16) 337#define SCISSOR_RECT_0_XMAX(x) (x) 338 339/* p189 */ 340#define _3DSTATE_LOAD_STATE_IMMEDIATE_1 ((0x3<<29)|(0x1d<<24)|(0x04<<16)) 341#define I1_LOAD_S(n) (1<<(4+n)) 342 343#define S0_VB_OFFSET_MASK 0xffffffc 344#define S0_AUTO_CACHE_INV_DISABLE (1<<0) 345 346#define S1_VERTEX_WIDTH_SHIFT 24 347#define S1_VERTEX_WIDTH_MASK (0x3f<<24) 348#define S1_VERTEX_PITCH_SHIFT 16 349#define S1_VERTEX_PITCH_MASK (0x3f<<16) 350 351#define TEXCOORDFMT_2D 0x0 352#define TEXCOORDFMT_3D 0x1 353#define TEXCOORDFMT_4D 0x2 354#define TEXCOORDFMT_1D 0x3 355#define TEXCOORDFMT_2D_16 0x4 356#define TEXCOORDFMT_4D_16 0x5 357#define TEXCOORDFMT_NOT_PRESENT 0xf 358#define S2_TEXCOORD_FMT0_MASK 0xf 359#define S2_TEXCOORD_FMT1_SHIFT 4 360#define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) 361#define S2_TEXCOORD_NONE (~0) 362 363#define TEXCOORD_WRAP_SHORTEST_TCX 8 364#define TEXCOORD_WRAP_SHORTEST_TCY 4 365#define TEXCOORD_WRAP_SHORTEST_TCZ 2 366#define TEXCOORD_PERSPECTIVE_DISABLE 1 367 368#define S3_WRAP_SHORTEST_TCX(unit) (TEXCOORD_WRAP_SHORTEST_TCX << ((unit) * 4)) 369#define S3_WRAP_SHORTEST_TCY(unit) (TEXCOORD_WRAP_SHORTEST_TCY << ((unit) * 4)) 370#define S3_WRAP_SHORTEST_TCZ(unit) (TEXCOORD_WRAP_SHORTEST_TCZ << ((unit) * 4)) 371#define S3_PERSPECTIVE_DISABLE(unit) (TEXCOORD_PERSPECTIVE_DISABLE << ((unit) * 4)) 372 373/* S3 not interesting */ 374 375#define S4_POINT_WIDTH_SHIFT 23 376#define S4_POINT_WIDTH_MASK (0x1ff<<23) 377#define S4_LINE_WIDTH_SHIFT 19 378#define S4_LINE_WIDTH_ONE (0x2<<19) 379#define S4_LINE_WIDTH_MASK (0xf<<19) 380#define S4_FLATSHADE_ALPHA (1<<18) 381#define S4_FLATSHADE_FOG (1<<17) 382#define S4_FLATSHADE_SPECULAR (1<<16) 383#define S4_FLATSHADE_COLOR (1<<15) 384#define S4_CULLMODE_BOTH (0<<13) 385#define S4_CULLMODE_NONE (1<<13) 386#define S4_CULLMODE_CW (2<<13) 387#define S4_CULLMODE_CCW (3<<13) 388#define S4_CULLMODE_MASK (3<<13) 389#define S4_VFMT_POINT_WIDTH (1<<12) 390#define S4_VFMT_SPEC_FOG (1<<11) 391#define S4_VFMT_COLOR (1<<10) 392#define S4_VFMT_DEPTH_OFFSET (1<<9) 393#define S4_VFMT_XYZ (1<<6) 394#define S4_VFMT_XYZW (2<<6) 395#define S4_VFMT_XY (3<<6) 396#define S4_VFMT_XYW (4<<6) 397#define S4_VFMT_XYZW_MASK (7<<6) 398#define S4_FORCE_DEFAULT_DIFFUSE (1<<5) 399#define S4_FORCE_DEFAULT_SPECULAR (1<<4) 400#define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) 401#define S4_VFMT_FOG_PARAM (1<<2) 402#define S4_SPRITE_POINT_ENABLE (1<<1) 403#define S4_LINE_ANTIALIAS_ENABLE (1<<0) 404 405#define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \ 406 S4_VFMT_SPEC_FOG | \ 407 S4_VFMT_COLOR | \ 408 S4_VFMT_DEPTH_OFFSET | \ 409 S4_VFMT_XYZW_MASK | \ 410 S4_VFMT_FOG_PARAM) 411 412 413#define S5_WRITEDISABLE_ALPHA (1<<31) 414#define S5_WRITEDISABLE_RED (1<<30) 415#define S5_WRITEDISABLE_GREEN (1<<29) 416#define S5_WRITEDISABLE_BLUE (1<<28) 417#define S5_WRITEDISABLE_MASK (0xf<<28) 418#define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) 419#define S5_LAST_PIXEL_ENABLE (1<<26) 420#define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) 421#define S5_FOG_ENABLE (1<<24) 422#define S5_STENCIL_REF_SHIFT 16 423#define S5_STENCIL_REF_MASK (0xff<<16) 424#define S5_STENCIL_TEST_FUNC_SHIFT 13 425#define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) 426#define S5_STENCIL_FAIL_SHIFT 10 427#define S5_STENCIL_FAIL_MASK (0x7<<10) 428#define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 429#define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) 430#define S5_STENCIL_PASS_Z_PASS_SHIFT 4 431#define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) 432#define S5_STENCIL_WRITE_ENABLE (1<<3) 433#define S5_STENCIL_TEST_ENABLE (1<<2) 434#define S5_COLOR_DITHER_ENABLE (1<<1) 435#define S5_LOGICOP_ENABLE (1<<0) 436 437 438#define S6_ALPHA_TEST_ENABLE (1<<31) 439#define S6_ALPHA_TEST_FUNC_SHIFT 28 440#define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) 441#define S6_ALPHA_REF_SHIFT 20 442#define S6_ALPHA_REF_MASK (0xff<<20) 443#define S6_DEPTH_TEST_ENABLE (1<<19) 444#define S6_DEPTH_TEST_FUNC_SHIFT 16 445#define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) 446#define S6_CBUF_BLEND_ENABLE (1<<15) 447#define S6_CBUF_BLEND_FUNC_SHIFT 12 448#define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) 449#define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 450#define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) 451#define S6_CBUF_DST_BLEND_FACT_SHIFT 4 452#define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) 453#define S6_DEPTH_WRITE_ENABLE (1<<3) 454#define S6_COLOR_WRITE_ENABLE (1<<2) 455#define S6_TRISTRIP_PV_SHIFT 0 456#define S6_TRISTRIP_PV_MASK (0x3<<0) 457 458#define S7_DEPTH_OFFSET_CONST_MASK ~0 459 460/* 3DSTATE_MAP_DEINTERLACER_PARAMETERS */ 461/* 3DSTATE_MAP_PALETTE_LOAD_32, p206 */ 462 463 464/* _3DSTATE_MODES_4, p218 */ 465#define _3DSTATE_MODES_4_CMD (CMD_3D|(0x0d<<24)) 466#define ENABLE_LOGIC_OP_FUNC (1<<23) 467#define LOGIC_OP_FUNC(x) ((x)<<18) 468#define LOGICOP_MASK (0xf<<18) 469#define LOGICOP_COPY 0xc 470#define MODE4_ENABLE_STENCIL_TEST_MASK ((1<<17)|(0xff00)) 471#define ENABLE_STENCIL_TEST_MASK (1<<17) 472#define STENCIL_TEST_MASK(x) ((x)<<8) 473#define MODE4_ENABLE_STENCIL_WRITE_MASK ((1<<16)|(0x00ff)) 474#define ENABLE_STENCIL_WRITE_MASK (1<<16) 475#define STENCIL_WRITE_MASK(x) ((x)&0xff) 476 477/* _3DSTATE_MODES_5, p220 */ 478#define _3DSTATE_MODES_5_CMD (CMD_3D|(0x0c<<24)) 479#define PIPELINE_FLUSH_RENDER_CACHE (1<<18) 480#define PIPELINE_FLUSH_TEXTURE_CACHE (1<<16) 481 482 483/* p221 */ 484#define _3DSTATE_PIXEL_SHADER_CONSTANTS (CMD_3D|(0x1d<<24)|(0x6<<16)) 485#define PS1_REG(n) (1<<(n)) 486#define PS2_CONST_X(n) (n) 487#define PS3_CONST_Y(n) (n) 488#define PS4_CONST_Z(n) (n) 489#define PS5_CONST_W(n) (n) 490 491/* p222 */ 492 493 494#define I915_MAX_TEX_INDIRECT 4 495#define I915_MAX_TEX_INSN 32 496#define I915_MAX_ALU_INSN 64 497#define I915_MAX_DECL_INSN 27 498#define I915_MAX_TEMPORARY 16 499 500 501/* Each instruction is 3 dwords long, though most don't require all 502 * this space. Maximum of 123 instructions. Smaller maxes per insn 503 * type. 504 */ 505#define _3DSTATE_PIXEL_SHADER_PROGRAM (CMD_3D|(0x1d<<24)|(0x5<<16)) 506 507#define REG_TYPE_R 0 /* temporary regs, no need to 508 * dcl, must be written before 509 * read -- Preserved between 510 * phases. 511 */ 512#define REG_TYPE_T 1 /* Interpolated values, must be 513 * dcl'ed before use. 514 * 515 * 0..7: texture coord, 516 * 8: diffuse spec, 517 * 9: specular color, 518 * 10: fog parameter in w. 519 */ 520#define REG_TYPE_CONST 2 /* Restriction: only one const 521 * can be referenced per 522 * instruction, though it may be 523 * selected for multiple inputs. 524 * Constants not initialized 525 * default to zero. 526 */ 527#define REG_TYPE_S 3 /* sampler */ 528#define REG_TYPE_OC 4 /* output color (rgba) */ 529#define REG_TYPE_OD 5 /* output depth (w), xyz are 530 * temporaries. If not written, 531 * interpolated depth is used? 532 */ 533#define REG_TYPE_U 6 /* unpreserved temporaries */ 534#define REG_TYPE_MASK 0x7 535#define REG_NR_MASK 0xf 536 537 538/* REG_TYPE_T: 539 */ 540#define T_TEX0 0 541#define T_TEX1 1 542#define T_TEX2 2 543#define T_TEX3 3 544#define T_TEX4 4 545#define T_TEX5 5 546#define T_TEX6 6 547#define T_TEX7 7 548#define T_DIFFUSE 8 549#define T_SPECULAR 9 550#define T_FOG_W 10 /* interpolated fog is in W coord */ 551 552/* Arithmetic instructions */ 553 554/* .replicate_swizzle == selection and replication of a particular 555 * scalar channel, ie., .xxxx, .yyyy, .zzzz or .wwww 556 */ 557#define A0_NOP (0x0<<24) /* no operation */ 558#define A0_ADD (0x1<<24) /* dst = src0 + src1 */ 559#define A0_MOV (0x2<<24) /* dst = src0 */ 560#define A0_MUL (0x3<<24) /* dst = src0 * src1 */ 561#define A0_MAD (0x4<<24) /* dst = src0 * src1 + src2 */ 562#define A0_DP2ADD (0x5<<24) /* dst.xyzw = src0.xy dot src1.xy + src2.replicate_swizzle */ 563#define A0_DP3 (0x6<<24) /* dst.xyzw = src0.xyz dot src1.xyz */ 564#define A0_DP4 (0x7<<24) /* dst.xyzw = src0.xyzw dot src1.xyzw */ 565#define A0_FRC (0x8<<24) /* dst = src0 - floor(src0) */ 566#define A0_RCP (0x9<<24) /* dst.xyzw = 1/(src0.replicate_swizzle) */ 567#define A0_RSQ (0xa<<24) /* dst.xyzw = 1/(sqrt(abs(src0.replicate_swizzle))) */ 568#define A0_EXP (0xb<<24) /* dst.xyzw = exp2(src0.replicate_swizzle) */ 569#define A0_LOG (0xc<<24) /* dst.xyzw = log2(abs(src0.replicate_swizzle)) */ 570#define A0_CMP (0xd<<24) /* dst = (src0 >= 0.0) ? src1 : src2 */ 571#define A0_MIN (0xe<<24) /* dst = (src0 < src1) ? src0 : src1 */ 572#define A0_MAX (0xf<<24) /* dst = (src0 >= src1) ? src0 : src1 */ 573#define A0_FLR (0x10<<24) /* dst = floor(src0) */ 574#define A0_MOD (0x11<<24) /* dst = src0 fmod 1.0 */ 575#define A0_TRC (0x12<<24) /* dst = int(src0) */ 576#define A0_SGE (0x13<<24) /* dst = src0 >= src1 ? 1.0 : 0.0 */ 577#define A0_SLT (0x14<<24) /* dst = src0 < src1 ? 1.0 : 0.0 */ 578#define A0_DEST_SATURATE (1<<22) 579#define A0_DEST_TYPE_SHIFT 19 580/* Allow: R, OC, OD, U */ 581#define A0_DEST_NR_SHIFT 14 582/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ 583#define A0_DEST_CHANNEL_X (1<<10) 584#define A0_DEST_CHANNEL_Y (2<<10) 585#define A0_DEST_CHANNEL_Z (4<<10) 586#define A0_DEST_CHANNEL_W (8<<10) 587#define A0_DEST_CHANNEL_ALL (0xf<<10) 588#define A0_DEST_CHANNEL_SHIFT 10 589#define A0_SRC0_TYPE_SHIFT 7 590#define A0_SRC0_NR_SHIFT 2 591 592#define A0_DEST_CHANNEL_XY (A0_DEST_CHANNEL_X|A0_DEST_CHANNEL_Y) 593#define A0_DEST_CHANNEL_XYZ (A0_DEST_CHANNEL_XY|A0_DEST_CHANNEL_Z) 594 595 596#define SRC_X 0 597#define SRC_Y 1 598#define SRC_Z 2 599#define SRC_W 3 600#define SRC_ZERO 4 601#define SRC_ONE 5 602 603#define A1_SRC0_CHANNEL_X_NEGATE (1<<31) 604#define A1_SRC0_CHANNEL_X_SHIFT 28 605#define A1_SRC0_CHANNEL_Y_NEGATE (1<<27) 606#define A1_SRC0_CHANNEL_Y_SHIFT 24 607#define A1_SRC0_CHANNEL_Z_NEGATE (1<<23) 608#define A1_SRC0_CHANNEL_Z_SHIFT 20 609#define A1_SRC0_CHANNEL_W_NEGATE (1<<19) 610#define A1_SRC0_CHANNEL_W_SHIFT 16 611#define A1_SRC1_TYPE_SHIFT 13 612#define A1_SRC1_NR_SHIFT 8 613#define A1_SRC1_CHANNEL_X_NEGATE (1<<7) 614#define A1_SRC1_CHANNEL_X_SHIFT 4 615#define A1_SRC1_CHANNEL_Y_NEGATE (1<<3) 616#define A1_SRC1_CHANNEL_Y_SHIFT 0 617 618#define A2_SRC1_CHANNEL_Z_NEGATE (1<<31) 619#define A2_SRC1_CHANNEL_Z_SHIFT 28 620#define A2_SRC1_CHANNEL_W_NEGATE (1<<27) 621#define A2_SRC1_CHANNEL_W_SHIFT 24 622#define A2_SRC2_TYPE_SHIFT 21 623#define A2_SRC2_NR_SHIFT 16 624#define A2_SRC2_CHANNEL_X_NEGATE (1<<15) 625#define A2_SRC2_CHANNEL_X_SHIFT 12 626#define A2_SRC2_CHANNEL_Y_NEGATE (1<<11) 627#define A2_SRC2_CHANNEL_Y_SHIFT 8 628#define A2_SRC2_CHANNEL_Z_NEGATE (1<<7) 629#define A2_SRC2_CHANNEL_Z_SHIFT 4 630#define A2_SRC2_CHANNEL_W_NEGATE (1<<3) 631#define A2_SRC2_CHANNEL_W_SHIFT 0 632 633 634 635/* Texture instructions */ 636#define T0_TEXLD (0x15<<24) /* Sample texture using predeclared 637 * sampler and address, and output 638 * filtered texel data to destination 639 * register */ 640#define T0_TEXLDP (0x16<<24) /* Same as texld but performs a 641 * perspective divide of the texture 642 * coordinate .xyz values by .w before 643 * sampling. */ 644#define T0_TEXLDB (0x17<<24) /* Same as texld but biases the 645 * computed LOD by w. Only S4.6 two's 646 * comp is used. This implies that a 647 * float to fixed conversion is 648 * done. */ 649#define T0_TEXKILL (0x18<<24) /* Does not perform a sampling 650 * operation. Simply kills the pixel 651 * if any channel of the address 652 * register is < 0.0. */ 653#define T0_DEST_TYPE_SHIFT 19 654/* Allow: R, OC, OD, U */ 655/* Note: U (unpreserved) regs do not retain their values between 656 * phases (cannot be used for feedback) 657 * 658 * Note: oC and OD registers can only be used as the destination of a 659 * texture instruction once per phase (this is an implementation 660 * restriction). 661 */ 662#define T0_DEST_NR_SHIFT 14 663/* Allow R: 0..15, OC,OD: 0..0, U: 0..2 */ 664#define T0_SAMPLER_NR_SHIFT 0 /* This field ignored for TEXKILL */ 665#define T0_SAMPLER_NR_MASK (0xf<<0) 666 667#define T1_ADDRESS_REG_TYPE_SHIFT 24 /* Reg to use as texture coord */ 668/* Allow R, T, OC, OD -- R, OC, OD are 'dependent' reads, new program phase */ 669#define T1_ADDRESS_REG_NR_SHIFT 17 670#define T2_MBZ 0 671 672/* Declaration instructions */ 673#define D0_DCL (0x19<<24) /* Declare a t (interpolated attrib) 674 * register or an s (sampler) 675 * register. */ 676#define D0_SAMPLE_TYPE_SHIFT 22 677#define D0_SAMPLE_TYPE_2D (0x0<<22) 678#define D0_SAMPLE_TYPE_CUBE (0x1<<22) 679#define D0_SAMPLE_TYPE_VOLUME (0x2<<22) 680#define D0_SAMPLE_TYPE_MASK (0x3<<22) 681 682#define D0_TYPE_SHIFT 19 683/* Allow: T, S */ 684#define D0_NR_SHIFT 14 685/* Allow T: 0..10, S: 0..15 */ 686#define D0_CHANNEL_X (1<<10) 687#define D0_CHANNEL_Y (2<<10) 688#define D0_CHANNEL_Z (4<<10) 689#define D0_CHANNEL_W (8<<10) 690#define D0_CHANNEL_ALL (0xf<<10) 691#define D0_CHANNEL_NONE (0<<10) 692 693#define D0_CHANNEL_XY (D0_CHANNEL_X|D0_CHANNEL_Y) 694#define D0_CHANNEL_XYZ (D0_CHANNEL_XY|D0_CHANNEL_Z) 695 696/* I915 Errata: Do not allow (xz), (xw), (xzw) combinations for diffuse 697 * or specular declarations. 698 * 699 * For T dcls, only allow: (x), (xy), (xyz), (w), (xyzw) 700 * 701 * Must be zero for S (sampler) dcls 702 */ 703#define D1_MBZ 0 704#define D2_MBZ 0 705 706 707 708/* p207. 709 * The DWORD count is 3 times the number of bits set in MS1_MAPMASK_MASK 710 */ 711#define _3DSTATE_MAP_STATE (CMD_3D|(0x1d<<24)|(0x0<<16)) 712 713#define MS1_MAPMASK_SHIFT 0 714#define MS1_MAPMASK_MASK (0x8fff<<0) 715 716#define MS2_UNTRUSTED_SURFACE (1<<31) 717#define MS2_ADDRESS_MASK 0xfffffffc 718#define MS2_VERTICAL_LINE_STRIDE (1<<1) 719#define MS2_VERTICAL_OFFSET (1<<1) 720 721#define MS3_HEIGHT_SHIFT 21 722#define MS3_WIDTH_SHIFT 10 723#define MS3_PALETTE_SELECT (1<<9) 724#define MS3_MAPSURF_FORMAT_SHIFT 7 725#define MS3_MAPSURF_FORMAT_MASK (0x7<<7) 726#define MAPSURF_8BIT (1<<7) 727#define MAPSURF_16BIT (2<<7) 728#define MAPSURF_32BIT (3<<7) 729#define MAPSURF_422 (5<<7) 730#define MAPSURF_COMPRESSED (6<<7) 731#define MAPSURF_4BIT_INDEXED (7<<7) 732#define MS3_MT_FORMAT_MASK (0x7 << 3) 733#define MS3_MT_FORMAT_SHIFT 3 734#define MT_4BIT_IDX_ARGB8888 (7<<3) /* SURFACE_4BIT_INDEXED */ 735#define MT_8BIT_I8 (0<<3) /* SURFACE_8BIT */ 736#define MT_8BIT_L8 (1<<3) 737#define MT_8BIT_A8 (4<<3) 738#define MT_8BIT_MONO8 (5<<3) 739#define MT_16BIT_RGB565 (0<<3) /* SURFACE_16BIT */ 740#define MT_16BIT_ARGB1555 (1<<3) 741#define MT_16BIT_ARGB4444 (2<<3) 742#define MT_16BIT_AY88 (3<<3) 743#define MT_16BIT_88DVDU (5<<3) 744#define MT_16BIT_BUMP_655LDVDU (6<<3) 745#define MT_16BIT_I16 (7<<3) 746#define MT_16BIT_L16 (8<<3) 747#define MT_16BIT_A16 (9<<3) 748#define MT_32BIT_ARGB8888 (0<<3) /* SURFACE_32BIT */ 749#define MT_32BIT_ABGR8888 (1<<3) 750#define MT_32BIT_XRGB8888 (2<<3) 751#define MT_32BIT_XBGR8888 (3<<3) 752#define MT_32BIT_QWVU8888 (4<<3) 753#define MT_32BIT_AXVU8888 (5<<3) 754#define MT_32BIT_LXVU8888 (6<<3) 755#define MT_32BIT_XLVU8888 (7<<3) 756#define MT_32BIT_ARGB2101010 (8<<3) 757#define MT_32BIT_ABGR2101010 (9<<3) 758#define MT_32BIT_AWVU2101010 (0xA<<3) 759#define MT_32BIT_GR1616 (0xB<<3) 760#define MT_32BIT_VU1616 (0xC<<3) 761#define MT_32BIT_xI824 (0xD<<3) 762#define MT_32BIT_xA824 (0xE<<3) 763#define MT_32BIT_xL824 (0xF<<3) 764#define MT_422_YCRCB_SWAPY (0<<3) /* SURFACE_422 */ 765#define MT_422_YCRCB_NORMAL (1<<3) 766#define MT_422_YCRCB_SWAPUV (2<<3) 767#define MT_422_YCRCB_SWAPUVY (3<<3) 768#define MT_COMPRESS_DXT1 (0<<3) /* SURFACE_COMPRESSED */ 769#define MT_COMPRESS_DXT2_3 (1<<3) 770#define MT_COMPRESS_DXT4_5 (2<<3) 771#define MT_COMPRESS_FXT1 (3<<3) 772#define MT_COMPRESS_DXT1_RGB (4<<3) 773#define MS3_USE_FENCE_REGS (1<<2) 774#define MS3_TILED_SURFACE (1<<1) 775#define MS3_TILE_WALK (1<<0) 776 777/* The pitch is the pitch measured in DWORDS, minus 1 */ 778#define MS4_PITCH_SHIFT 21 779#define MS4_CUBE_FACE_ENA_NEGX (1<<20) 780#define MS4_CUBE_FACE_ENA_POSX (1<<19) 781#define MS4_CUBE_FACE_ENA_NEGY (1<<18) 782#define MS4_CUBE_FACE_ENA_POSY (1<<17) 783#define MS4_CUBE_FACE_ENA_NEGZ (1<<16) 784#define MS4_CUBE_FACE_ENA_POSZ (1<<15) 785#define MS4_CUBE_FACE_ENA_MASK (0x3f<<15) 786#define MS4_MAX_LOD_SHIFT 9 787#define MS4_MAX_LOD_MASK (0x3f<<9) 788#define MS4_MIP_LAYOUT_LEGACY (0<<8) 789#define MS4_MIP_LAYOUT_BELOW_LPT (0<<8) 790#define MS4_MIP_LAYOUT_RIGHT_LPT (1<<8) 791#define MS4_VOLUME_DEPTH_SHIFT 0 792#define MS4_VOLUME_DEPTH_MASK (0xff<<0) 793 794/* p244. 795 * The DWORD count is 3 times the number of bits set in SS1_MAPMASK_MASK. 796 */ 797#define _3DSTATE_SAMPLER_STATE (CMD_3D|(0x1d<<24)|(0x1<<16)) 798 799#define SS1_MAPMASK_SHIFT 0 800#define SS1_MAPMASK_MASK (0x8fff<<0) 801 802#define SS2_REVERSE_GAMMA_ENABLE (1<<31) 803#define SS2_PACKED_TO_PLANAR_ENABLE (1<<30) 804#define SS2_COLORSPACE_CONVERSION (1<<29) 805#define SS2_CHROMAKEY_SHIFT 27 806#define SS2_BASE_MIP_LEVEL_SHIFT 22 807#define SS2_BASE_MIP_LEVEL_MASK (0x1f<<22) 808#define SS2_MIP_FILTER_SHIFT 20 809#define SS2_MIP_FILTER_MASK (0x3<<20) 810#define MIPFILTER_NONE 0 811#define MIPFILTER_NEAREST 1 812#define MIPFILTER_LINEAR 3 813#define SS2_MAG_FILTER_SHIFT 17 814#define SS2_MAG_FILTER_MASK (0x7<<17) 815#define FILTER_NEAREST 0 816#define FILTER_LINEAR 1 817#define FILTER_ANISOTROPIC 2 818#define FILTER_4X4_1 3 819#define FILTER_4X4_2 4 820#define FILTER_4X4_FLAT 5 821#define FILTER_6X5_MONO 6 /* XXX - check */ 822#define SS2_MIN_FILTER_SHIFT 14 823#define SS2_MIN_FILTER_MASK (0x7<<14) 824#define SS2_LOD_BIAS_SHIFT 5 825#define SS2_LOD_BIAS_ONE (0x10<<5) 826#define SS2_LOD_BIAS_MASK (0x1ff<<5) 827/* Shadow requires: 828 * MT_X8{I,L,A}24 or MT_{I,L,A}16 texture format 829 * FILTER_4X4_x MIN and MAG filters 830 */ 831#define SS2_SHADOW_ENABLE (1<<4) 832#define SS2_MAX_ANISO_MASK (1<<3) 833#define SS2_MAX_ANISO_2 (0<<3) 834#define SS2_MAX_ANISO_4 (1<<3) 835#define SS2_SHADOW_FUNC_SHIFT 0 836#define SS2_SHADOW_FUNC_MASK (0x7<<0) 837/* SS2_SHADOW_FUNC values: see COMPAREFUNC_* */ 838 839#define SS3_MIN_LOD_SHIFT 24 840#define SS3_MIN_LOD_ONE (0x10<<24) 841#define SS3_MIN_LOD_MASK (0xff<<24) 842#define SS3_KILL_PIXEL_ENABLE (1<<17) 843#define SS3_TCX_ADDR_MODE_SHIFT 12 844#define SS3_TCX_ADDR_MODE_MASK (0x7<<12) 845#define TEXCOORDMODE_WRAP 0 846#define TEXCOORDMODE_MIRROR 1 847#define TEXCOORDMODE_CLAMP_EDGE 2 848#define TEXCOORDMODE_CUBE 3 849#define TEXCOORDMODE_CLAMP_BORDER 4 850#define TEXCOORDMODE_MIRROR_ONCE 5 851#define SS3_TCY_ADDR_MODE_SHIFT 9 852#define SS3_TCY_ADDR_MODE_MASK (0x7<<9) 853#define SS3_TCZ_ADDR_MODE_SHIFT 6 854#define SS3_TCZ_ADDR_MODE_MASK (0x7<<6) 855#define SS3_NORMALIZED_COORDS (1<<5) 856#define SS3_TEXTUREMAP_INDEX_SHIFT 1 857#define SS3_TEXTUREMAP_INDEX_MASK (0xf<<1) 858#define SS3_DEINTERLACER_ENABLE (1<<0) 859 860#define SS4_BORDER_COLOR_MASK (~0) 861 862/* 3DSTATE_SPAN_STIPPLE, p258 863 */ 864#define _3DSTATE_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) 865#define ST1_ENABLE (1<<16) 866#define ST1_MASK (0xffff) 867 868 869#define FLUSH_MAP_CACHE (1<<0) 870#define FLUSH_RENDER_CACHE (1<<1) 871 872 873#endif 874