103b705cfSriastradh/*************************************************************************** 203b705cfSriastradh 303b705cfSriastradhCopyright 2001 Intel Corporation. All Rights Reserved. 403b705cfSriastradh 503b705cfSriastradhPermission is hereby granted, free of charge, to any person obtaining a 603b705cfSriastradhcopy of this software and associated documentation files (the 703b705cfSriastradh"Software"), to deal in the Software without restriction, including 803b705cfSriastradhwithout limitation the rights to use, copy, modify, merge, publish, 903b705cfSriastradhdistribute, sub license, and/or sell copies of the Software, and to 1003b705cfSriastradhpermit persons to whom the Software is furnished to do so, subject to 1103b705cfSriastradhthe following conditions: 1203b705cfSriastradh 1303b705cfSriastradhThe above copyright notice and this permission notice (including the 1403b705cfSriastradhnext paragraph) shall be included in all copies or substantial portions 1503b705cfSriastradhof the Software. 1603b705cfSriastradh 1703b705cfSriastradhTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 1803b705cfSriastradhOR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 1903b705cfSriastradhMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 2003b705cfSriastradhIN NO EVENT SHALL INTEL, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 2103b705cfSriastradhDAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 2203b705cfSriastradhOTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR 2303b705cfSriastradhTHE USE OR OTHER DEALINGS IN THE SOFTWARE. 2403b705cfSriastradh 2503b705cfSriastradh**************************************************************************/ 2603b705cfSriastradh 2703b705cfSriastradh/*************************************************************************** 2803b705cfSriastradh * libI810XvMC.h: MC Driver i810 includes 2903b705cfSriastradh * 3003b705cfSriastradh * Authors: 3103b705cfSriastradh * Matt Sottek <matthew.j.sottek@intel.com> 3203b705cfSriastradh * 3303b705cfSriastradh * 3403b705cfSriastradh ***************************************************************************/ 3503b705cfSriastradh 3603b705cfSriastradh 3703b705cfSriastradh#ifndef I810XVMC_H 3803b705cfSriastradh#define I810XVMC_H 3903b705cfSriastradh 4003b705cfSriastradh/* #define XVMC_DEBUG(x) do {x; }while(0); */ 4103b705cfSriastradh#define XVMC_DEBUG(x) 4203b705cfSriastradh 4303b705cfSriastradh#include <stdint.h> 4403b705cfSriastradh#include "xf86drm.h" 4503b705cfSriastradh#include "../i810_common.h" 4603b705cfSriastradh#include <X11/Xlibint.h> 4703b705cfSriastradh 4803b705cfSriastradh 4903b705cfSriastradh/*************************************************************************** 5003b705cfSriastradh// i810OverlayRec: Structure that is used to reference the overlay 5103b705cfSriastradh// register memory. A i810OverlayRecPtr is set to the address of the 5203b705cfSriastradh// allocated overlay registers. 5303b705cfSriastradh***************************************************************************/ 5403b705cfSriastradhtypedef struct _i810OverlayRec { 5503b705cfSriastradh unsigned int OBUF_0Y; 5603b705cfSriastradh unsigned int OBUF_1Y; 5703b705cfSriastradh unsigned int OBUF_0U; 5803b705cfSriastradh unsigned int OBUF_0V; 5903b705cfSriastradh unsigned int OBUF_1U; 6003b705cfSriastradh unsigned int OBUF_1V; 6103b705cfSriastradh unsigned int OV0STRIDE; 6203b705cfSriastradh unsigned int YRGB_VPH; 6303b705cfSriastradh unsigned int UV_VPH; 6403b705cfSriastradh unsigned int HORZ_PH; 6503b705cfSriastradh unsigned int INIT_PH; 6603b705cfSriastradh unsigned int DWINPOS; 6703b705cfSriastradh unsigned int DWINSZ; 6803b705cfSriastradh unsigned int SWID; 6903b705cfSriastradh unsigned int SWIDQW; 7003b705cfSriastradh unsigned int SHEIGHT; 7103b705cfSriastradh unsigned int YRGBSCALE; 7203b705cfSriastradh unsigned int UVSCALE; 7303b705cfSriastradh unsigned int OV0CLRC0; 7403b705cfSriastradh unsigned int OV0CLRC1; 7503b705cfSriastradh unsigned int DCLRKV; 7603b705cfSriastradh unsigned int DCLRKM; 7703b705cfSriastradh unsigned int SCLRKVH; 7803b705cfSriastradh unsigned int SCLRKVL; 7903b705cfSriastradh unsigned int SCLRKM; 8003b705cfSriastradh unsigned int OV0CONF; 8103b705cfSriastradh unsigned int OV0CMD; 8203b705cfSriastradh} i810OverlayRec, *i810OverlayRecPtr; 8303b705cfSriastradh 8403b705cfSriastradh 8503b705cfSriastradh/*************************************************************************** 8603b705cfSriastradh// i810XvMCDrmMap: Holds the data about the DRM maps 8703b705cfSriastradh***************************************************************************/ 8803b705cfSriastradhtypedef struct _i810XvMCDrmMap { 8903b705cfSriastradh drm_handle_t offset; 9003b705cfSriastradh drmAddress address; 9103b705cfSriastradh unsigned int size; 9203b705cfSriastradh} i810XvMCDrmMap, *i810XvMCDrmMapPtr; 9303b705cfSriastradh 9403b705cfSriastradh/*************************************************************************** 9503b705cfSriastradh// i810XvMCContext: Private Context data referenced via the privData 9603b705cfSriastradh// pointer in the XvMCContext structure. 9703b705cfSriastradh***************************************************************************/ 9803b705cfSriastradhtypedef struct _i810XvMCContext { 9903b705cfSriastradh int fd; /* File descriptor for /dev/dri */ 10003b705cfSriastradh i810XvMCDrmMap overlay; 10103b705cfSriastradh i810XvMCDrmMap surfaces; 10203b705cfSriastradh drmBufMapPtr dmabufs; /* Data structure to hold available dma buffers */ 10303b705cfSriastradh drm_context_t drmcontext; 10403b705cfSriastradh unsigned int last_render; 10503b705cfSriastradh unsigned int last_flip; 10603b705cfSriastradh unsigned short ref; 10703b705cfSriastradh unsigned short current; 10803b705cfSriastradh int lock; /* Lightweight lock to avoid locking twice */ 10903b705cfSriastradh char busIdString[10]; /* PCI:0:1:0 or PCI:0:2:0 */ 11003b705cfSriastradh i810OverlayRecPtr oregs; 11103b705cfSriastradh unsigned int dual_prime; /* Flag to identify when dual prime is in use. */ 11203b705cfSriastradh unsigned int fb_base; 11303b705cfSriastradh Atom xv_colorkey; 11403b705cfSriastradh Atom xv_brightness; 11503b705cfSriastradh Atom xv_contrast; 11603b705cfSriastradh Atom xv_saturation; 11703b705cfSriastradh int brightness; 11803b705cfSriastradh int saturation; 11903b705cfSriastradh int contrast; 12003b705cfSriastradh int colorkey; 12103b705cfSriastradh} i810XvMCContext; 12203b705cfSriastradh 12303b705cfSriastradh/*************************************************************************** 12403b705cfSriastradh// i810XvMCSurface: Private data structure for each XvMCSurface. This 12503b705cfSriastradh// structure is referenced by the privData pointer in the XvMCSurface 12603b705cfSriastradh// structure. 12703b705cfSriastradh***************************************************************************/ 12803b705cfSriastradhtypedef struct _i810XvMCSurface { 12903b705cfSriastradh unsigned int pitch; 13003b705cfSriastradh unsigned int dbi1y; /* Destination buffer info command word 1 for Y */ 13103b705cfSriastradh unsigned int dbi1u; /* Destination buffer info command word 1 for U */ 13203b705cfSriastradh unsigned int dbi1v; /* Destination buffer info command word 1 for V */ 13303b705cfSriastradh unsigned int dbv1; /* Destination buffer variables command word 1 */ 13403b705cfSriastradh unsigned int mi1y; /* Map Info command word 1 (Minus bit 28) for Y */ 13503b705cfSriastradh unsigned int mi1u; /* Map Info command word 1 (Minus bit 28) for U */ 13603b705cfSriastradh unsigned int mi1v; /* Map Info command word 1 (Minus bit 28) for V */ 13703b705cfSriastradh unsigned int mi2y; /* Map info command word 2 for y */ 13803b705cfSriastradh unsigned int mi2u; /* Map info command word 2 for y */ 13903b705cfSriastradh unsigned int mi2v; /* Map info command word 2 for y */ 14003b705cfSriastradh unsigned int mi3y; /* Map info command word 3 */ 14103b705cfSriastradh unsigned int mi3u; /* Map info command word 3 */ 14203b705cfSriastradh unsigned int mi3v; /* Map info command word 3 */ 14303b705cfSriastradh unsigned int last_render; 14403b705cfSriastradh unsigned int last_flip; 14503b705cfSriastradh unsigned int second_field; /* Flags a surface that is only half done */ 14603b705cfSriastradh drmAddress data; 14703b705cfSriastradh drm_handle_t offset; 14803b705cfSriastradh unsigned int offsets[3]; 14903b705cfSriastradh i810XvMCContext *privContext; 15003b705cfSriastradh} i810XvMCSurface; 15103b705cfSriastradh 15203b705cfSriastradh/*************************************************************************** 15303b705cfSriastradh// i810XvMCSubpicture: Private data structure for each XvMCSubpicture. This 15403b705cfSriastradh// structure is referenced by the privData pointer in the XvMCSubpicture 15503b705cfSriastradh// structure. 15603b705cfSriastradh***************************************************************************/ 15703b705cfSriastradhtypedef struct _i810XvMCSubpicture { 15803b705cfSriastradh unsigned int pitch; 15903b705cfSriastradh unsigned int dbi1; /* Destination buffer info command word 1 */ 16003b705cfSriastradh unsigned int dbv1; /* Destination buffer variables command word */ 16103b705cfSriastradh unsigned int mi1; /* Map Info command word 1 (Minus bit 28) */ 16203b705cfSriastradh unsigned int mi2; /* Map info command word 2 */ 16303b705cfSriastradh unsigned int mi3; /* Map info command word 3 */ 16403b705cfSriastradh unsigned int last_render; 16503b705cfSriastradh unsigned int last_flip; 16603b705cfSriastradh drmAddress data; 16703b705cfSriastradh drm_handle_t offset; 16803b705cfSriastradh unsigned int offsets[1]; 16903b705cfSriastradh unsigned char palette[3][16]; 17003b705cfSriastradh i810XvMCContext *privContext; 17103b705cfSriastradh} i810XvMCSubpicture; 17203b705cfSriastradh 17303b705cfSriastradhtypedef struct _Box { 17403b705cfSriastradh int x1,y1,x2,y2; 17503b705cfSriastradh} Box, *BoxPtr; 17603b705cfSriastradh 17703b705cfSriastradh/*************************************************************************** 17803b705cfSriastradh// drm_i810_overlay_t: Structure returned by overlay info ioctl. 17903b705cfSriastradh// NOTE: If you change this structure you will have to change the equiv. 18003b705cfSriastradh// structure in the kernel. 18103b705cfSriastradh***************************************************************************/ 18203b705cfSriastradhtypedef struct _drm_i810_overlay_t { 18303b705cfSriastradh unsigned int offset; 18403b705cfSriastradh unsigned int physical; 18503b705cfSriastradh} drm_i810_overlay_t; 18603b705cfSriastradh 18703b705cfSriastradh/*************************************************************************** 18803b705cfSriastradh// drm_i810_dma_t: Structure used by dma allocation ioctl. 18903b705cfSriastradh// NOTE: If you change this structure you will have to change the equiv. 19003b705cfSriastradh// structure in the kernel. 19103b705cfSriastradh***************************************************************************/ 19203b705cfSriastradhtypedef struct _drm_i810_dma { 19303b705cfSriastradh void *virtual; 19403b705cfSriastradh int request_idx; 19503b705cfSriastradh int request_size; 19603b705cfSriastradh int granted; 19703b705cfSriastradh} drm_i810_dma_t; 19803b705cfSriastradh 19903b705cfSriastradh/*************************************************************************** 20003b705cfSriastradh// drm_i810_mc_t: Structure used by mc dispatch ioctl. 20103b705cfSriastradh// NOTE: If you change this structure you will have to change the equiv. 20203b705cfSriastradh// structure in the kernel. 20303b705cfSriastradh***************************************************************************/ 20403b705cfSriastradhtypedef struct _drm_i810_mc { 20503b705cfSriastradh int idx; /* buffer index */ 20603b705cfSriastradh int used; /* nr bytes in use */ 20703b705cfSriastradh int num_blocks; /* number of GFXBlocks */ 20803b705cfSriastradh int *length; /* List of lengths for GFXBlocks */ 20903b705cfSriastradh unsigned int last_render; /* Last render request */ 21003b705cfSriastradh} drm_i810_mc_t; 21103b705cfSriastradh 21203b705cfSriastradh/* Subpicture fourcc */ 21303b705cfSriastradh#define FOURCC_IA44 0x34344149 21403b705cfSriastradh 21503b705cfSriastradh/* Static Parameters */ 21603b705cfSriastradh#define I810_XVMC_MAXWIDTH 720 21703b705cfSriastradh#define I810_XVMC_MAXHEIGHT 576 21803b705cfSriastradh#define I810_DEFAULT16_COLORKEY 31 21903b705cfSriastradh#define I810_DMA_BUF_NR 256 22003b705cfSriastradh 22103b705cfSriastradh/* COMMANDS */ 22203b705cfSriastradh#define CMD_FLUSH ((4<<23) | 0x1) 22303b705cfSriastradh#define BOOLEAN_ENA_1 ((3<<29) | (3<<24) | (3<<2)) 22403b705cfSriastradh#define BOOLEAN_ENA_2 ((3<<29) | (4<<24) | (3<<16) | (1<<3) | (1<<2)) 22503b705cfSriastradh#define DEST_BUFFER_INFO (0x15<<23) 22603b705cfSriastradh#define DEST_BUFFER_VAR ((0x3<<29) | (0x1d<<24) | (0x85<<16)) 22703b705cfSriastradh#define DRAWING_RECT_INFO ((3<<29) | (0x1d<<24) | (0x80<<16) | 3) 22803b705cfSriastradh#define GFXBLOCK ((0x3<<29) | (0x1e<<24)) 22903b705cfSriastradh#define CMD_MAP_INFO ((0x3<<29) | (0x1d<<24) | 0x2) 23003b705cfSriastradh#define MAP_PALETTE_LOAD ((3<<29) | (0x1d<<24) | (0x82<<16) | 0xff) 23103b705cfSriastradh#define VERTEX_FORMAT ((3<<29) | (0x5<<24)) 23203b705cfSriastradh#define SRC_DEST_BLEND_MONO ((3<<29) | (8<<24)) 23303b705cfSriastradh 23403b705cfSriastradh/* Bit Patterns */ 23503b705cfSriastradh 23603b705cfSriastradh/* 23703b705cfSriastradh * OV0CMD - Overlay Command Register 23803b705cfSriastradh */ 23903b705cfSriastradh#define VERTICAL_CHROMINANCE_FILTER 0x70000000 24003b705cfSriastradh#define VC_SCALING_OFF 0x00000000 24103b705cfSriastradh#define VC_LINE_REPLICATION 0x10000000 24203b705cfSriastradh#define VC_UP_INTERPOLATION 0x20000000 24303b705cfSriastradh#define VC_PIXEL_DROPPING 0x50000000 24403b705cfSriastradh#define VC_DOWN_INTERPOLATION 0x60000000 24503b705cfSriastradh#define VERTICAL_LUMINANCE_FILTER 0x0E000000 24603b705cfSriastradh#define VL_SCALING_OFF 0x00000000 24703b705cfSriastradh#define VL_LINE_REPLICATION 0x02000000 24803b705cfSriastradh#define VL_UP_INTERPOLATION 0x04000000 24903b705cfSriastradh#define VL_PIXEL_DROPPING 0x0A000000 25003b705cfSriastradh#define VL_DOWN_INTERPOLATION 0x0C000000 25103b705cfSriastradh#define HORIZONTAL_CHROMINANCE_FILTER 0x01C00000 25203b705cfSriastradh#define HC_SCALING_OFF 0x00000000 25303b705cfSriastradh#define HC_LINE_REPLICATION 0x00400000 25403b705cfSriastradh#define HC_UP_INTERPOLATION 0x00800000 25503b705cfSriastradh#define HC_PIXEL_DROPPING 0x01400000 25603b705cfSriastradh#define HC_DOWN_INTERPOLATION 0x01800000 25703b705cfSriastradh#define HORIZONTAL_LUMINANCE_FILTER 0x00380000 25803b705cfSriastradh#define HL_SCALING_OFF 0x00000000 25903b705cfSriastradh#define HL_LINE_REPLICATION 0x00080000 26003b705cfSriastradh#define HL_UP_INTERPOLATION 0x00100000 26103b705cfSriastradh#define HL_PIXEL_DROPPING 0x00280000 26203b705cfSriastradh#define HL_DOWN_INTERPOLATION 0x00300000 26303b705cfSriastradh 26403b705cfSriastradh#define Y_ADJUST 0x00010000 26503b705cfSriastradh#define OV_BYTE_ORDER 0x0000C000 26603b705cfSriastradh#define UV_SWAP 0x00004000 26703b705cfSriastradh#define Y_SWAP 0x00008000 26803b705cfSriastradh#define Y_AND_UV_SWAP 0x0000C000 26903b705cfSriastradh#define SOURCE_FORMAT 0x00003C00 27003b705cfSriastradh#define RGB_555 0x00000800 27103b705cfSriastradh#define RGB_565 0x00000C00 27203b705cfSriastradh#define YUV_422 0x00002000 27303b705cfSriastradh#define YUV_411 0x00002400 27403b705cfSriastradh#define YUV_420 0x00003000 27503b705cfSriastradh#define YUV_410 0x00003800 27603b705cfSriastradh#define VERTICAL_PHASE_BOTH 0x00000020 27703b705cfSriastradh#define FLIP_TYPE_FIELD 0x00000020 27803b705cfSriastradh#define FLIP_TYPE_FRAME 0x00000000 27903b705cfSriastradh#define BUFFER_AND_FIELD 0x00000006 28003b705cfSriastradh#define BUFFER0_FIELD0 0x00000000 28103b705cfSriastradh#define BUFFER0_FIELD1 0x00000002 28203b705cfSriastradh#define BUFFER1_FIELD0 0x00000004 28303b705cfSriastradh#define BUFFER1_FIELD1 0x00000006 28403b705cfSriastradh#define OVERLAY_ENABLE 0x00000001 28503b705cfSriastradh 28603b705cfSriastradh/* 28703b705cfSriastradh * DOV0STA - Display/Overlay 0 Status Register 28803b705cfSriastradh */ 28903b705cfSriastradh#define DOV0STA 0x30008 29003b705cfSriastradh#define OV0ADD 0x30000 29103b705cfSriastradh#define MINUV_SCALE 0x1 29203b705cfSriastradh 29303b705cfSriastradh#define RGB16ToColorKey(c) \ 29403b705cfSriastradh (((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3)) 29503b705cfSriastradh 29603b705cfSriastradh/* Locking Macros lightweight lock used to prevent relocking */ 29703b705cfSriastradh#define I810_LOCK(c,f) \ 29803b705cfSriastradh if(!c->lock) { \ 29903b705cfSriastradh drmGetLock(c->fd, c->drmcontext, f); \ 30003b705cfSriastradh } \ 30103b705cfSriastradh c->lock++; 30203b705cfSriastradh 30303b705cfSriastradh#define I810_UNLOCK(c) \ 30403b705cfSriastradh c->lock--; \ 30503b705cfSriastradh if(!c->lock) { \ 30603b705cfSriastradh drmUnlock(c->fd, c->drmcontext); \ 30703b705cfSriastradh } 30803b705cfSriastradh 30903b705cfSriastradh/* 31003b705cfSriastradh Block until the passed in value (n) is the active 31103b705cfSriastradh buffer on the overlay. 31203b705cfSriastradh*/ 31303b705cfSriastradh#define BLOCK_OVERLAY(c,n) \ 31403b705cfSriastradh do { \ 31503b705cfSriastradh int temp,i=0; \ 31603b705cfSriastradh while(i < 100000) { \ 31703b705cfSriastradh temp = GET_FSTATUS(c); \ 31803b705cfSriastradh if(((temp & (1<<20))>>20) == n) { \ 31903b705cfSriastradh break; \ 32003b705cfSriastradh } \ 32103b705cfSriastradh usleep(10); \ 32203b705cfSriastradh } \ 32303b705cfSriastradh if(i == 100000) { \ 32403b705cfSriastradh printf("Overlay Lockup.\n"); \ 32503b705cfSriastradh return BadAlloc; \ 32603b705cfSriastradh } \ 32703b705cfSriastradh }while(0); 32803b705cfSriastradh 32903b705cfSriastradh#define OVERLAY_INFO(c,i) drmCommandRead(c->fd, DRM_I810_OV0INFO, &i, sizeof(i)) 33003b705cfSriastradh#define OVERLAY_FLIP(c) drmCommandNone(c->fd, DRM_I810_OV0FLIP) 33103b705cfSriastradh#define GET_FSTATUS(c) drmCommandNone(c->fd, DRM_I810_FSTATUS) 33203b705cfSriastradh#define I810_MC(c,mc) drmCommandWrite(c->fd, DRM_I810_MC, &mc, sizeof(mc)) 33303b705cfSriastradh#define GET_RSTATUS(c) drmCommandNone(c->fd, DRM_I810_RSTATUS) 33403b705cfSriastradh#define GET_BUFFER(c,dma) drmCommandWriteRead(c->fd, DRM_I810_GETBUF, &dma, sizeof(drmI810DMA)) 33503b705cfSriastradh#define FLUSH(c) drmCommandNone(c->fd, DRM_I810_FLUSH) 33603b705cfSriastradh 33703b705cfSriastradh/* 33803b705cfSriastradh Definitions for temporary wire protocol hooks to be replaced 33903b705cfSriastradh when a HW independent libXvMC is created. 34003b705cfSriastradh*/ 34103b705cfSriastradhextern Status _xvmc_create_context(Display *dpy, XvMCContext *context, 34203b705cfSriastradh int *priv_count, uint **priv_data); 34303b705cfSriastradh 34403b705cfSriastradhextern Status _xvmc_destroy_context(Display *dpy, XvMCContext *context); 34503b705cfSriastradh 34603b705cfSriastradhextern Status _xvmc_create_surface(Display *dpy, XvMCContext *context, 34703b705cfSriastradh XvMCSurface *surface, int *priv_count, 34803b705cfSriastradh uint **priv_data); 34903b705cfSriastradh 35003b705cfSriastradhextern Status _xvmc_destroy_surface(Display *dpy, XvMCSurface *surface); 35103b705cfSriastradh 35203b705cfSriastradhextern Status _xvmc_create_subpicture(Display *dpy, XvMCContext *context, 35303b705cfSriastradh XvMCSubpicture *subpicture, 35403b705cfSriastradh int *priv_count, uint **priv_data); 35503b705cfSriastradh 35603b705cfSriastradhextern Status _xvmc_destroy_subpicture(Display *dpy, 35703b705cfSriastradh XvMCSubpicture *subpicture); 35803b705cfSriastradh 35903b705cfSriastradh/* 36003b705cfSriastradh Prototypes 36103b705cfSriastradh*/ 36203b705cfSriastradhdrmBufPtr i810_get_free_buffer(i810XvMCContext *pI810XvMC); 36303b705cfSriastradhvoid i810_free_privContext(i810XvMCContext *pI810XvMC); 36403b705cfSriastradhvoid dp(unsigned int *address, unsigned int i); 36503b705cfSriastradh 36603b705cfSriastradh#endif 367