1/* 2 * Copyright (c) 2013 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Chris Wilson <chris@chris-wilson.co.uk> 25 * 26 */ 27 28/* Small wrapper around compiler specific implementation details of cpuid */ 29 30#ifndef SNA_CPUID_H 31#define SNA_CPUID_H 32 33#ifdef HAVE_CPUID_H 34#include <cpuid.h> 35#else 36#define __get_cpuid_max(x, y) 0 37#define __cpuid(level, a, b, c, d) a = b = c = d = 0 38#define __cpuid_count(level, count, a, b, c, d) a = b = c = d = 0 39#endif 40 41#define BASIC_CPUID 0x0 42#define EXTENDED_CPUID 0x80000000 43 44#ifndef bit_MMX 45#define bit_MMX (1 << 23) 46#endif 47 48#ifndef bit_SSE 49#define bit_SSE (1 << 25) 50#endif 51 52#ifndef bit_SSE2 53#define bit_SSE2 (1 << 26) 54#endif 55 56#ifndef bit_SSE3 57#define bit_SSE3 (1 << 0) 58#endif 59 60#ifndef bit_SSSE3 61#define bit_SSSE3 (1 << 9) 62#endif 63 64#ifndef bit_SSE4_1 65#define bit_SSE4_1 (1 << 19) 66#endif 67 68#ifndef bit_SSE4_2 69#define bit_SSE4_2 (1 << 20) 70#endif 71 72#ifndef bit_OSXSAVE 73#define bit_OSXSAVE (1 << 27) 74#endif 75 76#ifndef bit_AVX 77#define bit_AVX (1 << 28) 78#endif 79 80#ifndef bit_AVX2 81#define bit_AVX2 (1<<5) 82#endif 83 84#endif /* SNA_CPUID_H */ 85