i830_3d.c revision 03b705cf
1/************************************************************************** 2 * 3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28#ifdef HAVE_CONFIG_H 29#include "config.h" 30#endif 31 32#include "xf86.h" 33#include "intel.h" 34 35#include "i830_reg.h" 36 37void I830EmitInvarientState(ScrnInfoPtr scrn) 38{ 39 intel_screen_private *intel = intel_get_screen_private(scrn); 40 41 assert(intel->in_batch_atomic); 42 43 OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(0)); 44 OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(1)); 45 OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(2)); 46 OUT_BATCH(_3DSTATE_MAP_CUBE | MAP_UNIT(3)); 47 48 OUT_BATCH(_3DSTATE_DFLT_DIFFUSE_CMD); 49 OUT_BATCH(0); 50 51 OUT_BATCH(_3DSTATE_DFLT_SPEC_CMD); 52 OUT_BATCH(0); 53 54 OUT_BATCH(_3DSTATE_DFLT_Z_CMD); 55 OUT_BATCH(0); 56 57 OUT_BATCH(_3DSTATE_FOG_MODE_CMD); 58 OUT_BATCH(FOGFUNC_ENABLE | 59 FOG_LINEAR_CONST | FOGSRC_INDEX_Z | ENABLE_FOG_DENSITY); 60 OUT_BATCH(0); 61 OUT_BATCH(0); 62 63 OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | 64 MAP_UNIT(0) | 65 DISABLE_TEX_STREAM_BUMP | 66 ENABLE_TEX_STREAM_COORD_SET | 67 TEX_STREAM_COORD_SET(0) | 68 ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(0)); 69 OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | 70 MAP_UNIT(1) | 71 DISABLE_TEX_STREAM_BUMP | 72 ENABLE_TEX_STREAM_COORD_SET | 73 TEX_STREAM_COORD_SET(1) | 74 ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(1)); 75 OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | 76 MAP_UNIT(2) | 77 DISABLE_TEX_STREAM_BUMP | 78 ENABLE_TEX_STREAM_COORD_SET | 79 TEX_STREAM_COORD_SET(2) | 80 ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(2)); 81 OUT_BATCH(_3DSTATE_MAP_TEX_STREAM_CMD | 82 MAP_UNIT(3) | 83 DISABLE_TEX_STREAM_BUMP | 84 ENABLE_TEX_STREAM_COORD_SET | 85 TEX_STREAM_COORD_SET(3) | 86 ENABLE_TEX_STREAM_MAP_IDX | TEX_STREAM_MAP_IDX(3)); 87 88 OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); 89 OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(0)); 90 OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); 91 OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(1)); 92 OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); 93 OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(2)); 94 OUT_BATCH(_3DSTATE_MAP_COORD_TRANSFORM); 95 OUT_BATCH(DISABLE_TEX_TRANSFORM | TEXTURE_SET(3)); 96 97 OUT_BATCH(_3DSTATE_RASTER_RULES_CMD | 98 ENABLE_POINT_RASTER_RULE | 99 OGL_POINT_RASTER_RULE | 100 ENABLE_LINE_STRIP_PROVOKE_VRTX | 101 ENABLE_TRI_FAN_PROVOKE_VRTX | 102 ENABLE_TRI_STRIP_PROVOKE_VRTX | 103 LINE_STRIP_PROVOKE_VRTX(1) | 104 TRI_FAN_PROVOKE_VRTX(2) | TRI_STRIP_PROVOKE_VRTX(2)); 105 106 OUT_BATCH(_3DSTATE_SCISSOR_ENABLE_CMD | DISABLE_SCISSOR_RECT); 107 108 OUT_BATCH(_3DSTATE_SCISSOR_RECT_0_CMD); 109 OUT_BATCH(0); 110 OUT_BATCH(0); 111 112 OUT_BATCH(_3DSTATE_VERTEX_TRANSFORM); 113 OUT_BATCH(DISABLE_VIEWPORT_TRANSFORM | DISABLE_PERSPECTIVE_DIVIDE); 114 115 OUT_BATCH(_3DSTATE_W_STATE_CMD); 116 OUT_BATCH(MAGIC_W_STATE_DWORD1); 117 OUT_BATCH(0x3f800000 /* 1.0 in IEEE float */ ); 118 119 OUT_BATCH(_3DSTATE_COLOR_FACTOR_CMD); 120 OUT_BATCH(0x80808080); /* .5 required in alpha for GL_DOT3_RGBA_EXT */ 121 122 OUT_BATCH(_3DSTATE_MAP_COORD_SETBIND_CMD); 123 OUT_BATCH(TEXBIND_SET3(TEXCOORDSRC_VTXSET_3) | 124 TEXBIND_SET2(TEXCOORDSRC_VTXSET_2) | 125 TEXBIND_SET1(TEXCOORDSRC_VTXSET_1) | 126 TEXBIND_SET0(TEXCOORDSRC_VTXSET_0)); 127 128 /* copy from mesa */ 129 OUT_BATCH(_3DSTATE_INDPT_ALPHA_BLEND_CMD | 130 DISABLE_INDPT_ALPHA_BLEND | 131 ENABLE_ALPHA_BLENDFUNC | ABLENDFUNC_ADD); 132 133 OUT_BATCH(_3DSTATE_FOG_COLOR_CMD | 134 FOG_COLOR_RED(0) | FOG_COLOR_GREEN(0) | FOG_COLOR_BLUE(0)); 135 136 OUT_BATCH(_3DSTATE_CONST_BLEND_COLOR_CMD); 137 OUT_BATCH(0); 138 139 OUT_BATCH(_3DSTATE_MODES_1_CMD | 140 ENABLE_COLR_BLND_FUNC | 141 BLENDFUNC_ADD | 142 ENABLE_SRC_BLND_FACTOR | 143 SRC_BLND_FACT(BLENDFACTOR_ONE) | 144 ENABLE_DST_BLND_FACTOR | DST_BLND_FACT(BLENDFACTOR_ZERO)); 145 OUT_BATCH(_3DSTATE_MODES_2_CMD | ENABLE_GLOBAL_DEPTH_BIAS | GLOBAL_DEPTH_BIAS(0) | ENABLE_ALPHA_TEST_FUNC | ALPHA_TEST_FUNC(0) | /* always */ 146 ALPHA_REF_VALUE(0)); 147 OUT_BATCH(_3DSTATE_MODES_3_CMD | 148 ENABLE_DEPTH_TEST_FUNC | 149 DEPTH_TEST_FUNC(0x2) | /* COMPAREFUNC_LESS */ 150 ENABLE_ALPHA_SHADE_MODE | 151 ALPHA_SHADE_MODE(SHADE_MODE_LINEAR) | 152 ENABLE_FOG_SHADE_MODE | 153 FOG_SHADE_MODE(SHADE_MODE_LINEAR) | 154 ENABLE_SPEC_SHADE_MODE | 155 SPEC_SHADE_MODE(SHADE_MODE_LINEAR) | 156 ENABLE_COLOR_SHADE_MODE | 157 COLOR_SHADE_MODE(SHADE_MODE_LINEAR) | 158 ENABLE_CULL_MODE | CULLMODE_NONE); 159 160 OUT_BATCH(_3DSTATE_MODES_4_CMD | 161 ENABLE_LOGIC_OP_FUNC | 162 LOGIC_OP_FUNC(LOGICOP_COPY) | 163 ENABLE_STENCIL_TEST_MASK | 164 STENCIL_TEST_MASK(0xff) | 165 ENABLE_STENCIL_WRITE_MASK | STENCIL_WRITE_MASK(0xff)); 166 167 OUT_BATCH(_3DSTATE_STENCIL_TEST_CMD | 168 ENABLE_STENCIL_PARMS | 169 STENCIL_FAIL_OP(0) | /* STENCILOP_KEEP */ 170 STENCIL_PASS_DEPTH_FAIL_OP(0) | /* STENCILOP_KEEP */ 171 STENCIL_PASS_DEPTH_PASS_OP(0) | /* STENCILOP_KEEP */ 172 ENABLE_STENCIL_TEST_FUNC | 173 STENCIL_TEST_FUNC(0) | /* COMPAREFUNC_ALWAYS */ 174 ENABLE_STENCIL_REF_VALUE | 175 STENCIL_REF_VALUE(0)); 176 177 OUT_BATCH(_3DSTATE_MODES_5_CMD | 178 FLUSH_TEXTURE_CACHE | 179 ENABLE_SPRITE_POINT_TEX | SPRITE_POINT_TEX_OFF | 180 ENABLE_FIXED_LINE_WIDTH | FIXED_LINE_WIDTH(0x2) | /* 1.0 */ 181 ENABLE_FIXED_POINT_WIDTH | FIXED_POINT_WIDTH(1)); 182 183 OUT_BATCH(_3DSTATE_ENABLES_1_CMD | 184 DISABLE_LOGIC_OP | 185 DISABLE_STENCIL_TEST | 186 DISABLE_DEPTH_BIAS | 187 DISABLE_SPEC_ADD | 188 DISABLE_FOG | 189 DISABLE_ALPHA_TEST | ENABLE_COLOR_BLEND | DISABLE_DEPTH_TEST); 190 OUT_BATCH(_3DSTATE_ENABLES_2_CMD | 191 DISABLE_STENCIL_WRITE | 192 ENABLE_TEX_CACHE | 193 DISABLE_DITHER | 194 ENABLE_COLOR_MASK | ENABLE_COLOR_WRITE | DISABLE_DEPTH_WRITE); 195 196 OUT_BATCH(_3DSTATE_STIPPLE); 197 198 /* Set default blend state */ 199 OUT_BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) | 200 TEXPIPE_COLOR | 201 ENABLE_TEXOUTPUT_WRT_SEL | 202 TEXOP_OUTPUT_CURRENT | 203 DISABLE_TEX_CNTRL_STAGE | 204 TEXOP_SCALE_1X | 205 TEXOP_MODIFY_PARMS | TEXOP_LAST_STAGE | TEXBLENDOP_ARG1); 206 OUT_BATCH(_3DSTATE_MAP_BLEND_OP_CMD(0) | 207 TEXPIPE_ALPHA | 208 ENABLE_TEXOUTPUT_WRT_SEL | 209 TEXOP_OUTPUT_CURRENT | 210 TEXOP_SCALE_1X | TEXOP_MODIFY_PARMS | TEXBLENDOP_ARG1); 211 OUT_BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) | 212 TEXPIPE_COLOR | 213 TEXBLEND_ARG1 | 214 TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); 215 OUT_BATCH(_3DSTATE_MAP_BLEND_ARG_CMD(0) | 216 TEXPIPE_ALPHA | 217 TEXBLEND_ARG1 | 218 TEXBLENDARG_MODIFY_PARMS | TEXBLENDARG_DIFFUSE); 219 220 OUT_BATCH(_3DSTATE_AA_CMD | 221 AA_LINE_ECAAR_WIDTH_ENABLE | 222 AA_LINE_ECAAR_WIDTH_1_0 | 223 AA_LINE_REGION_WIDTH_ENABLE | 224 AA_LINE_REGION_WIDTH_1_0 | AA_LINE_DISABLE); 225} 226