113496ba1Ssnj/* 213496ba1Ssnj * Copyright © 2014 Keith Packard 313496ba1Ssnj * 413496ba1Ssnj * Permission to use, copy, modify, distribute, and sell this software and its 513496ba1Ssnj * documentation for any purpose is hereby granted without fee, provided that 613496ba1Ssnj * the above copyright notice appear in all copies and that both that copyright 713496ba1Ssnj * notice and this permission notice appear in supporting documentation, and 813496ba1Ssnj * that the name of the copyright holders not be used in advertising or 913496ba1Ssnj * publicity pertaining to distribution of the software without specific, 1013496ba1Ssnj * written prior permission. The copyright holders make no representations 1113496ba1Ssnj * about the suitability of this software for any purpose. It is provided "as 1213496ba1Ssnj * is" without express or implied warranty. 1313496ba1Ssnj * 1413496ba1Ssnj * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 1513496ba1Ssnj * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 1613496ba1Ssnj * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 1713496ba1Ssnj * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 1813496ba1Ssnj * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 1913496ba1Ssnj * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE 2013496ba1Ssnj * OF THIS SOFTWARE. 2113496ba1Ssnj */ 2213496ba1Ssnj 2313496ba1Ssnj#ifndef _INTEL_UXA_H_ 2413496ba1Ssnj#define _INTEL_UXA_H_ 2513496ba1Ssnj 2613496ba1Ssnj#include "intel_video.h" 2713496ba1Ssnj#include "uxa.h" 2813496ba1Ssnj 2913496ba1Ssnjstruct intel_uxa_pixmap { 3013496ba1Ssnj dri_bo *bo; 3113496ba1Ssnj 3213496ba1Ssnj struct list batch; 3313496ba1Ssnj 3413496ba1Ssnj uint8_t tiling; 3513496ba1Ssnj int8_t busy :2; 3613496ba1Ssnj uint8_t dirty :1; 3713496ba1Ssnj uint8_t offscreen :1; 3813496ba1Ssnj uint8_t pinned :5; 3913496ba1Ssnj#define PIN_SCANOUT 0x1 4013496ba1Ssnj#define PIN_DRI2 0x2 4113496ba1Ssnj#define PIN_DRI3 0x4 4213496ba1Ssnj#define PIN_PRIME 0x8 4313496ba1Ssnj}; 4413496ba1Ssnj 4513496ba1Ssnj#if HAS_DEVPRIVATEKEYREC 4613496ba1Ssnjextern DevPrivateKeyRec uxa_pixmap_index; 4713496ba1Ssnj#else 4813496ba1Ssnjextern int uxa_pixmap_index; 4913496ba1Ssnj#endif 5013496ba1Ssnj 5113496ba1Ssnjstatic inline struct intel_uxa_pixmap *intel_uxa_get_pixmap_private(PixmapPtr pixmap) 5213496ba1Ssnj{ 5313496ba1Ssnj#if HAS_DEVPRIVATEKEYREC 5413496ba1Ssnj return dixGetPrivate(&pixmap->devPrivates, &uxa_pixmap_index); 5513496ba1Ssnj#else 5613496ba1Ssnj return dixLookupPrivate(&pixmap->devPrivates, &uxa_pixmap_index); 5713496ba1Ssnj#endif 5813496ba1Ssnj} 5913496ba1Ssnj 6013496ba1Ssnjstatic inline Bool intel_uxa_pixmap_is_busy(struct intel_uxa_pixmap *priv) 6113496ba1Ssnj{ 6213496ba1Ssnj if (priv->busy == -1) 6313496ba1Ssnj priv->busy = drm_intel_bo_busy(priv->bo); 6413496ba1Ssnj return priv->busy; 6513496ba1Ssnj} 6613496ba1Ssnj 6713496ba1Ssnjstatic inline void intel_uxa_set_pixmap_private(PixmapPtr pixmap, struct intel_uxa_pixmap *intel) 6813496ba1Ssnj{ 6913496ba1Ssnj dixSetPrivate(&pixmap->devPrivates, &uxa_pixmap_index, intel); 7013496ba1Ssnj} 7113496ba1Ssnj 7213496ba1Ssnjstatic inline Bool intel_uxa_pixmap_is_dirty(PixmapPtr pixmap) 7313496ba1Ssnj{ 7413496ba1Ssnj return pixmap && intel_uxa_get_pixmap_private(pixmap)->dirty; 7513496ba1Ssnj} 7613496ba1Ssnj 7713496ba1Ssnjstatic inline Bool intel_uxa_pixmap_tiled(PixmapPtr pixmap) 7813496ba1Ssnj{ 7913496ba1Ssnj return intel_uxa_get_pixmap_private(pixmap)->tiling != I915_TILING_NONE; 8013496ba1Ssnj} 8113496ba1Ssnj 8213496ba1Ssnjdri_bo *intel_uxa_get_pixmap_bo(PixmapPtr pixmap); 8313496ba1Ssnjvoid intel_uxa_set_pixmap_bo(PixmapPtr pixmap, dri_bo * bo); 8413496ba1Ssnj 8513496ba1SsnjBool intel_uxa_init(ScreenPtr pScreen); 8613496ba1SsnjBool intel_uxa_create_screen_resources(ScreenPtr pScreen); 8713496ba1Ssnjvoid intel_uxa_block_handler(intel_screen_private *intel); 8813496ba1Ssnj 8913496ba1Ssnjstatic inline Bool intel_uxa_pixmap_is_offscreen(PixmapPtr pixmap) 9013496ba1Ssnj{ 9113496ba1Ssnj struct intel_uxa_pixmap *priv = intel_uxa_get_pixmap_private(pixmap); 9213496ba1Ssnj return priv && priv->offscreen; 9313496ba1Ssnj} 9413496ba1Ssnj 9513496ba1Ssnj/* Batchbuffer support macros and functions */ 9613496ba1Ssnj#include "intel_batchbuffer.h" 9713496ba1Ssnj 9813496ba1Ssnj/* I830 specific functions */ 9913496ba1Ssnjextern void IntelEmitInvarientState(ScrnInfoPtr scrn); 10013496ba1Ssnjextern void I830EmitInvarientState(ScrnInfoPtr scrn); 10113496ba1Ssnjextern void I915EmitInvarientState(ScrnInfoPtr scrn); 10213496ba1Ssnj 10313496ba1Ssnjextern void I830EmitFlush(ScrnInfoPtr scrn); 10413496ba1Ssnj 10513496ba1Ssnj/* i830_render.c */ 10613496ba1SsnjBool i830_check_composite(int op, 10713496ba1Ssnj PicturePtr sourcec, PicturePtr mask, PicturePtr dest, 10813496ba1Ssnj int width, int height); 10913496ba1SsnjBool i830_check_composite_target(PixmapPtr pixmap); 11013496ba1SsnjBool i830_check_composite_texture(ScreenPtr screen, PicturePtr picture); 11113496ba1SsnjBool i830_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask, 11213496ba1Ssnj PicturePtr dest, PixmapPtr sourcecPixmap, 11313496ba1Ssnj PixmapPtr maskPixmap, PixmapPtr destPixmap); 11413496ba1Ssnjvoid i830_composite(PixmapPtr dest, int srcX, int srcY, 11513496ba1Ssnj int maskX, int maskY, int dstX, int dstY, int w, int h); 11613496ba1Ssnjvoid i830_vertex_flush(intel_screen_private *intel); 11713496ba1Ssnj 11813496ba1Ssnj/* i915_render.c */ 11913496ba1SsnjBool i915_check_composite(int op, 12013496ba1Ssnj PicturePtr sourcec, PicturePtr mask, PicturePtr dest, 12113496ba1Ssnj int width, int height); 12213496ba1SsnjBool i915_check_composite_target(PixmapPtr pixmap); 12313496ba1SsnjBool i915_check_composite_texture(ScreenPtr screen, PicturePtr picture); 12413496ba1SsnjBool i915_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask, 12513496ba1Ssnj PicturePtr dest, PixmapPtr sourcecPixmap, 12613496ba1Ssnj PixmapPtr maskPixmap, PixmapPtr destPixmap); 12713496ba1Ssnjvoid i915_composite(PixmapPtr dest, int srcX, int srcY, 12813496ba1Ssnj int maskX, int maskY, int dstX, int dstY, int w, int h); 12913496ba1Ssnjvoid i915_vertex_flush(intel_screen_private *intel); 13013496ba1Ssnjvoid i915_batch_commit_notify(intel_screen_private *intel); 13113496ba1Ssnjvoid i830_batch_commit_notify(intel_screen_private *intel); 13213496ba1Ssnj/* i965_render.c */ 13313496ba1Ssnjunsigned int gen4_render_state_size(ScrnInfoPtr scrn); 13413496ba1Ssnjvoid gen4_render_state_init(ScrnInfoPtr scrn); 13513496ba1Ssnjvoid gen4_render_state_cleanup(ScrnInfoPtr scrn); 13613496ba1SsnjBool i965_check_composite(int op, 13713496ba1Ssnj PicturePtr sourcec, PicturePtr mask, PicturePtr dest, 13813496ba1Ssnj int width, int height); 13913496ba1SsnjBool i965_check_composite_texture(ScreenPtr screen, PicturePtr picture); 14013496ba1SsnjBool i965_prepare_composite(int op, PicturePtr sourcec, PicturePtr mask, 14113496ba1Ssnj PicturePtr dest, PixmapPtr sourcecPixmap, 14213496ba1Ssnj PixmapPtr maskPixmap, PixmapPtr destPixmap); 14313496ba1Ssnjvoid i965_composite(PixmapPtr dest, int srcX, int srcY, 14413496ba1Ssnj int maskX, int maskY, int dstX, int dstY, int w, int h); 14513496ba1Ssnj 14613496ba1Ssnjvoid i965_vertex_flush(intel_screen_private *intel); 14713496ba1Ssnjvoid i965_batch_flush(intel_screen_private *intel); 14813496ba1Ssnjvoid i965_batch_commit_notify(intel_screen_private *intel); 14913496ba1Ssnj 15013496ba1Ssnj/* i965_3d.c */ 15113496ba1Ssnjvoid gen6_upload_invariant_states(intel_screen_private *intel); 15213496ba1Ssnjvoid gen6_upload_viewport_state_pointers(intel_screen_private *intel, 15313496ba1Ssnj drm_intel_bo *cc_vp_bo); 15413496ba1Ssnjvoid gen7_upload_viewport_state_pointers(intel_screen_private *intel, 15513496ba1Ssnj drm_intel_bo *cc_vp_bo); 15613496ba1Ssnjvoid gen6_upload_urb(intel_screen_private *intel); 15713496ba1Ssnjvoid gen7_upload_urb(intel_screen_private *intel); 15813496ba1Ssnjvoid gen6_upload_cc_state_pointers(intel_screen_private *intel, 15913496ba1Ssnj drm_intel_bo *blend_bo, drm_intel_bo *cc_bo, 16013496ba1Ssnj drm_intel_bo *depth_stencil_bo, 16113496ba1Ssnj uint32_t blend_offset); 16213496ba1Ssnjvoid gen7_upload_cc_state_pointers(intel_screen_private *intel, 16313496ba1Ssnj drm_intel_bo *blend_bo, drm_intel_bo *cc_bo, 16413496ba1Ssnj drm_intel_bo *depth_stencil_bo, 16513496ba1Ssnj uint32_t blend_offset); 16613496ba1Ssnjvoid gen6_upload_sampler_state_pointers(intel_screen_private *intel, 16713496ba1Ssnj drm_intel_bo *sampler_bo); 16813496ba1Ssnjvoid gen7_upload_sampler_state_pointers(intel_screen_private *intel, 16913496ba1Ssnj drm_intel_bo *sampler_bo); 17013496ba1Ssnjvoid gen7_upload_bypass_states(intel_screen_private *intel); 17113496ba1Ssnjvoid gen6_upload_gs_state(intel_screen_private *intel); 17213496ba1Ssnjvoid gen6_upload_vs_state(intel_screen_private *intel); 17313496ba1Ssnjvoid gen6_upload_clip_state(intel_screen_private *intel); 17413496ba1Ssnjvoid gen6_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset); 17513496ba1Ssnjvoid gen7_upload_sf_state(intel_screen_private *intel, int num_sf_outputs, int read_offset); 17613496ba1Ssnjvoid gen6_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset); 17713496ba1Ssnjvoid gen7_upload_binding_table(intel_screen_private *intel, uint32_t ps_binding_table_offset); 17813496ba1Ssnjvoid gen6_upload_depth_buffer_state(intel_screen_private *intel); 17913496ba1Ssnjvoid gen7_upload_depth_buffer_state(intel_screen_private *intel); 18013496ba1Ssnj 18113496ba1SsnjBool intel_uxa_transform_is_affine(PictTransformPtr t); 18213496ba1Ssnj 18313496ba1SsnjBool 18413496ba1Ssnjintel_uxa_get_transformed_coordinates(int x, int y, PictTransformPtr transform, 18513496ba1Ssnj float *x_out, float *y_out); 18613496ba1Ssnj 18713496ba1SsnjBool 18813496ba1Ssnjintel_uxa_get_transformed_coordinates_3d(int x, int y, PictTransformPtr transform, 18913496ba1Ssnj float *x_out, float *y_out, float *z_out); 19013496ba1Ssnj 19113496ba1Ssnjstatic inline void 19213496ba1Ssnjintel_uxa_debug_fallback(ScrnInfoPtr scrn, const char *format, ...) _X_ATTRIBUTE_PRINTF(2, 3); 19313496ba1Ssnj 19413496ba1Ssnjstatic inline void 19513496ba1Ssnjintel_uxa_debug_fallback(ScrnInfoPtr scrn, const char *format, ...) 19613496ba1Ssnj{ 19713496ba1Ssnj intel_screen_private *intel = intel_get_screen_private(scrn); 19813496ba1Ssnj va_list ap; 19913496ba1Ssnj 20013496ba1Ssnj va_start(ap, format); 20113496ba1Ssnj if (intel->fallback_debug) { 20213496ba1Ssnj xf86DrvMsg(scrn->scrnIndex, X_INFO, "fallback: "); 20313496ba1Ssnj LogVMessageVerb(X_INFO, 1, format, ap); 20413496ba1Ssnj } 20513496ba1Ssnj va_end(ap); 20613496ba1Ssnj} 20713496ba1Ssnj 20813496ba1Ssnjstatic inline Bool 20913496ba1Ssnjintel_uxa_check_pitch_2d(PixmapPtr pixmap) 21013496ba1Ssnj{ 21113496ba1Ssnj uint32_t pitch = intel_pixmap_pitch(pixmap); 21213496ba1Ssnj if (pitch > KB(32)) { 21313496ba1Ssnj ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen); 21413496ba1Ssnj intel_uxa_debug_fallback(scrn, "pitch exceeds 2d limit 32K\n"); 21513496ba1Ssnj return FALSE; 21613496ba1Ssnj } 21713496ba1Ssnj return TRUE; 21813496ba1Ssnj} 21913496ba1Ssnj 22013496ba1Ssnj/* For pre-965 chip only, as they have 8KB limit for 3D */ 22113496ba1Ssnjstatic inline Bool 22213496ba1Ssnjintel_uxa_check_pitch_3d(PixmapPtr pixmap) 22313496ba1Ssnj{ 22413496ba1Ssnj uint32_t pitch = intel_pixmap_pitch(pixmap); 22513496ba1Ssnj if (pitch > KB(8)) { 22613496ba1Ssnj ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen); 22713496ba1Ssnj intel_uxa_debug_fallback(scrn, "pitch exceeds 3d limit 8K\n"); 22813496ba1Ssnj return FALSE; 22913496ba1Ssnj } 23013496ba1Ssnj return TRUE; 23113496ba1Ssnj} 23213496ba1Ssnj 23313496ba1Ssnj/** 23413496ba1Ssnj * Little wrapper around drm_intel_bo_reloc to return the initial value you 23513496ba1Ssnj * should stuff into the relocation entry. 23613496ba1Ssnj * 23713496ba1Ssnj * If only we'd done this before settling on the library API. 23813496ba1Ssnj */ 23913496ba1Ssnjstatic inline uint32_t 24013496ba1Ssnjintel_uxa_emit_reloc(drm_intel_bo * bo, uint32_t offset, 24113496ba1Ssnj drm_intel_bo * target_bo, uint32_t target_offset, 24213496ba1Ssnj uint32_t read_domains, uint32_t write_domain) 24313496ba1Ssnj{ 24413496ba1Ssnj drm_intel_bo_emit_reloc(bo, offset, target_bo, target_offset, 24513496ba1Ssnj read_domains, write_domain); 24613496ba1Ssnj 24713496ba1Ssnj return target_bo->offset + target_offset; 24813496ba1Ssnj} 24913496ba1Ssnj 25013496ba1Ssnjstatic inline drm_intel_bo *intel_uxa_bo_alloc_for_data(intel_screen_private *intel, 25113496ba1Ssnj const void *data, 25213496ba1Ssnj unsigned int size, 25313496ba1Ssnj const char *name) 25413496ba1Ssnj{ 25513496ba1Ssnj drm_intel_bo *bo; 25613496ba1Ssnj int ret; 25713496ba1Ssnj 25813496ba1Ssnj bo = drm_intel_bo_alloc(intel->bufmgr, name, size, 4096); 25913496ba1Ssnj assert(bo); 26013496ba1Ssnj 26113496ba1Ssnj ret = drm_intel_bo_subdata(bo, 0, size, data); 26213496ba1Ssnj assert(ret == 0); 26313496ba1Ssnj 26413496ba1Ssnj return bo; 26513496ba1Ssnj (void)ret; 26613496ba1Ssnj} 26713496ba1Ssnj 26813496ba1Ssnjvoid intel_uxa_debug_flush(ScrnInfoPtr scrn); 26913496ba1Ssnj 27013496ba1Ssnj 27113496ba1SsnjBool intel_uxa_get_aperture_space(ScrnInfoPtr scrn, drm_intel_bo ** bo_table, 27213496ba1Ssnj int num_bos); 27313496ba1Ssnj 27413496ba1SsnjXF86VideoAdaptorPtr intel_uxa_video_setup_image_textured(ScreenPtr screen); 27513496ba1Ssnj 27613496ba1Ssnjvoid I915DisplayVideoTextured(ScrnInfoPtr scrn, 27713496ba1Ssnj intel_adaptor_private *adaptor_priv, 27813496ba1Ssnj int id, RegionPtr dstRegion, short width, 27913496ba1Ssnj short height, int video_pitch, int video_pitch2, 28013496ba1Ssnj short src_w, short src_h, 28113496ba1Ssnj short drw_w, short drw_h, PixmapPtr pixmap); 28213496ba1Ssnj 28313496ba1Ssnjvoid I965DisplayVideoTextured(ScrnInfoPtr scrn, 28413496ba1Ssnj intel_adaptor_private *adaptor_priv, 28513496ba1Ssnj int id, RegionPtr dstRegion, short width, 28613496ba1Ssnj short height, int video_pitch, int video_pitch2, 28713496ba1Ssnj short src_w, short src_h, 28813496ba1Ssnj short drw_w, short drw_h, PixmapPtr pixmap); 28913496ba1Ssnj 29013496ba1Ssnjvoid Gen6DisplayVideoTextured(ScrnInfoPtr scrn, 29113496ba1Ssnj intel_adaptor_private *adaptor_priv, 29213496ba1Ssnj int id, RegionPtr dstRegion, short width, 29313496ba1Ssnj short height, int video_pitch, int video_pitch2, 29413496ba1Ssnj short src_w, short src_h, 29513496ba1Ssnj short drw_w, short drw_h, PixmapPtr pixmap); 29613496ba1Ssnj 29713496ba1Ssnjvoid i965_free_video(ScrnInfoPtr scrn); 29813496ba1Ssnj 29913496ba1Ssnj#endif /* _INTEL_UXA_H_ */ 300