nv50_accel.h revision 16ee1e9a
1fda9279dSmrg#ifndef __NV50_ACCEL_H__
2fda9279dSmrg#define __NV50_ACCEL_H__
3fda9279dSmrg
4fda9279dSmrg
5fda9279dSmrg#include "hwdefs/nv50_2d.xml.h"
6fda9279dSmrg#include "hwdefs/nv50_3d.xml.h"
7fda9279dSmrg#include "hwdefs/nv50_defs.xml.h"
8fda9279dSmrg#include "hwdefs/nv50_texture.h"
9fda9279dSmrg#include "hwdefs/nv_3ddefs.xml.h"
10fda9279dSmrg#include "hwdefs/nv_m2mf.xml.h"
1116ee1e9aSmrg#include "hwdefs/nv_object.xml.h"
12fda9279dSmrg
13fda9279dSmrg/* subchannel assignments - graphics channel */
14fda9279dSmrg#define SUBC_M2MF(mthd)  0, (mthd)
15fda9279dSmrg#define NV03_M2MF(mthd)  SUBC_M2MF(NV03_M2MF_##mthd)
16fda9279dSmrg#define NV50_M2MF(mthd)  SUBC_M2MF(NV50_M2MF_##mthd)
17fda9279dSmrg#define SUBC_NVSW(mthd)  1, (mthd)
18fda9279dSmrg#define SUBC_2D(mthd)    2, (mthd)
19fda9279dSmrg#define NV50_2D(mthd)    SUBC_2D(NV50_2D_##mthd)
20fda9279dSmrg#define NVC0_2D(mthd)    SUBC_2D(NVC0_2D_##mthd)
21fda9279dSmrg#define SUBC_3D(mthd)    7, (mthd)
22fda9279dSmrg#define NV50_3D(mthd)    SUBC_3D(NV50_3D_##mthd)
23fda9279dSmrg
24fda9279dSmrg/* subchannel assignments - copy engine channel */
25fda9279dSmrg#define SUBC_COPY(mthd)  2, (mthd)
26fda9279dSmrg
27fda9279dSmrg/* scratch buffer offsets */
28fda9279dSmrg#define PVP_OFFSET  0x00000000 /* Vertex program */
29fda9279dSmrg#define PFP_OFFSET  0x00001000 /* Fragment program */
30fda9279dSmrg#define TIC_OFFSET  0x00002000 /* Texture Image Control */
31fda9279dSmrg#define TSC_OFFSET  0x00003000 /* Texture Sampler Control */
32fda9279dSmrg#define PVP_DATA    0x00004000 /* VP constbuf */
33fda9279dSmrg#define PFP_DATA    0x00004100 /* FP constbuf */
34fda9279dSmrg#define SOLID(i)   (0x00006000 + (i) * 0x100)
35fda9279dSmrg
36fda9279dSmrg/* Fragment programs */
37fda9279dSmrg#define PFP_S     0x0000 /* (src) */
38fda9279dSmrg#define PFP_C     0x0100 /* (src IN mask) */
39fda9279dSmrg#define PFP_CCA   0x0200 /* (src IN mask) component-alpha */
40fda9279dSmrg#define PFP_CCASA 0x0300 /* (src IN mask) component-alpha src-alpha */
41fda9279dSmrg#define PFP_S_A8  0x0400 /* (src) a8 rt */
42fda9279dSmrg#define PFP_C_A8  0x0500 /* (src IN mask) a8 rt - same for CA and CA_SA */
43fda9279dSmrg#define PFP_NV12  0x0600 /* NV12 YUV->RGB */
44fda9279dSmrg
45fda9279dSmrg/* Constant buffer assignments */
46fda9279dSmrg#define CB_PSH 0
47fda9279dSmrg#define CB_PVP 1
48fda9279dSmrg#define CB_PFP 2
49fda9279dSmrg
50fda9279dSmrgstatic __inline__ void
51fda9279dSmrgPUSH_VTX1s(struct nouveau_pushbuf *push, float sx, float sy, int dx, int dy)
52fda9279dSmrg{
53fda9279dSmrg	BEGIN_NV04(push, NV50_3D(VTX_ATTR_2F_X(8)), 2);
54fda9279dSmrg	PUSH_DATAf(push, sx);
55fda9279dSmrg	PUSH_DATAf(push, sy);
56fda9279dSmrg	BEGIN_NV04(push, NV50_3D(VTX_ATTR_2I(0)), 1);
57fda9279dSmrg	PUSH_DATA (push, ((dy & 0xffff) << 16) | (dx & 0xffff));
58fda9279dSmrg}
59fda9279dSmrg
60fda9279dSmrgstatic __inline__ void
61fda9279dSmrgPUSH_VTX2s(struct nouveau_pushbuf *push,
62fda9279dSmrg	   int x1, int y1, int x2, int y2, int dx, int dy)
63fda9279dSmrg{
64fda9279dSmrg	BEGIN_NV04(push, NV50_3D(VTX_ATTR_2I(8)), 2);
65fda9279dSmrg	PUSH_DATA (push, ((y1 & 0xffff) << 16) | (x1 & 0xffff));
66fda9279dSmrg	PUSH_DATA (push, ((y2 & 0xffff) << 16) | (x2 & 0xffff));
67fda9279dSmrg	BEGIN_NV04(push, NV50_3D(VTX_ATTR_2I(0)), 1);
68fda9279dSmrg	PUSH_DATA (push, ((dy & 0xffff) << 16) | (dx & 0xffff));
69fda9279dSmrg}
70fda9279dSmrg
71fda9279dSmrgstatic __inline__ void
72fda9279dSmrgPUSH_DATAu(struct nouveau_pushbuf *push, struct nouveau_bo *bo,
73fda9279dSmrg	   unsigned delta, unsigned dwords)
74fda9279dSmrg{
75fda9279dSmrg	const unsigned idx = (delta & 0x000000fc) >> 2;
76fda9279dSmrg	const unsigned off = (delta & 0xffffff00);
77fda9279dSmrg	BEGIN_NV04(push, NV50_3D(CB_DEF_ADDRESS_HIGH), 3);
78fda9279dSmrg	PUSH_DATA (push, (bo->offset + off) >> 32);
79fda9279dSmrg	PUSH_DATA (push, (bo->offset + off));
80fda9279dSmrg	PUSH_DATA (push, (CB_PSH << NV50_3D_CB_DEF_SET_BUFFER__SHIFT) | 0x2000);
81fda9279dSmrg	BEGIN_NV04(push, NV50_3D(CB_ADDR), 1);
82fda9279dSmrg	PUSH_DATA (push, CB_PSH | (idx << NV50_3D_CB_ADDR_ID__SHIFT));
83fda9279dSmrg	BEGIN_NI04(push, NV50_3D(CB_DATA(0)), dwords);
84fda9279dSmrg}
85fda9279dSmrg
86fda9279dSmrg#endif
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