1/*
2 * SBus Weitek P9100 framebuffer - hardware registers.
3 *
4 * Copyright (C) 2005 Michael Lorenz
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19 * MICHAEL LORENZ BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
20 * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23/* $NetBSD: pnozz_regs.h,v 1.2 2021/06/09 07:25:57 jdc Exp $ */
24
25#ifndef PNOZZ_REGS_H
26#define PNOZZ_REGS_H
27
28/* The Tadpole 3GX Technical Reference Manual lies.  The ramdac registers
29 * are map in 4 byte increments, not 8.
30 */
31#define	SCRN_RPNT_CTL_1	0x0138	/* Screen Repaint Timing Control 1 */
32#define	VIDEO_ENABLED	0x00000020
33#define	PWRUP_CNFG	0x0194	/* Power Up Configuration */
34#define	DAC_CMAP_WRIDX	0x0200	/* IBM RGB528 Palette Address (Write) */
35#define	DAC_CMAP_DATA	0x0204	/* IBM RGB528 Palette Data */
36#define	DAC_PXL_MASK	0x0208	/* IBM RGB528 Pixel Mask */
37#define	DAC_CMAP_RDIDX	0x020c	/* IBM RGB528 Palette Address (Read) */
38#define	DAC_INDX_LO	0x0210	/* IBM RGB528 Index Low */
39#define	DAC_INDX_HI	0x0214	/* IBM RGB528 Index High */
40#define	DAC_INDX_DATA	0x0218	/* IBM RGB528 Index Data (Indexed Registers) */
41#define	DAC_INDX_CTL	0x021c	/* IBM RGB528 Index Control */
42	#define DAC_INDX_AUTOINCR	0x01
43
44/* RAMDAC control registers, accessed through DAC_INDX_* */
45#define DAC_MISC_CLK	0x02
46#define DAC_POWER_MGT	0x05
47#define DAC_OPERATION	0x06
48	#define	DAC_SYNC_ON_GREEN	0x08
49#define DAC_PALETTE_CTRL 0x07
50#define DAC_PIXEL_FMT	0x0a
51#define DAC_8BIT_CTRL	0x0b
52	#define	DAC8_DIRECT_COLOR	0x01
53#define DAC_16BIT_CTRL	0x0c
54	#define DAC16_INDIRECT_COLOR	0x00
55	#define DAC16_DYNAMIC_COLOR	0x40
56	#define DAC16_DIRECT_COLOR	0xc0
57	#define DAC16_BYPASS_POLARITY	0x20
58	#define DAC16_BIT_FILL_LINEAR	0x04
59	#define DAC16_555		0x00
60	#define DAC16_565		0x02
61	#define DAC16_CONTIGUOUS	0x01
62#define DAC_24BIT_CTRL	0x0d
63	#define	DAC24_DIRECT_COLOR	0x01
64#define DAC_32BIT_CTRL	0x0e
65	#define	DAC32_BYPASS_POLARITY	0x04
66	#define	DAC32_INDIRECT_COLOR	0x00
67	#define	DAC32_DYNAMIC_COLOR	0x01
68	#define	DAC32_DIRECT_COLOR	0x03
69#define DAC_VCO_DIV	0x16
70#define DAC_PLL0	0x20
71#define DAC_MISC_1	0x70
72#define DAC_MISC_2	0x71
73#define DAC_MISC_3	0x72
74
75#define DAC_CURSOR_CTL	0x30
76	#define DAC_CURSOR_OFF	0x00
77	#define DAC_CURSOR_WIN	0x02
78	#define DAC_CURSOR_X11	0x03
79	#define DAC_CURSOR_64	0x04	/* clear for 32x32 cursor */
80#define DAC_CURSOR_X	0x31	/* 32-low, 32-high */
81#define DAC_CURSOR_Y	0x33	/* 32-low, 32-high */
82#define DAC_CURSOR_HOT_X	0x35	/* hotspot */
83#define DAC_CURSOR_HOT_Y	0x36
84#define DAC_CURSOR_COL_1	0x40	/* red. green and blue in subseq. registers */
85#define DAC_CURSOR_COL_2	0x43	/* red. green and blue in subseq. registers */
86#define DAC_CURSOR_COL_3	0x46	/* red. green and blue in subseq. registers */
87#define DAC_PIX_PLL		0x8e
88#define DAC_CURSOR_DATA		0x100
89
90/* main registers */
91#define SYS_CONF	0x0004	/* System Configuration Register */
92	#define BUFFER_WRITE_1	0x0200	/* writes got o buffer 1 */
93	#define BUFFER_WRITE_0	0x0000	/* writes go to buffer 0 */
94	#define BUFFER_READ_1	0x0400	/* read from buffer 1 */
95	#define BUFFER_READ_0	0x0000
96	#define MEM_SWAP_BITS	0x0800	/* swap bits when accessing VRAM */
97	#define MEM_SWAP_BYTES	0x1000	/* swap bytes when accessing VRAM */
98	#define MEM_SWAP_HWORDS	0x2000	/* swap halfwords when accessing VRAM */
99	#define SHIFT_0		14
100	#define SHIFT_1		17
101	#define SHIFT_2		20
102	#define SHIFT_3		29
103	#define PIXEL_SHIFT	26
104	#define SWAP_SHIFT	11
105	/* this is what the 3GX manual says */
106	#define SC_8BIT		2
107	#define SC_16BIT	3
108	#define SC_24BIT	7
109	#define SC_32BIT	5
110
111/* video controller registers */
112#define VID_HCOUNTER	0x104
113#define VID_HTOTAL	0x108
114#define VID_HSRE	0x10c	/* hsync raising edge */
115#define VID_HBRE	0x110	/* hblank raising edge */
116#define VID_HBFE	0x114	/* hblank falling edge */
117#define VID_HCNTPRLD	0x118	/* hcounter preload */
118#define VID_VCOUNTER	0x11c	/* vcounter */
119#define VID_VLENGTH	0x120	/* lines, including blanks */
120#define VID_VSRE	0x124	/* vsync raising edge */
121#define VID_VBRE	0x128	/* vblank raising edge */
122#define VID_VBFE	0x12c	/* vblank falling edge */
123#define VID_VCNTPRLD	0x130	/* vcounter preload */
124#define VID_SRADDR	0x134	/* screen repaint address */
125#define VID_SRTC	0x138	/* screen repaint timing control */
126#define VID_QSFCNTR	0x13c	/* QSF counter */
127
128#define VID_MEM_CONFIG	0x184	/* memory config */
129#define VID_RFPERIOD	0x188	/* refresh period */
130#define VID_RFCOUNT	0x18c	/* refresh counter */
131#define VID_RLMAX	0x190	/* RAS low max */
132#define VID_RLCUR	0x194	/* RAS low current */
133#define VID_DACSYNC	0x198	/* read after last DAC access */
134
135#define ENGINE_STATUS	0x2000	/* drawing engine status register */
136	#define BLITTER_BUSY	0x80000000
137	#define ENGINE_BUSY		0x40000000
138#define COMMAND_BLIT	0x2004
139#define COMMAND_QUAD	0x2008
140#define	PIXEL_8		0x200c
141#define PIXEL_1		0x2080	/* pixel data for monochrome colour expansion */
142/* apparently bits 2-6 control how many pixels we write - n+1 */
143
144/* drawing engine registers */
145#define COORD_INDEX			0x218c
146#define WINDOW_OFFSET		0x2190
147
148#define FOREGROUND_COLOR	0x2200
149#define BACKGROUND_COLOR	0x2204
150#define COLOR_0			0x2200
151#define COLOR_1			0x2204
152#define PLANE_MASK		0x2208
153#define DRAW_MODE		0x220c
154#define PATTERN_ORIGIN_X	0x2210
155#define PATTERN_ORIGIN_Y	0x2214
156#define RASTER_OP			0x2218
157	#define ROP_NO_SOLID		0x02000	/* if set use pattern instead of color for quad operations */
158	#define ROP_2BIT_PATTERN	0x04000 /* 4-colour pattern instead of mono */
159	#define ROP_PIX1_TRANS		0x08000	/* transparent background in mono */
160	#define ROP_OVERSIZE		0x10000
161//	#define ROP_PATTERN			0x20000		/* the manual says pattern enable */
162	#define ROP_TRANS			0x20000		/* but XFree86 says trans */
163	#define ROP_SRC 			0xCC
164	#define ROP_PAT				0xF0
165	#define ROP_DST 			0xAA
166	#define ROP_SET				0xff
167
168#define PIXEL_8_REG			0x221c	/* PIXEL_8 overflow data */
169#define WINDOW_MIN			0x2220
170#define WINDOW_MAX			0x2224
171	#define CLIP_MAX			0x1fff1fff
172
173#define COLOR_2			0x2230
174#define COLOR_3			0x2234
175
176#define PATTERN0			0x2280
177#define PATTERN1			0x2284
178#define PATTERN2			0x2288
179#define PATTERN3			0x228c
180#define USER0				0x2290
181#define USER1				0x2294
182#define USER2				0x2298
183#define USER3				0x229c
184#define BYTE_CLIP_MIN		0x22a0
185#define BYTE_CLIP_MAX		0x22a4
186
187/* coordinate registers */
188#define ABS_X0		0x3008
189#define ABS_Y0		0x3010
190#define ABS_XY0		0x3018
191#define REL_X0		0x3028
192#define REL_Y0		0x3030
193#define REL_XY0		0x3038
194
195#define ABS_X1		0x3048
196#define ABS_Y1		0x3050
197#define ABS_XY1		0x3058
198#define REL_X1		0x3068
199#define REL_Y1		0x3070
200#define REL_XY1		0x3078
201
202#define ABS_X2		0x3088
203#define ABS_Y2		0x3090
204#define ABS_XY2		0x3098
205#define REL_X2		0x30a8
206#define REL_Y2		0x30b0
207#define REL_XY2		0x30b8
208
209#define ABS_X3		0x30c8
210#define ABS_Y3		0x30d0
211#define ABS_XY3		0x30d8
212#define REL_X3		0x30e8
213#define REL_Y3		0x30f0
214#define REL_XY3		0x30f8
215
216/* meta-coordinates */
217#define POINT_RTW_X		0x3208
218#define POINT_RTW_Y		0x3210
219#define POINT_RTW_XY	0x3218
220#define POINT_RTP_X		0x3228
221#define POINT_RTP_Y		0x3220
222#define POINT_RTP_XY	0x3238
223
224#define LINE_RTW_X		0x3248
225#define LINE_RTW_Y		0x3250
226#define LINE_RTW_XY		0x3258
227#define LINE_RTP_X		0x3268
228#define LINE_RTP_Y		0x3260
229#define LINE_RTP_XY		0x3278
230
231#define TRIANGLE_RTW_X	0x3288
232#define TRIANGLE_RTW_Y	0x3290
233#define TRIANGLE_RTW_XY	0x3298
234#define TRIANGLE_RTP_X	0x32a8
235#define TRIANGLE_RTP_Y	0x32a0
236#define TRIANGLE_RTP_XY	0x32b8
237
238#define QUAD_RTW_X		0x32c8
239#define QUAD_RTW_Y		0x32d0
240#define QUAD_RTW_XY		0x32d8
241#define QUAD_RTP_X		0x32e8
242#define QUAD_RTP_Y		0x32e0
243#define QUAD_RTP_XY		0x32f8
244
245#define RECT_RTW_X		0x3308
246#define RECT_RTW_Y		0x3310
247#define RECT_RTW_XY		0x3318
248#define RECT_RTP_X		0x3328
249#define RECT_RTP_Y		0x3320
250#define RECT_RTP_XY		0x3338
251
252#endif /* PNOZZ_REGS_H */
253