1 2/* 3Copyright (C) 1994-1999 The XFree86 Project, Inc. All Rights Reserved. 4 5Permission is hereby granted, free of charge, to any person obtaining a copy of 6this software and associated documentation files (the "Software"), to deal in 7the Software without restriction, including without limitation the rights to 8use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies 9of the Software, and to permit persons to whom the Software is furnished to do 10so, subject to the following conditions: 11 12The above copyright notice and this permission notice shall be included in all 13copies or substantial portions of the Software. 14 15THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FIT- 17NESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 19AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 20WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 21 22Except as contained in this notice, the name of the XFree86 Project shall not 23be used in advertising or otherwise to promote the sale, use or other dealings 24in this Software without prior written authorization from the XFree86 Project. 25*/ 26 27#ifndef _S3V_H 28#define _S3V_H 29 30#include "s3v_pcirename.h" 31 32#include <string.h> 33 34/* All drivers should typically include these */ 35#include "xf86.h" 36#include "xf86_OSproc.h" 37 38/* All drivers need this */ 39 40/* Everything using inb/outb, etc needs "compiler.h" */ 41#include "compiler.h" 42 43/* Drivers that need to access the PCI config space directly need this */ 44#include "xf86Pci.h" 45 46#include "xf86Cursor.h" 47 48#include "vgaHW.h" 49 50#include "s3v_macros.h" 51 52/* All drivers initialising the SW cursor need this */ 53#include "mipointer.h" 54 55/* All drivers using the mi colormap manipulation need this */ 56#include "micmap.h" 57 58/* fb support */ 59 60#include "fb.h" 61 62/* Drivers using the XAA interface ... */ 63#ifdef HAVE_XAA_H 64#include "xaa.h" 65#include "xaalocal.h" 66#endif 67#include "xf86fbman.h" 68#include "xf86cmap.h" 69#include "xf86i2c.h" 70 71#include "vbe.h" 72 73#include "xf86xv.h" 74#include <X11/extensions/Xv.h> 75#include "fourcc.h" 76 77#include "compat-api.h" 78#ifndef _S3V_VGAHWMMIO_H 79#define _S3V_VGAHWMMIO_H 80 81#define VGAIN8(addr) MMIO_IN8(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr))) 82#define VGAIN16(addr) MMIO_IN16(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr))) 83#define VGAIN(addr) MMIO_IN32(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr))) 84#define VGAOUT8(addr,val) MMIO_OUT8(ps3v->MapBase,(S3V_MMIO_REGSIZE + (addr)),\ 85 val) 86#define VGAOUT16(addr,val) MMIO_OUT16(ps3v->MapBase,\ 87 (S3V_MMIO_REGSIZE + (addr)), val) 88#define VGAOUT(addr, val) MMIO_OUT32(ps3v->MapBase,\ 89 (S3V_MMIO_REGSIZE + (addr)), val) 90 91#define INREG(addr) MMIO_IN32(ps3v->MapBase, addr) 92#define OUTREG(addr, val) MMIO_OUT32(ps3v->MapBase, addr, val) 93#define NEW_INREG(addr) MMIO_IN32(s3vMmioMem, addr) 94#define NEW_OUTREG(addr, val) MMIO_OUT32(s3vMmioMem, addr, val) 95 96#endif /*_S3V_VGAHWMMIO_H*/ 97 98/******************* s3v_i2c ****************************/ 99 100Bool S3V_I2CInit(ScrnInfoPtr pScrn); 101 102/******************* s3v_accel ****************************/ 103 104void S3VGEReset(ScrnInfoPtr pScrn, int from_timeout, 105 int line, const char *file); 106 107 108/*********************************************/ 109/* locals */ 110 111/* Some S3 ViRGE structs */ 112#include "newmmio.h" 113 114/* More ViRGE defines */ 115#include "regs3v.h" 116 117/*********************************************/ 118 119 120 121/* Driver data structure; this should contain all needed info for a mode */ 122/* used to be in s3v_driver.h for pre 4.0 */ 123typedef struct { 124 unsigned char SR08, SR0A, SR0F; 125 unsigned char SR10, SR11, SR12, SR13, SR15, SR18; /* SR9-SR1C, ext seq. */ 126 unsigned char SR29; 127 unsigned char SR54, SR55, SR56, SR57; 128 unsigned char Clock; 129 unsigned char s3DacRegs[0x101]; 130 unsigned char CR31, CR33, CR34, CR36, CR3A, CR3B, CR3C; 131 unsigned char CR40, CR41, CR42, CR43, CR45; 132 unsigned char CR51, CR53, CR54, CR55, CR58, CR5D, CR5E; 133 unsigned char CR63, CR65, CR66, CR67, CR68, CR69, CR6D; /* Video attrib. */ 134 unsigned char CR7B, CR7D; 135 unsigned char CR85, CR86, CR87; 136 unsigned char CR90, CR91, CR92, CR93; 137 unsigned char ColorStack[8]; /* S3 hw cursor color stack CR4A/CR4B */ 138 unsigned int STREAMS[22]; /* Streams regs */ 139 unsigned int MMPR0, MMPR1, MMPR2, MMPR3; /* MIU regs */ 140} S3VRegRec, *S3VRegPtr; 141 142 143/*********************************/ 144/* S3VPortPrivRec */ 145/*********************************/ 146 147typedef struct { 148 unsigned char brightness; 149 unsigned char contrast; 150 FBAreaPtr area; 151 RegionRec clip; 152 CARD32 colorKey; 153 CARD32 videoStatus; 154 Time offTime; 155 Time freeTime; 156 int lastPort; 157} S3VPortPrivRec, *S3VPortPrivPtr; 158 159 160/*************************/ 161/* S3VRec */ 162/*************************/ 163 164typedef struct tagS3VRec { 165 /* accel additions */ 166 CARD32 AccelFlags; 167 CARD32 AccelCmd; 168 CARD32 SrcBaseY, DestBaseY; 169 CARD32 Stride; 170 CARD32 CommonCmd; 171 CARD32 FullPlaneMask; 172 GCPtr CurrentGC; 173 /* fb support */ 174 DrawablePtr CurrentDrawable; 175 /* end accel stuff */ 176 /* ViRGE specifics -start- */ 177 /* Xv support */ 178 XF86VideoAdaptorPtr adaptor; 179 S3VPortPrivPtr portPrivate; 180 181 /* S3V console saved mode registers */ 182 S3VRegRec SavedReg; 183 /* XServer video state mode registers */ 184 S3VRegRec ModeReg; 185 /* HW Cursor info */ 186 xf86CursorInfoPtr CursorInfoRec; 187 /* Flag indicating ModeReg has been */ 188 /* duped from console state. */ 189 Bool ModeStructInit; 190 /* Is STREAMS processor needed for */ 191 /* this mode? */ 192 Bool NeedSTREAMS; 193 /* Is STREAMS running now ? */ 194 Bool STREAMSRunning; 195 /* Compatibility variables */ 196 int vgaCRIndex, vgaCRReg; 197 int Width, Bpp,Bpl, ScissB; 198 /* XAA */ 199 unsigned PlaneMask; 200 int bltbug_width1, bltbug_width2; 201 /* In units as noted, set in PreInit */ 202 int videoRambytes; 203 int videoRamKbytes; 204 /* In Kbytes, set in PreInit */ 205 int MemOffScreen; 206 /* Holds the virtual memory address */ 207 /* returned when the MMIO registers */ 208 /* are mapped with xf86MapPciMem */ 209 unsigned char * MapBase; 210 unsigned char * MapBaseDense; 211 212 /* Same as MapBase, except framebuffer*/ 213 unsigned char * FBBase; 214 /* Current visual FB starting location */ 215 unsigned char * FBStart; 216 /* Cursor storage location */ 217 CARD32 FBCursorOffset; 218 /* Saved CR53 value */ 219 unsigned char EnableMmioCR53; 220 /* Extended reg unlock storage */ 221 unsigned char CR38,CR39,CR40; 222 /* Flag indicating if vgaHWMapMem was */ 223 /* used successfully for this screen */ 224 Bool PrimaryVidMapped; 225 int HorizScaleFactor; 226 Bool bankedMono; 227 /* Memory Clock */ 228 int MCLK; 229 /* input reference Clock */ 230 int REFCLK; 231 /* MX LCD clock */ 232 int LCDClk; 233 /* MX reference clock scale */ 234 double refclk_fact; 235 /* Limit the number of errors */ 236 /* printed using a counter */ 237 int GEResetCnt; 238 /* Accel WaitFifo function */ 239 void (*pWaitFifo)(struct tagS3VRec *, int); 240 /* Accel WaitCmd function */ 241 void (*pWaitCmd)(struct tagS3VRec *); 242 243 /*************************/ 244 /* ViRGE options -start- */ 245 /*************************/ 246 OptionInfoPtr Options; 247 /* Enable PCI burst mode for reads? */ 248 Bool pci_burst; 249 /* Diasable PCI retries */ 250 Bool NoPCIRetry; 251 /* Adjust fifo for acceleration? */ 252 Bool fifo_conservative; 253 Bool fifo_moderate; 254 Bool fifo_aggressive; 255 /* Set memory options */ 256 Bool slow_edodram; 257 Bool slow_dram; 258 Bool fast_dram; 259 Bool fpm_vram; 260 /* Disable Acceleration */ 261 Bool NoAccel; 262 /* Adjust memory ras precharge */ 263 /* timing */ 264 Bool ShowCache; 265 Bool early_ras_precharge; 266 Bool late_ras_precharge; 267 /* MX LCD centering */ 268 Bool lcd_center; 269 /* hardware cursor enabled */ 270 Bool hwcursor; 271 Bool UseFB; 272 Bool mx_cr3a_fix; 273 Bool XVideo; 274 /* ViRGE options -end- */ 275 /***********************/ 276 /* ViRGE specifics -end- */ 277 278 /* Used by ViRGE driver, but generic */ 279 280 /* Pointer used to save wrapped */ 281 /* CloseScreen function. */ 282 CloseScreenProcPtr CloseScreen; 283#ifdef HAVE_XAA_H 284 /* XAA info Rec */ 285 XAAInfoRecPtr AccelInfoRec; 286#endif 287 /* PCI info vars. */ 288 pciVideoPtr PciInfo; 289#ifndef XSERVER_LIBPCIACCESS 290 PCITAG PciTag; 291#endif 292 /* Chip info, set using PCI */ 293 /* above. */ 294 int Chipset; 295 int ChipRev; 296 /* DGA2 */ 297 DGAModePtr DGAModes; 298 int numDGAModes; 299 Bool DGAactive; 300 int DGAViewportStatus; 301 I2CBusPtr I2C; 302 vbeInfoPtr pVbe; 303 Bool shadowFB; 304 int rotate; 305 unsigned char * ShadowPtr; 306 int ShadowPitch; 307 void (*PointerMoved)(SCRN_ARG_TYPE arg, int x, int y); 308 309 /* Used by ViRGE driver, but generic -end- */ 310 311 312} S3VRec, *S3VPtr; 313 314 315#define S3VPTR(p) ((S3VPtr)((p)->driverPrivate)) 316 317 318/* #define S3V_DEBUG */ 319 320#ifdef S3V_DEBUG 321#define PVERB5(arg) ErrorF(arg) 322#define VERBLEV 1 323#else 324#define PVERB5(arg) xf86ErrorFVerb(5, arg) 325#define VERBLEV 5 326#endif 327 328 329/******************* regs3v *******************************/ 330 331/* cep kjb */ 332#define VertDebug 1 333 334/* #ifndef MetroLink */ 335#if !defined (MetroLink) && !defined (VertDebug) 336#define VerticalRetraceWait() do { \ 337 VGAOUT8(vgaCRIndex, 0x17); \ 338 if ( VGAIN8(vgaCRReg) & 0x80 ) { \ 339 while ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) ; \ 340 while ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x08) ; \ 341 while ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) ; \ 342 }\ 343} while (0) 344 345#else 346#define SPIN_LIMIT 1000000 347#define VerticalRetraceWait() do { \ 348 VGAOUT8(vgaCRIndex, 0x17); \ 349 if ( VGAIN8(vgaCRReg) & 0x80 ) { \ 350 volatile unsigned long _spin_me; \ 351 for (_spin_me = 0; \ 352 ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) && _spin_me <= SPIN_LIMIT; \ 353 _spin_me++) ; \ 354 if (_spin_me > SPIN_LIMIT) \ 355 ErrorF("s3v: warning: VerticalRetraceWait timed out(1:3).\n"); \ 356 for (_spin_me = 0; \ 357 ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x08) && _spin_me <= SPIN_LIMIT; \ 358 _spin_me++) ; \ 359 if (_spin_me > SPIN_LIMIT) \ 360 ErrorF("s3v: warning: VerticalRetraceWait timed out(2:3).\n"); \ 361 for (_spin_me = 0; \ 362 ((VGAIN8(vgaIOBase + 0x0A) & 0x08) == 0x00) && _spin_me <= SPIN_LIMIT; \ 363 _spin_me++) ; \ 364 if (_spin_me > SPIN_LIMIT) \ 365 ErrorF("s3v: warning: VerticalRetraceWait timed out(3:3).\n"); \ 366 } \ 367} while (0) 368#endif 369 370 371/*********************************************************/ 372 373 374/* Various defines which are used to pass flags between the Setup and 375 * Subsequent functions. 376 */ 377 378#define NO_MONO_FILL 0x00 379#define NEED_MONO_FILL 0x01 380#define MONO_TRANSPARENCY 0x02 381 382/* prototypes */ 383/* s3v_dac.c */ 384extern void S3VCommonCalcClock(ScrnInfoPtr pScrn, DisplayModePtr mode, 385 long freq, int min_m, int min_n1, int max_n1, 386 int min_n2, int max_n2, long freq_min, long freq_max, 387 unsigned char * mdiv, unsigned char * ndiv); 388 389/* s3v_accel.c */ 390extern Bool S3VAccelInit(ScreenPtr pScreen); 391extern Bool S3VAccelInit32(ScreenPtr pScreen); 392void S3VAccelSync(ScrnInfoPtr); 393void S3VWaitFifoGX2(S3VPtr ps3v, int slots ); 394void S3VWaitFifoMain(S3VPtr ps3v, int slots ); 395void S3VWaitCmdGX2(S3VPtr ps3v); 396void S3VWaitDummy(S3VPtr ps3v); 397 398/* s3v_hwcurs.c */ 399extern Bool S3VHWCursorInit(ScreenPtr pScreen); 400 401/* s3v_driver.c */ 402void S3VAdjustFrame(ADJUST_FRAME_ARGS_DECL); 403Bool S3VSwitchMode(SWITCH_MODE_ARGS_DECL); 404 405/* s3v_dga.c */ 406Bool S3VDGAInit(ScreenPtr pScreen); 407 408/* in s3v_shadow.c */ 409void s3vPointerMoved(SCRN_ARG_TYPE index, int x, int y); 410void s3vRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 411void s3vRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 412void s3vRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 413void s3vRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 414void s3vRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 415 416/* s3v_xv.c X Video Extension support */ 417void S3VInitVideo(ScreenPtr pScreen); 418int S3VQueryXvCapable(ScrnInfoPtr); 419 420#endif /*_S3V_H*/ 421 422 423/*EOF*/ 424 425 426