1 2/* 3Copyright (C) 1994-1998 The XFree86 Project, Inc. All Rights Reserved. 4 5Permission is hereby granted, free of charge, to any person obtaining a copy of 6this software and associated documentation files (the "Software"), to deal in 7the Software without restriction, including without limitation the rights to 8use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies 9of the Software, and to permit persons to whom the Software is furnished to do 10so, subject to the following conditions: 11 12The above copyright notice and this permission notice shall be included in all 13copies or substantial portions of the Software. 14 15THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FIT- 17NESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 18XFREE86 PROJECT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 19AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 20WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 21 22Except as contained in this notice, the name of the XFree86 Project shall not 23be used in advertising or otherwise to promote the sale, use or other dealings 24in this Software without prior written authorization from the XFree86 Project. 25*/ 26 27/* 28 * s3v_dac.c 29 * Port to 4.0 design level 30 * 31 * S3 ViRGE driver 32 * 33 * 34 * s3vcommonCalcClock from S3gendac.c in pre 4.0 tree. 35 * 36 */ 37 38#ifdef HAVE_CONFIG_H 39#include "config.h" 40#endif 41 42#include "s3v.h" 43 44 45#define BASE_FREQ 14.31818 /* MHz */ 46 47 48 /* function */ 49void 50S3VCommonCalcClock(ScrnInfoPtr pScrn, DisplayModePtr mode, 51 long freq, int min_m, int min_n1, 52 int max_n1, int min_n2, int max_n2, 53 long freq_min, long freq_max, 54 unsigned char * mdiv, unsigned char * ndiv) 55{ 56 double ffreq, ffreq_min, ffreq_max, ffreq_min_warn; 57 double div, diff, best_diff; 58 unsigned int m; 59 unsigned char n1, n2; 60 unsigned char best_n1=16+2, best_n2=2, best_m=125+2; 61 62 ffreq = freq / 1000.0 / BASE_FREQ; 63 ffreq_min = freq_min / 1000.0 / BASE_FREQ; 64 ffreq_max = freq_max / 1000.0 / BASE_FREQ; 65 66 /* Doublescan modes can run at half the min frequency */ 67 /* But only use that value for warning and changing */ 68 /* ffreq, don't change the actual min used for clock calcs below. */ 69 if(mode->Flags & V_DBLSCAN && ffreq_min) 70 ffreq_min_warn = ffreq_min / 2; 71 else 72 ffreq_min_warn = ffreq_min; 73 74 if (ffreq < ffreq_min_warn / (1<<max_n2)) { 75 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 76 "invalid frequency %1.3f MHz [freq <= %1.3f MHz]\n", 77 ffreq*BASE_FREQ, ffreq_min_warn*BASE_FREQ / (1<<max_n2)); 78 ffreq = ffreq_min_warn / (1<<max_n2); 79 } 80 if (ffreq > ffreq_max / (1<<min_n2)) { 81 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, 82 "invalid frequency %1.3f MHz [freq >= %1.3f MHz]\n", 83 ffreq*BASE_FREQ, ffreq_max*BASE_FREQ / (1<<min_n2)); 84 ffreq = ffreq_max / (1<<min_n2); 85 } 86 87 /* work out suitable timings */ 88 89 best_diff = ffreq; 90 91 for (n2=min_n2; n2<=max_n2; n2++) { 92 for (n1 = min_n1+2; n1 <= max_n1+2; n1++) { 93 m = (int)(ffreq * n1 * (1<<n2) + 0.5) ; 94 if (m < min_m+2 || m > 127+2) 95 continue; 96 div = (double)(m) / (double)(n1); 97 if ((div >= ffreq_min) && 98 (div <= ffreq_max)) { 99 diff = ffreq - div / (1<<n2); 100 if (diff < 0.0) 101 diff = -diff; 102 if (diff < best_diff) { 103 best_diff = diff; 104 best_m = m; 105 best_n1 = n1; 106 best_n2 = n2; 107 } 108 } 109 } 110 } 111 112#ifdef EXTENDED_DEBUG 113 ErrorF("Clock parameters for %1.6f MHz: m=%d, n1=%d, n2=%d\n", 114 ((double)(best_m) / (double)(best_n1) / (1 << best_n2)) * BASE_FREQ, 115 best_m-2, best_n1-2, best_n2); 116#endif 117 118 if (max_n1 == 63) 119 *ndiv = (best_n1 - 2) | (best_n2 << 6); 120 else 121 *ndiv = (best_n1 - 2) | (best_n2 << 5); 122 *mdiv = best_m - 2; 123} 124 125