1/* 2 * Global data and definitions 3 * 4 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1) Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2) Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3) The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Author: Thomas Winischhofer <thomas@winischhofer.net> 29 * 30 */ 31 32/* VESA */ 33/* The following is included because there are BIOSes out there that 34 * report incomplete mode lists. These are 630 BIOS versions <2.01.2x 35 * -) VBE 3.0 on SiS300 and 315 series do not support 24 fpp modes 36 * -) Only SiS315 series support 1920x1440x32 37 */ 38 39static const UShort VESAModeIndices[] = { 40 /* x y 8 16 (24) 32 */ 41 320, 200, 0x138, 0x10e, 0x000, 0x000, 42 320, 240, 0x132, 0x135, 0x000, 0x000, 43 400, 300, 0x133, 0x136, 0x000, 0x000, 44 512, 384, 0x134, 0x137, 0x000, 0x000, 45 640, 400, 0x100, 0x139, 0x000, 0x000, 46 640, 480, 0x101, 0x111, 0x000, 0x13a, 47 800, 600, 0x103, 0x114, 0x000, 0x13b, 48 1024, 768, 0x105, 0x117, 0x000, 0x13c, 49 1280,1024, 0x107, 0x11a, 0x000, 0x13d, 50 1600,1200, 0x130, 0x131, 0x000, 0x13e, 51 1920,1440, 0x13f, 0x140, 0x000, 0x141, 52 9999,9999, 0, 0, 0, 0 53}; 54 55/* For calculating refresh rate index (CR33) */ 56static const struct _sis_vrate { 57 CARD16 idx; 58 CARD16 xres; 59 CARD16 yres; 60 CARD16 refresh; 61 Bool SiS730valid32bpp; 62} sisx_vrate[] = { 63 {1, 320, 200, 60, TRUE}, {1, 320, 200, 70, TRUE}, 64 {1, 320, 240, 60, TRUE}, 65 {1, 400, 300, 60, TRUE}, 66 {1, 512, 384, 60, TRUE}, 67 {1, 640, 400, 60, TRUE}, {1, 640, 400, 72, TRUE}, 68 {1, 640, 480, 60, TRUE}, {2, 640, 480, 72, TRUE}, {3, 640, 480, 75, TRUE}, 69 {4, 640, 480, 85, TRUE}, {5, 640, 480, 100, TRUE}, {6, 640, 480, 120, TRUE}, 70 {7, 640, 480, 160, FALSE}, {8, 640, 480, 200, FALSE}, 71 {1, 720, 480, 60, TRUE}, 72 {1, 720, 576, 60, TRUE}, 73 {1, 768, 576, 60, TRUE}, 74 {1, 800, 480, 60, TRUE}, {2, 800, 480, 75, TRUE}, {3, 800, 480, 85, TRUE}, 75 {1, 800, 600, 56, TRUE}, {2, 800, 600, 60, TRUE}, {3, 800, 600, 72, TRUE}, 76 {4, 800, 600, 75, TRUE}, {5, 800, 600, 85, TRUE}, {6, 800, 600, 105, TRUE}, 77 {7, 800, 600, 120, FALSE}, {8, 800, 600, 160, FALSE}, 78 {1, 848, 480, 39, TRUE}, {2, 848, 480, 60, TRUE}, 79 {1, 856, 480, 39, TRUE}, {2, 856, 480, 60, TRUE}, 80 {1, 960, 540, 60, TRUE}, 81 {1, 960, 600, 60, TRUE}, 82 {1, 1024, 576, 60, TRUE}, {2, 1024, 576, 75, TRUE}, {3, 1024, 576, 85, TRUE}, 83 {1, 1024, 600, 60, TRUE}, 84 {1, 1024, 768, 43, TRUE}, {2, 1024, 768, 60, TRUE}, {3, 1024, 768, 70, FALSE}, 85 {4, 1024, 768, 75, FALSE}, {5, 1024, 768, 85, TRUE}, {6, 1024, 768, 100, TRUE}, 86 {7, 1024, 768, 120, TRUE}, 87 {1, 1152, 768, 60, TRUE}, 88 {1, 1152, 864, 60, TRUE}, {2, 1152, 864, 75, TRUE}, {3, 1152, 864, 84, FALSE}, 89 {1, 1280, 720, 60, TRUE}, {2, 1280, 720, 75, FALSE}, {3, 1280, 720, 85, TRUE}, 90 {1, 1280, 768, 60, TRUE}, {2, 1280, 768, 75, TRUE}, {3, 1280, 768, 85, TRUE}, 91 {1, 1280, 800, 60, TRUE}, {2, 1280, 800, 75, TRUE}, {3, 1280, 800, 85, TRUE}, 92 {1, 1280, 854, 60, TRUE}, {2, 1280, 854, 75, TRUE}, {3, 1280, 854, 85, TRUE}, 93 {1, 1280, 960, 60, TRUE}, {2, 1280, 960, 85, TRUE}, 94 {1, 1280, 1024, 43, FALSE}, {2, 1280, 1024, 60, TRUE}, {3, 1280, 1024, 75, FALSE}, 95 {4, 1280, 1024, 85, TRUE}, 96 {1, 1360, 768, 60, TRUE}, 97 {1, 1400, 1050, 60, TRUE}, {2, 1400, 1050, 75, TRUE}, 98 {1, 1600, 1200, 60, TRUE}, {2, 1600, 1200, 65, TRUE}, {3, 1600, 1200, 70, TRUE}, 99 {4, 1600, 1200, 75, TRUE}, {5, 1600, 1200, 85, TRUE}, {6, 1600, 1200, 100, TRUE}, 100 {7, 1600, 1200, 120, TRUE}, 101 {1, 1680, 1050, 60, TRUE}, 102 {1, 1920, 1080, 30, TRUE}, 103 {1, 1920, 1440, 60, TRUE}, {2, 1920, 1440, 65, TRUE}, {3, 1920, 1440, 70, TRUE}, 104 {4, 1920, 1440, 75, TRUE}, {5, 1920, 1440, 85, TRUE}, {6, 1920, 1440, 100, TRUE}, 105 {1, 2048, 1536, 60, TRUE}, {2, 2048, 1536, 65, TRUE}, {3, 2048, 1536, 70, TRUE}, 106 {4, 2048, 1536, 75, TRUE}, {5, 2048, 1536, 85, TRUE}, 107 {0, 0, 0, 0, FALSE} 108}; 109 110/* Some 300-series laptops have a badly designed BIOS and make it 111 * impossible to detect the correct panel delay compensation. This 112 * table used to detect such machines by their PCI subsystem IDs; 113 * however, I don't know how reliable this method is. (With Asus 114 * machines, it is to general, ASUS uses the same ID for different 115 * boxes) 116 */ 117static const pdctable mypdctable[] = { 118 { 0x1071, 0x7522, 32, "Mitac", "7521T" }, 119 { 0, 0, 0, "" , "" } 120}; 121 122/* These machines require setting/clearing a GPIO bit for enabling/ 123 * disabling communication with the Chrontel TV encoder 124 */ 125static const chswtable mychswtable[] = { 126 { 0x1631, 0x1002, "Mitachi", "0x1002" }, 127 { 0x1071, 0x7521, "Mitac" , "7521P" }, 128 { 0, 0, "" , "" } 129}; 130 131/* These machines require special timing/handling 132 */ 133const customttable SiS_customttable[] = { 134 { SIS_630, "2.00.07", "09/27/2002-13:38:25", 135 0x3240A8, 136 { 0x220, 0x227, 0x228, 0x229, 0x0ee }, 137 { 0x01, 0xe3, 0x9a, 0x6a, 0xef }, 138 0x1039, 0x6300, 139 "Barco", "iQ R200L/300/400", CUT_BARCO1366, "BARCO_1366" 140 }, 141 { SIS_630, "2.00.07", "09/27/2002-13:38:25", 142 0x323FBD, 143 { 0x220, 0x227, 0x228, 0x229, 0x0ee }, 144 { 0x00, 0x5a, 0x64, 0x41, 0xef }, 145 0x1039, 0x6300, 146 "Barco", "iQ G200L/300/400/500", CUT_BARCO1024, "BARCO_1024" 147 }, 148 { SIS_650, "", "", 149 0, 150 { 0, 0, 0, 0, 0 }, 151 { 0, 0, 0, 0, 0 }, 152 0x0e11, 0x083c, 153 "Inventec (Compaq)", "3017cl/3045US", CUT_COMPAQ12802, "COMPAQ_1280" 154 }, 155 { SIS_650, "", "", 156 0, /* Special 1024x768 / dual link */ 157 { 0x00c, 0, 0, 0, 0 }, 158 { 'e' , 0, 0, 0, 0 }, 159 0x1558, 0x0287, 160 "Clevo", "L285/L287 (Version 1)", CUT_CLEVO1024, "CLEVO_L28X_1" 161 }, 162 { SIS_650, "", "", 163 0, /* Special 1024x768 / single link */ 164 { 0x00c, 0, 0, 0, 0 }, 165 { 'y' , 0, 0, 0, 0 }, 166 0x1558, 0x0287, 167 "Clevo", "L285/L287 (Version 2)", CUT_CLEVO10242, "CLEVO_L28X_2" 168 }, 169 { SIS_650, "", "", 170 0, /* Special 1400x1050 */ 171 { 0, 0, 0, 0, 0 }, 172 { 0, 0, 0, 0, 0 }, 173 0x1558, 0x0400, /* possibly 401 and 402 as well; not panelsize specific? */ 174 "Clevo", "D400S/D410S/D400H/D410H", CUT_CLEVO1400, "CLEVO_D4X0" 175 }, 176 { SIS_650, "", "", 177 0, /* Shift LCD in LCD-via-CRT1 mode */ 178 { 0, 0, 0, 0, 0 }, 179 { 0, 0, 0, 0, 0 }, 180 0x1558, 0x2263, 181 "Clevo", "D22ES/D27ES", CUT_UNIWILL1024, "CLEVO_D2X0ES" 182 }, 183 { SIS_650, "", "", 184 0, /* Shift LCD in LCD-via-CRT1 mode */ 185 { 0, 0, 0, 0, 0 }, 186 { 0, 0, 0, 0, 0 }, 187 0x1734, 0x101f, 188 "Uniwill", "N243S9", CUT_UNIWILL1024, "UNIWILL_N243S9" 189 }, 190 { SIS_650, "", "", 191 0, /* Shift LCD in LCD-via-CRT1 mode */ 192 { 0, 0, 0, 0, 0 }, 193 { 0, 0, 0, 0, 0 }, 194 0x1584, 0x5103, 195 "Uniwill", "N35BS1", CUT_UNIWILL10242, "UNIWILL_N35BS1" 196 }, 197 { SIS_650, "1.09.2c", "", /* Other versions, too? */ 198 0, /* Shift LCD in LCD-via-CRT1 mode */ 199 { 0, 0, 0, 0, 0 }, 200 { 0, 0, 0, 0, 0 }, 201 0x1019, 0x0f05, 202 "ECS", "A928", CUT_UNIWILL1024, "ECS_A928" 203 }, 204 { SIS_740, "1.11.27a", "", 205 0, 206 { 0, 0, 0, 0, 0 }, 207 { 0, 0, 0, 0, 0 }, 208 0x1043, 0x1612, 209 "Asus", "L3000D/L3500D", CUT_ASUSL3000D, "ASUS_L3X00" 210 }, 211 { SIS_650, "1.10.9k", "", 212 0, /* For EMI */ 213 { 0, 0, 0, 0, 0 }, 214 { 0, 0, 0, 0, 0 }, 215 0x1025, 0x0028, 216 "Acer", "Aspire 1700", CUT_ACER1280, "ACER_ASPIRE1700" 217 }, 218 { SIS_650, "1.10.7w", "", 219 0, /* For EMI */ 220 { 0, 0, 0, 0, 0 }, 221 { 0, 0, 0, 0, 0 }, 222 0x14c0, 0x0012, 223 "Compal", "??? (V1)", CUT_COMPAL1400_1, "COMPAL_1400_1" 224 }, 225 { SIS_650, "1.10.7x", "", /* New BIOS on its way (from BG.) */ 226 0, /* For EMI */ 227 { 0, 0, 0, 0, 0 }, 228 { 0, 0, 0, 0, 0 }, 229 0x14c0, 0x0012, 230 "Compal", "??? (V2)", CUT_COMPAL1400_2, "COMPAL_1400_2" 231 }, 232 { SIS_650, "1.10.8o", "", 233 0, /* For EMI (unknown) */ 234 { 0, 0, 0, 0, 0 }, 235 { 0, 0, 0, 0, 0 }, 236 0x1043, 0x1612, 237 "Asus", "A2H (V1)", CUT_ASUSA2H_1, "ASUS_A2H_1" 238 }, 239 { SIS_650, "1.10.8q", "", 240 0, /* For EMI */ 241 { 0, 0, 0, 0, 0 }, 242 { 0, 0, 0, 0, 0 }, 243 0x1043, 0x1612, 244 "Asus", "A2H (V2)", CUT_ASUSA2H_2, "ASUS_A2H_2" 245 }, 246#if 0 247 { SIS_550, "1.02.0z", "", 248 0x317f37, /* 320x240 LCD panel */ 249 { 0, 0, 0, 0, 0 }, 250 { 0, 0, 0, 0, 0 }, 251 0, 0, 252 "AAEON", "AOP-8060", CUT_AOP8060, "AAEON_AOP_8060" 253 }, 254#endif 255 { 4321, "", "", /* never autodetected */ 256 0, 257 { 0, 0, 0, 0, 0 }, 258 { 0, 0, 0, 0, 0 }, 259 0, 0, 260 "Generic", "LVDS/Parallel 848x480", CUT_PANEL848, "PANEL848x480" 261 }, 262 { 4322, "", "", /* never autodetected */ 263 0, 264 { 0, 0, 0, 0, 0 }, 265 { 0, 0, 0, 0, 0 }, 266 0, 0, 267 "Generic", "LVDS/Parallel 856x480", CUT_PANEL856, "PANEL856x480" 268 }, 269 { 0, "", "", 270 0, 271 { 0, 0, 0, 0 }, 272 { 0, 0, 0, 0 }, 273 0, 0, 274 "", "", CUT_NONE, "" 275 } 276}; 277 278/* Our TV modes for the 6326. The data in these structures 279 * is mainly correct, but since we use our private CR and 280 * clock values anyway, small errors do no matter. 281 */ 282static DisplayModeRec SiS6326PAL800x600Mode = { 283 NULL, NULL, /* prev, next */ 284 "PAL800x600", /* identifier of this mode */ 285 MODE_OK, /* mode status */ 286 M_T_BUILTIN, /* mode type */ 287 36000, /* Clock frequency */ 288 800, /* HDisplay */ 289 848, /* HSyncStart */ 290 912, /* HSyncEnd */ 291 1008, /* HTotal */ 292 0, /* HSkew */ 293 600, /* VDisplay */ 294 600, /* VSyncStart */ 295 602, /* VSyncEnd */ 296 625, /* VTotal */ 297 0, /* VScan */ 298 V_PHSYNC | V_PVSYNC, /* Flags */ 299 -1, /* ClockIndex */ 300 36000, /* SynthClock */ 301 800, /* CRTC HDisplay */ 302 808, /* CRTC HBlankStart */ 303 848, /* CRTC HSyncStart */ 304 912, /* CRTC HSyncEnd */ 305 1008, /* CRTC HBlankEnd */ 306 1008, /* CRTC HTotal */ 307 0, /* CRTC HSkew */ 308 600, /* CRTC VDisplay */ 309 600, /* CRTC VBlankStart */ 310 600, /* CRTC VSyncStart */ 311 602, /* CRTC VSyncEnd */ 312 625, /* CRTC VBlankEnd */ 313 625, /* CRTC VTotal */ 314 FALSE, /* CrtcHAdjusted */ 315 FALSE, /* CrtcVAdjusted */ 316 0, /* PrivSize */ 317 NULL, /* Private */ 318 0.0, /* HSync */ 319 0.0 /* VRefresh */ 320}; 321 322/* Due to the scaling method this mode uses, the vertical data here 323 * does not match the CR data. But this does not matter, we use our 324 * private CR data anyway. 325 */ 326static DisplayModeRec SiS6326PAL800x600UMode = { 327 NULL, /* prev */ 328 &SiS6326PAL800x600Mode, /* next */ 329 "PAL800x600U", /* identifier of this mode */ 330 MODE_OK, /* mode status */ 331 M_T_BUILTIN, /* mode type */ 332 37120, /* Clock frequency */ 333 800, /* HDisplay */ 334 872, /* HSyncStart */ 335 984, /* HSyncEnd */ 336 1088, /* HTotal */ 337 0, /* HSkew */ 338 600, /* VDisplay (548 due to scaling) */ 339 600, /* VSyncStart (584) */ 340 602, /* VSyncEnd (586) */ 341 625, /* VTotal */ 342 0, /* VScan */ 343 V_PHSYNC | V_PVSYNC, /* Flags */ 344 -1, /* ClockIndex */ 345 37120, /* SynthClock */ 346 800, /* CRTC HDisplay */ 347 808, /* CRTC HBlankStart */ 348 872, /* CRTC HSyncStart */ 349 984, /* CRTC HSyncEnd */ 350 1024, /* CRTC HBlankEnd */ 351 1088, /* CRTC HTotal */ 352 0, /* CRTC HSkew */ 353 600, /* CRTC VDisplay (548 due to scaling) */ 354 600, /* CRTC VBlankStart (600) */ 355 600, /* CRTC VSyncStart (584) */ 356 602, /* CRTC VSyncEnd (586) */ 357 625, /* CRTC VBlankEnd */ 358 625, /* CRTC VTotal */ 359 FALSE, /* CrtcHAdjusted */ 360 FALSE, /* CrtcVAdjusted */ 361 0, /* PrivSize */ 362 NULL, /* Private */ 363 0.0, /* HSync */ 364 0.0 /* VRefresh */ 365}; 366 367static DisplayModeRec SiS6326PAL720x540Mode = { 368 NULL, /* prev */ 369 &SiS6326PAL800x600UMode, /* next */ 370 "PAL720x540", /* identifier of this mode */ 371 MODE_OK, /* mode status */ 372 M_T_BUILTIN, /* mode type */ 373 36000, /* Clock frequency */ 374 720, /* HDisplay */ 375 816, /* HSyncStart */ 376 920, /* HSyncEnd */ 377 1008, /* HTotal */ 378 0, /* HSkew */ 379 540, /* VDisplay */ 380 578, /* VSyncStart */ 381 580, /* VSyncEnd */ 382 625, /* VTotal */ 383 0, /* VScan */ 384 V_PHSYNC | V_PVSYNC, /* Flags */ 385 -1, /* ClockIndex */ 386 36000, /* SynthClock */ 387 720, /* CRTC HDisplay */ 388 736, /* CRTC HBlankStart */ 389 816, /* CRTC HSyncStart */ 390 920, /* CRTC HSyncEnd */ 391 1008, /* CRTC HBlankEnd */ 392 1008, /* CRTC HTotal */ 393 0, /* CRTC HSkew */ 394 540, /* CRTC VDisplay */ 395 577, /* CRTC VBlankStart */ 396 578, /* CRTC VSyncStart */ 397 580, /* CRTC VSyncEnd */ 398 625, /* CRTC VBlankEnd */ 399 625, /* CRTC VTotal */ 400 FALSE, /* CrtcHAdjusted */ 401 FALSE, /* CrtcVAdjusted */ 402 0, /* PrivSize */ 403 NULL, /* Private */ 404 0.0, /* HSync */ 405 0.0 /* VRefresh */ 406}; 407 408static DisplayModeRec SiS6326PAL640x480Mode = { 409 NULL, /* prev */ 410 &SiS6326PAL720x540Mode, /* next */ 411 "PAL640x480", /* identifier of this mode */ 412 MODE_OK, /* mode status */ 413 M_T_BUILTIN, /* mode type */ 414 36000, /* Clock frequency */ 415 640, /* HDisplay */ 416 768, /* HSyncStart */ 417 920, /* HSyncEnd */ 418 1008, /* HTotal */ 419 0, /* HSkew */ 420 480, /* VDisplay */ 421 532, /* VSyncStart */ 422 534, /* VSyncEnd */ 423 625, /* VTotal */ 424 0, /* VScan */ 425 V_NHSYNC | V_NVSYNC, /* Flags */ 426 -1, /* ClockIndex */ 427 36000, /* SynthClock */ 428 640, /* CRTC HDisplay */ 429 648, /* CRTC HBlankStart */ 430 768, /* CRTC HSyncStart */ 431 920, /* CRTC HSyncEnd */ 432 944, /* CRTC HBlankEnd */ 433 1008, /* CRTC HTotal */ 434 0, /* CRTC HSkew */ 435 480, /* CRTC VDisplay */ 436 481, /* CRTC VBlankStart */ 437 532, /* CRTC VSyncStart */ 438 534, /* CRTC VSyncEnd */ 439 561, /* CRTC VBlankEnd */ 440 625, /* CRTC VTotal */ 441 FALSE, /* CrtcHAdjusted */ 442 FALSE, /* CrtcVAdjusted */ 443 0, /* PrivSize */ 444 NULL, /* Private */ 445 0.0, /* HSync */ 446 0.0 /* VRefresh */ 447}; 448 449static DisplayModeRec SiS6326NTSC640x480Mode = { 450 NULL, NULL, /* prev, next */ 451 "NTSC640x480", /* identifier of this mode */ 452 MODE_OK, /* mode status */ 453 M_T_BUILTIN, /* mode type */ 454 27000, /* Clock frequency */ 455 640, /* HDisplay */ 456 664, /* HSyncStart */ 457 760, /* HSyncEnd */ 458 800, /* HTotal */ 459 0, /* HSkew */ 460 480, /* VDisplay */ 461 489, /* VSyncStart */ 462 491, /* VSyncEnd */ 463 525, /* VTotal */ 464 0, /* VScan */ 465 V_NHSYNC | V_NVSYNC, /* Flags */ 466 -1, /* ClockIndex */ 467 27000, /* SynthClock */ 468 640, /* CRTC HDisplay */ 469 648, /* CRTC HBlankStart */ 470 664, /* CRTC HSyncStart */ 471 760, /* CRTC HSyncEnd */ 472 792, /* CRTC HBlankEnd */ 473 800, /* CRTC HTotal */ 474 0, /* CRTC HSkew */ 475 480, /* CRTC VDisplay */ 476 488, /* CRTC VBlankStart */ 477 489, /* CRTC VSyncStart */ 478 491, /* CRTC VSyncEnd */ 479 517, /* CRTC VBlankEnd */ 480 525, /* CRTC VTotal */ 481 FALSE, /* CrtcHAdjusted */ 482 FALSE, /* CrtcVAdjusted */ 483 0, /* PrivSize */ 484 NULL, /* Private */ 485 0.0, /* HSync */ 486 0.0 /* VRefresh */ 487}; 488 489/* Due to the scaling method this mode uses, the vertical data here 490 * does not match the CR data. But this does not matter, we use our 491 * private CR data anyway. 492 */ 493static DisplayModeRec SiS6326NTSC640x480UMode = { 494 NULL, /* prev */ 495 &SiS6326NTSC640x480Mode, /* next */ 496 "NTSC640x480U", /* identifier of this mode */ 497 MODE_OK, /* mode status */ 498 M_T_BUILTIN, /* mode type */ 499 32215, /* Clock frequency */ 500 640, /* HDisplay */ 501 696, /* HSyncStart */ 502 840, /* HSyncEnd */ 503 856, /* HTotal */ 504 0, /* HSkew */ 505 480, /* VDisplay (439 due to scaling) */ 506 489, /* VSyncStart (473) */ 507 491, /* VSyncEnd (475) */ 508 525, /* VTotal */ 509 0, /* VScan */ 510 V_NHSYNC | V_NVSYNC, /* Flags */ 511 -1, /* ClockIndex */ 512 32215, /* SynthClock */ 513 640, /* CRTC HDisplay */ 514 656, /* CRTC HBlankStart */ 515 696, /* CRTC HSyncStart */ 516 840, /* CRTC HSyncEnd */ 517 856, /* CRTC HBlankEnd */ 518 856, /* CRTC HTotal */ 519 0, /* CRTC HSkew */ 520 480, /* CRTC VDisplay */ 521 488, /* CRTC VBlankStart */ 522 489, /* CRTC VSyncStart */ 523 491, /* CRTC VSyncEnd */ 524 517, /* CRTC VBlankEnd */ 525 525, /* CRTC VTotal */ 526 FALSE, /* CrtcHAdjusted */ 527 FALSE, /* CrtcVAdjusted */ 528 0, /* PrivSize */ 529 NULL, /* Private */ 530 0.0, /* HSync */ 531 0.0 /* VRefresh */ 532}; 533 534 535static DisplayModeRec SiS6326NTSC640x400Mode = { 536 NULL, /* prev */ 537 &SiS6326NTSC640x480UMode, /* next */ 538 "NTSC640x400", /* identifier of this mode */ 539 MODE_OK, /* mode status */ 540 M_T_BUILTIN, /* mode type */ 541 27000, /* Clock frequency */ 542 640, /* HDisplay */ 543 664, /* HSyncStart */ 544 760, /* HSyncEnd */ 545 800, /* HTotal */ 546 0, /* HSkew */ 547 400, /* VDisplay */ 548 459, /* VSyncStart */ 549 461, /* VSyncEnd */ 550 525, /* VTotal */ 551 0, /* VScan */ 552 V_NHSYNC | V_NVSYNC, /* Flags */ 553 -1, /* ClockIndex */ 554 27000, /* SynthClock */ 555 640, /* CRTC HDisplay */ 556 648, /* CRTC HBlankStart */ 557 664, /* CRTC HSyncStart */ 558 760, /* CRTC HSyncEnd */ 559 792, /* CRTC HBlankEnd */ 560 800, /* CRTC HTotal */ 561 0, /* CRTC HSkew */ 562 400, /* CRTC VDisplay */ 563 407, /* CRTC VBlankStart */ 564 459, /* CRTC VSyncStart */ 565 461, /* CRTC VSyncEnd */ 566 490, /* CRTC VBlankEnd */ 567 525, /* CRTC VTotal */ 568 FALSE, /* CrtcHAdjusted */ 569 FALSE, /* CrtcVAdjusted */ 570 0, /* PrivSize */ 571 NULL, /* Private */ 572 0.0, /* HSync */ 573 0.0 /* VRefresh */ 574}; 575 576/* Built-in hi-res modes for the 6326. 577 * For some reason, our default mode lines and the 578 * clock calculation functions in sis_dac.c do no 579 * good job on higher clocks. It seems, the hardware 580 * needs some tricks so make mode with higher clock 581 * rates than ca. 120MHz work. I didn't bother trying 582 * to find out what exactly is going wrong, so I 583 * implemented two special modes instead for 1280x1024 584 * and 1600x1200. These two are automatically added 585 * to the list if they are supported with the current 586 * depth. 587 * The data in the strucures below is a proximation, 588 * in sis_vga.c the register contents are fetched from 589 * fixed tables anyway. 590 */ 591static DisplayModeRec SiS6326SIS1280x1024_75Mode = { 592 NULL, /* prev */ 593 NULL, /* next */ 594 "SIS1280x1024-75", /* identifier of this mode */ 595 MODE_OK, /* mode status */ 596 M_T_BUILTIN, /* mode type */ 597 135000, /* Clock frequency */ 598 1280, /* HDisplay */ 599 1296, /* HSyncStart */ 600 1440, /* HSyncEnd */ 601 1688, /* HTotal */ 602 0, /* HSkew */ 603 1024, /* VDisplay */ 604 1025, /* VSyncStart */ 605 1028, /* VSyncEnd */ 606 1066, /* VTotal */ 607 0, /* VScan */ 608 V_PHSYNC | V_PVSYNC, /* Flags */ 609 -1, /* ClockIndex */ 610 135000, /* SynthClock */ 611 1280, /* CRTC HDisplay */ 612 1280, /* CRTC HBlankStart */ 613 1296, /* CRTC HSyncStart */ 614 1440, /* CRTC HSyncEnd */ 615 1680, /* CRTC HBlankEnd */ 616 1688, /* CRTC HTotal */ 617 0, /* CRTC HSkew */ 618 1024, /* CRTC VDisplay */ 619 1024, /* CRTC VBlankStart */ 620 1025, /* CRTC VSyncStart */ 621 1028, /* CRTC VSyncEnd */ 622 1065, /* CRTC VBlankEnd */ 623 1066, /* CRTC VTotal */ 624 FALSE, /* CrtcHAdjusted */ 625 FALSE, /* CrtcVAdjusted */ 626 0, /* PrivSize */ 627 NULL, /* Private */ 628 0.0, /* HSync */ 629 0.0 /* VRefresh */ 630}; 631 632static DisplayModeRec SiS6326SIS1600x1200_60Mode = { 633 NULL, /* prev */ 634 NULL, /* next */ 635 "SIS1600x1200-60", /* identifier of this mode */ 636 MODE_OK, /* mode status */ 637 M_T_BUILTIN, /* mode type */ 638 162000, /* Clock frequency */ 639 1600, /* HDisplay */ 640 1664, /* HSyncStart */ 641 1856, /* HSyncEnd */ 642 2160, /* HTotal */ 643 0, /* HSkew */ 644 1200, /* VDisplay */ 645 1201, /* VSyncStart */ 646 1204, /* VSyncEnd */ 647 1250, /* VTotal */ 648 0, /* VScan */ 649 V_PHSYNC | V_PVSYNC, /* Flags */ 650 -1, /* ClockIndex */ 651 162000, /* SynthClock */ 652 1600, /* CRTC HDisplay */ 653 1600, /* CRTC HBlankStart */ 654 1664, /* CRTC HSyncStart */ 655 1856, /* CRTC HSyncEnd */ 656 2152, /* CRTC HBlankEnd */ 657 2160, /* CRTC HTotal */ 658 0, /* CRTC HSkew */ 659 1200, /* CRTC VDisplay */ 660 1200, /* CRTC VBlankStart */ 661 1201, /* CRTC VSyncStart */ 662 1204, /* CRTC VSyncEnd */ 663 1249, /* CRTC VBlankEnd */ 664 1250, /* CRTC VTotal */ 665 FALSE, /* CrtcHAdjusted */ 666 FALSE, /* CrtcVAdjusted */ 667 0, /* PrivSize */ 668 NULL, /* Private */ 669 0.0, /* HSync */ 670 0.0 /* VRefresh */ 671}; 672 673/* TV scaling data for SiS video bridges 674 */ 675typedef struct _SiSTVVScale { 676 UShort ScaleVDE; 677 int sindex; 678 UShort RealVDE; 679 UShort reg[4]; 680} MySiSTVVScale, *MySiSTVVScalePtr; 681 682static const MySiSTVVScale SiSTVVScale[] = { 683 { 470, 3, 480, /* NTSC 640x480 */ 684 { 893, 508, 0x004c, 0x008f } 685 }, 686 { 460, 2, 480, 687 { 874, 513, 0x004c, 0x008f } 688 }, 689 { 450, 1, 480, 690 { 855, 518, 0x004c, 0x008f } 691 }, 692 { 440, 0, 480, /* default */ 693 { 836, 523, 0x004c, 0x008f } 694 }, 695 { 430, -1, 480, 696 { 860, 528, 0x0050, 0x008f } 697 }, 698 { 420, -2, 480, 699 { 840, 533, 0x0050, 0x008f } 700 }, 701 { 410, -3, 480, 702 { 820, 538, 0x0050, 0x008f } 703 }, 704 { 470, 3, 480, /* NTSC 720x480 */ 705 { 893, 509, 0x004c, 0x008f } 706 }, 707 { 460, 2, 480, 708 { 874, 514, 0x004c, 0x008f } 709 }, 710 { 450, 1, 480, 711 { 855, 519, 0x004c, 0x008f } 712 }, 713 { 440, 0, 480, /* default */ 714 { 836, 524, 0x004c, 0x008f } 715 }, 716 { 430, -1, 480, 717 { 860, 529, 0x0050, 0x008f } 718 }, 719 { 420, -2, 480, 720 { 840, 534, 0x0050, 0x008f } 721 }, 722 { 410, -3, 480, 723 { 820, 539, 0x0050, 0x008f } 724 }, 725 { 470, 3, 600, /* NTSC 800x600 */ 726 { 1081, 628, 0x0073, 0x008f } 727 }, 728 { 460, 2, 600, 729 { 1058, 633, 0x0073, 0x008f } 730 }, 731 { 450, 1, 600, 732 { 1044, 638, 0x0074, 0x008f } 733 }, 734 { 440, 0, 600, /* default */ 735 { 1056, 643, 0x0078, 0x008f } 736 }, 737 { 430, -1, 600, 738 { 1032, 648, 0x0078, 0x008f } 739 }, 740 { 420, -2, 600, 741 { 1008, 653, 0x0078, 0x008f } 742 }, 743 { 410, -3, 600, 744 { 1066, 658, 0x0082, 0x008f } 745 }, 746 { 560, 3, 480, /* PAL 640x480 */ 747 { 882, 513, 0x0007, 0x0010 } 748 }, 749 { 550, 2, 480, 750 { 900, 518, 0x0005, 0x000b } 751 }, 752 { 540, 1, 480, 753 { 864, 523, 0x0004, 0x0009 } 754 }, 755 { 530, 0, 480, /* default */ 756 { 848, 528, 0x0004, 0x0009 } 757 }, 758 { 520, -1, 480, 759 { 832, 533, 0x0004, 0x0009 } 760 }, 761 { 510, -2, 480, 762 { 918, 538, 0x0001, 0x0002 } 763 }, 764 { 500, -3, 480, 765 { 900, 543, 0x0001, 0x0002 } 766 }, 767 { 560, 2, 576, /* PAL 720x576 */ 768 { 960, 610, 0x0004, 0x0007 } 769 }, 770 { 550, 1, 576, 771 { 990, 614, 0x0003, 0x0005 } 772 }, 773 { 540, 0, 576, /* default */ 774 { 1080, 620, 0x0002, 0x0003 } 775 }, 776 { 530, -1, 576, 777 { 1060, 625, 0x8002, 0x0003 } 778 }, 779 { 520, -2, 576, 780 { 1040, 630, 0x0002, 0x0003 } 781 }, 782 { 510, -3, 576, 783 { 1020, 635, 0x0002, 0x0003 } 784 }, 785 { 500, -4, 576, 786 { 1000, 640, 0x0002, 0x0003 } 787 }, 788 { 560, 3, 600, /* PAL 800x600 */ 789 { 1152, 633, 0x0005, 0x0007 } 790 }, 791 { 550, 2, 600, 792 { 1100, 638, 0x0019, 0x0024 } 793 }, 794 { 540, 1, 600, 795 { 1080, 643, 0x0019, 0x0024 } 796 }, 797 { 530, 0, 600, /* default */ 798 { 1060, 648, 0x0019, 0x0024 } 799 }, 800 { 520, -1, 600, 801 { 1040, 653, 0x0019, 0x0024 } 802 }, 803 { 510, -2, 600, 804 { 1020, 658, 0x0019, 0x0024 } 805 }, 806 { 500, -3, 600, 807 { 1080, 663, 0x0003, 0x0004 } 808 }, 809 { 720, 3, 480, /* 750p 640x480 (42) */ 810 { 1238, 500, 0x0001, 0x0002 } 811 }, 812 { 693, 2, 480, 813 { 1191, 519, 0x0001, 0x0002 } 814 }, 815 { 667, 1, 480, 816 { 1146, 540, 0x0001, 0x0002 } 817 }, 818 { 640, 0, 480, 819 { 1100, 563, 0x0001, 0x0002 } 820 }, 821 { 613, -1, 480, 822 { 1054, 587, 0x0001, 0x0002 } 823 }, 824 { 587, -2, 480, 825 { 1009, 613, 0x0001, 0x0002 } 826 }, 827 { 560, -3, 480, 828 { 963, 643, 0x0001, 0x0002 } 829 }, 830 { 720, 3, 480, /* 750p 720x480 (49) */ 831 { 1238, 500, 0x0001, 0x0002 } 832 }, 833 { 693, 2, 480, 834 { 1191, 519, 0x0001, 0x0002 } 835 }, 836 { 667, 1, 480, 837 { 1146, 540, 0x0001, 0x0002 } 838 }, 839 { 640, 0, 480, 840 { 1100, 563, 0x0001, 0x0002 } 841 }, 842 { 613, -1, 480, 843 { 1054, 587, 0x0001, 0x0002 } 844 }, 845 { 587, -2, 480, 846 { 1009, 613, 0x0001, 0x0002 } 847 }, 848 { 560, -3, 480, 849 { 963, 643, 0x0001, 0x0002 } 850 }, 851 { 720, 3, 576, /* 750p 720/768x576 (56) */ 852 { 1238, 600, 0x0003, 0x0005 } 853 }, 854 { 693, 2, 576, 855 { 1191, 623, 0x0003, 0x0005 } 856 }, 857 { 667, 1, 576, 858 { 1146, 648, 0x0003, 0x0005 } 859 }, 860 { 640, 0, 576, 861 { 1100, 675, 0x0003, 0x0005 } 862 }, 863 { 613, -1, 576, 864 { 1054, 705, 0x0003, 0x0005 } 865 }, 866 { 587, -2, 576, 867 { 1009, 736, 0x0003, 0x0005 } 868 }, 869 { 560, -3, 576, 870 { 963, 771, 0x0003, 0x0005 } 871 }, 872 { 720, 3, 480, /* 750p 800x480 (63) */ 873 { 1238, 500, 0x0001, 0x0002 } 874 }, 875 { 693, 2, 480, 876 { 1191, 519, 0x0001, 0x0002 } 877 }, 878 { 667, 1, 480, 879 { 1146, 540, 0x0001, 0x0002 } 880 }, 881 { 640, 0, 480, 882 { 1100, 563, 0x0001, 0x0002 } 883 }, 884 { 613, -1, 480, 885 { 1054, 587, 0x0001, 0x0002 } 886 }, 887 { 587, -2, 480, 888 { 1009, 613, 0x0001, 0x0002 } 889 }, 890 { 560, -3, 480, 891 { 963, 643, 0x0001, 0x0002 } 892 }, 893 { 720, 3, 600, /* 750p 800x600 (70) */ 894 { 1320, 625, 0x0002, 0x0003 } 895 }, 896 { 700, 2, 600, 897 { 1283, 643, 0x0002, 0x0003 } 898 }, 899 { 680, 1, 600, 900 { 1247, 662, 0x0002, 0x0003 } 901 }, 902 { 660, 0, 600, 903 { 1210, 682, 0x0002, 0x0003 } 904 }, 905 { 640, -1, 600, 906 { 1173, 703, 0x0002, 0x0003 } 907 }, 908 { 620, -2, 600, 909 { 1137, 726, 0x0002, 0x0003 } 910 }, 911 { 600, -3, 600, 912 { 1100, 750, 0x0002, 0x0003 } 913 }, 914 { 720, 3, 576, /* 750p 1024x576 (77) */ 915 { 1238, 600, 0x0003, 0x0005 } 916 }, 917 { 693, 2, 576, 918 { 1191, 623, 0x0003, 0x0005 } 919 }, 920 { 667, 1, 576, 921 { 1146, 648, 0x0003, 0x0005 } 922 }, 923 { 640, 0, 576, 924 { 1100, 675, 0x0003, 0x0005 } 925 }, 926 { 630, -1, 576, 927 { 1083, 686, 0x0003, 0x0005 } 928 }, 929 { 620, -2, 576, 930 { 1066, 697, 0x0003, 0x0005 } 931 }, 932 { 616, -3, 576, 933 { 1059, 701, 0x0003, 0x0005 } 934 }, 935 { 720, 3, 768, /* 750p 1024x768 (84) */ 936 { 1547, 800, 0x0001, 0x0001 } 937 }, 938 { 693, 2, 768, 939 { 1489, 831, 0x0001, 0x0001 } 940 }, 941 { 667, 1, 768, 942 { 1433, 864, 0x0001, 0x0001 } 943 }, 944 { 640, 0, 768, 945 { 1375, 900, 0x0001, 0x0001 } 946 }, 947 { 613, -1, 768, 948 { 1317, 940, 0x0001, 0x0001 } 949 }, 950 { 587, -2, 768, 951 { 1261, 981, 0x0001, 0x0001 } 952 }, 953 { 560, -3, 768, 954 { 1203, 1029, 0x0001, 0x0001 } 955 }, 956#ifdef OLD1280720P 957 { 720, 3, 720, /* 750p 1280x720-old (91) */ 958 { 1584, 750, 0x0018, 0x0019 } 959 }, 960 { 707, 2, 720, 961 { 1555, 764, 0x0018, 0x0019 } 962 }, 963 { 693, 1, 720, 964 { 1525, 779, 0x0018, 0x0019 } 965 }, 966 { 680, 0, 720, 967 { 1496, 794, 0x0018, 0x0019 } 968 }, 969 { 667, -1, 720, 970 { 1467, 810, 0x0018, 0x0019 } 971 }, 972 { 653, -2, 720, 973 { 1437, 827, 0x0018, 0x0019 } 974 }, 975 { 640, -3, 720, 976 { 1408, 844, 0x0018, 0x0019 } 977 }, 978#endif 979#ifndef OLD1280720P 980 { 720, 3, 720, /* 750p 1280x720-new (91) */ 981 { 1650, 750, 0x0001, 0x0001 } 982 }, 983 { 720, 2, 720, 984 { 1650, 750, 0x0001, 0x0001 } 985 }, 986 { 720, 1, 720, 987 { 1650, 750, 0x0001, 0x0001 } 988 }, 989 { 720, 0, 720, 990 { 1650, 750, 0x0001, 0x0001 } 991 }, 992 { 704, -1, 720, 993 { 1613, 767, 0x0001, 0x0001 } 994 }, 995 { 688, -2, 720, 996 { 1577, 785, 0x0001, 0x0001 } 997 }, 998 { 672, -3, 720, 999 { 1540, 804, 0x0001, 0x0001 } 1000 }, 1001#endif 1002 { 1080, 3, 480, /* 1080i 640x480 (98) */ 1003 { 945, 500, 0x8001, 0x0005 } 1004 }, 1005 { 1040, 2, 480, 1006 { 910, 519, 0x8001, 0x0005 } 1007 }, 1008 { 1000, 1, 480, 1009 { 875, 540, 0x8001, 0x0005 } 1010 }, 1011 { 960, 0, 480, 1012 { 840, 563, 0x8001, 0x0005 } 1013 }, 1014 { 920, -1, 480, 1015 { 805, 587, 0x8001, 0x0005 } 1016 }, 1017 { 880, -2, 480, 1018 { 770, 614, 0x8001, 0x0005 } 1019 }, 1020 { 840, -3, 480, 1021 { 735, 643, 0x8001, 0x0005 } 1022 }, 1023 { 1080, 3, 480, /* 1080i 800x480 (105) */ 1024 { 1181, 500, 0x8001, 0x0004 } 1025 }, 1026 { 1040, 2, 480, 1027 { 1138, 519, 0x8001, 0x0004 } 1028 }, 1029 { 1000, 1, 480, 1030 { 1094, 540, 0x8001, 0x0004 } 1031 }, 1032 { 960, 0, 480, 1033 { 1050, 563, 0x8001, 0x0004 } 1034 }, 1035 { 920, -1, 480, 1036 { 1006, 587, 0x8001, 0x0004 } 1037 }, 1038 { 880, -2, 480, 1039 { 963, 614, 0x8001, 0x0004 } 1040 }, 1041 { 840, -3, 480, 1042 { 919, 643, 0x8001, 0x0004 } 1043 }, 1044 { 1080, 3, 600, /* 1080i 800x600 (112) */ 1045 { 1181, 625, 0x8005, 0x0010 } 1046 }, 1047 { 1040, 2, 600, 1048 { 1138, 649, 0x8005, 0x0010 } 1049 }, 1050 { 1000, 1, 600, 1051 { 1094, 675, 0x8005, 0x0010 } 1052 }, 1053 { 960, 0, 600, 1054 { 1050, 703, 0x8005, 0x0010 } 1055 }, 1056 { 920, -1, 600, 1057 { 1006, 734, 0x8005, 0x0010 } 1058 }, 1059 { 880, -2, 600, 1060 { 963, 767, 0x8005, 0x0010 } 1061 }, 1062 { 840, -3, 600, 1063 { 919, 804, 0x8005, 0x0010 } 1064 }, 1065 { 1080, 3, 576, /* 1080i 1024x576 (119) */ 1066 { 1575, 600, 0x0002, 0x0005 } 1067 }, 1068 { 1040, 2, 576, 1069 { 1517, 623, 0x0002, 0x0005 } 1070 }, 1071 { 1000, 1, 576, 1072 { 1458, 648, 0x0002, 0x0005 } 1073 }, 1074 { 960, 0, 576, 1075 { 1400, 675, 0x0002, 0x0005 } 1076 }, 1077 { 920, -1, 576, 1078 { 1342, 704, 0x0002, 0x0005 } 1079 }, 1080 { 880, -2, 576, 1081 { 1283, 736, 0x0002, 0x0005 } 1082 }, 1083 { 840, -3, 576, 1084 { 1225, 771, 0x0002, 0x0005 } 1085 }, 1086 { 1080, 3, 768, /* 1080i 1024x768 (126) */ 1087 { 1418, 800, 0x000c, 0x0019 } 1088 }, 1089 { 1040, 2, 768, 1090 { 1365, 831, 0x000c, 0x0019 } 1091 }, 1092 { 1000, 1, 768, 1093 { 1313, 864, 0x000c, 0x0019 } 1094 }, 1095 { 960, 0, 768, 1096 { 1260, 900, 0x000c, 0x0019 } 1097 }, 1098 { 920, -1, 768, 1099 { 1208, 939, 0x000c, 0x0019 } 1100 }, 1101 { 880, -2, 768, 1102 { 1155, 982, 0x000c, 0x0019 } 1103 }, 1104 { 840, -3, 768, 1105 { 1103, 1029, 0x000c, 0x0019 } 1106 }, 1107 { 1080, 3, 720, /* 1080i 1280x720 (133) */ 1108 { 1969, 750, 0x0005, 0x0008 } 1109 }, 1110 { 1040, 2, 720, 1111 { 1896, 779, 0x0005, 0x0008 } 1112 }, 1113 { 1000, 1, 720, 1114 { 1823, 810, 0x0005, 0x0008 } 1115 }, 1116 { 960, 0, 720, 1117 { 1750, 844, 0x0005, 0x0008 } 1118 }, 1119 { 920, -1, 720, 1120 { 1677, 880, 0x0005, 0x0008 } 1121 }, 1122 { 880, -2, 720, 1123 { 1604, 920, 0x0005, 0x0008 } 1124 }, 1125 { 840, -3, 720, 1126 { 1531, 964, 0x0005, 0x0008 } 1127 }, 1128 { 1080, 3, 1024, /* 1080i 1280x1024 (140) */ 1129 { 1772, 1067, 0x0004, 0x0005 } 1130 }, 1131 { 1040, 2, 1024, 1132 { 1706, 1108, 0x0004, 0x0005 } 1133 }, 1134 { 1000, 1, 1024, 1135 { 1641, 1152, 0x0004, 0x0005 } 1136 }, 1137 { 960, 0, 1024, 1138 { 1575, 1200, 0x0004, 0x0005 } 1139 }, 1140 { 920, -1, 1024, 1141 { 1509, 1252, 0x0004, 0x0005 } 1142 }, 1143 { 880, -2, 1024, 1144 { 1444, 1309, 0x0004, 0x0005 } 1145 }, 1146 { 840, -3, 1024, 1147 { 1378, 1371, 0x0004, 0x0005 } 1148 }, 1149 { 470, 3, 576, /* NTSC 720x576 (147) */ 1150 { 1175, 602, 0x8078, 0x008f } 1151 }, 1152 { 460, 2, 576, 1153 { 1150, 614, 0x8078, 0x008f } 1154 }, 1155 { 450, 1, 576, 1156 { 1125, 628, 0x8078, 0x008f } 1157 }, 1158 { 440, 0, 576, 1159 { 1100, 643, 0x8078, 0x008f } 1160 }, 1161 { 430, -1, 576, 1162 { 1075, 658, 0x8078, 0x008f } 1163 }, 1164 { 420, -2, 576, 1165 { 1050, 673, 0x8078, 0x008f } 1166 }, 1167 { 410, -3, 576, 1168 { 1025, 680, 0x8078, 0x008f } 1169 }, 1170 { 550, 3, 768, /* PAL 1024x768 (154) */ 1171 { 1238, 776, 0x0001, 0x0001 } 1172 }, 1173 { 540, 2, 768, 1174 { 1215, 790, 0x0001, 0x0001 } 1175 }, 1176 { 530, 1, 768, 1177 { 1193, 805, 0x0001, 0x0001 } 1178 }, 1179 { 520, 0, 768, 1180 { 1170, 821, 0x0001, 0x0001 } 1181 }, 1182 { 510, -1, 768, 1183 { 1148, 837, 0x0001, 0x0001 } 1184 }, 1185 { 500, -2, 768, 1186 { 1125, 853, 0x0001, 0x0001 } 1187 }, 1188 { 490, -3, 768, 1189 { 1103, 871, 0x0001, 0x0001 } 1190 }, 1191 { 470, 3, 768, /* NTSC 1024 i (161) */ 1192 { 1175, 759, 0x8001, 0x0001 } 1193 }, 1194 { 460, 2, 768, 1195 { 1150, 775, 0x8001, 0x0001 } 1196 }, 1197 { 450, 1, 768, 1198 { 1125, 792, 0x8001, 0x0001 } 1199 }, 1200 { 440, 0, 768, 1201 { 1100, 811, 0x8001, 0x0001 } 1202 }, 1203 { 430, -1, 768, 1204 { 1075, 829, 0x8001, 0x0001 } 1205 }, 1206 { 430, -2, 768, 1207 { 1075, 829, 0x8001, 0x0001 } 1208 }, 1209 { 430, -3, 768, 1210 { 1075, 829, 0x8001, 0x0001 } 1211 }, 1212 { 470, 3, 768, /* NTSC 1024 p (168) */ 1213 { 1175, 792, 0x0001, 0x0001 } 1214 }, 1215 { 460, 2, 768, 1216 { 1150, 809, 0x0001, 0x0001 } 1217 }, 1218 { 450, 1, 768, 1219 { 1125, 827, 0x0001, 0x0001 } 1220 }, 1221 { 440, 0, 768, 1222 { 1100, 846, 0x0001, 0x0001 } 1223 }, 1224 { 430, -1, 768, 1225 { 1075, 865, 0x0001, 0x0001 } 1226 }, 1227 { 430, -2, 768, 1228 { 1075, 865, 0x0001, 0x0001 } 1229 }, 1230 { 430, -3, 768, 1231 { 1075, 865, 0x0001, 0x0001 } 1232 }, 1233 { 470, 3, 480, /* NTSC 800x480 (175) */ 1234 { 893, 509, 0x004c, 0x008f } 1235 }, 1236 { 460, 2, 480, 1237 { 874, 514, 0x004c, 0x008f } 1238 }, 1239 { 450, 1, 480, 1240 { 855, 519, 0x004c, 0x008f } 1241 }, 1242 { 440, 0, 480, /* default */ 1243 { 836, 524, 0x004c, 0x008f } 1244 }, 1245 { 430, -1, 480, 1246 { 860, 529, 0x0050, 0x008f } 1247 }, 1248 { 420, -2, 480, 1249 { 840, 534, 0x0050, 0x008f } 1250 }, 1251 { 420, -3, 480, 1252 { 840, 534, 0x0050, 0x008f } 1253 }, 1254 { 470, 3, 576, /* NTSC 1024x576 (182) */ 1255 { 1175, 602, 0x8078, 0x008f } 1256 }, 1257 { 460, 2, 576, 1258 { 1150, 614, 0x8078, 0x008f } 1259 }, 1260 { 450, 1, 576, 1261 { 1125, 628, 0x8078, 0x008f } 1262 }, 1263 { 440, 0, 576, 1264 { 1100, 643, 0x8078, 0x008f } 1265 }, 1266 { 430, -1, 576, 1267 { 1075, 658, 0x8078, 0x008f } 1268 }, 1269 { 430, -2, 576, 1270 { 1075, 658, 0x8078, 0x008f } 1271 }, 1272 { 430, -3, 576, 1273 { 1075, 658, 0x8078, 0x008f } 1274 }, 1275 { 564, 3, 576, /* PAL 1024x576 (189) */ 1276 { 1128, 592, 0x0002, 0x0003 } 1277 }, 1278 { 556, 2, 576, 1279 { 1112, 601, 0x0002, 0x0003 } 1280 }, 1281 { 548, 1, 576, 1282 { 1096, 610, 0x0002, 0x0003 } 1283 }, 1284 { 540, 0, 576, 1285 { 1080, 619, 0x0002, 0x0003 } 1286 }, 1287 { 532, -1, 576, 1288 { 1064, 628, 0x0002, 0x0003 } 1289 }, 1290 { 532, -2, 576, 1291 { 1064, 628, 0x0002, 0x0003 } 1292 }, 1293 { 532, -3, 576, 1294 { 1064, 628, 0x0002, 0x0003 } 1295 }, 1296 { 1080, 3, 540, /* 1080i 960x540 (196) */ 1297 { 1050, 600, 0x0001, 0x0004 } 1298 }, 1299 { 1080, 2, 540, 1300 { 1050, 600, 0x0001, 0x0004 } 1301 }, 1302 { 1080, 1, 540, 1303 { 1050, 600, 0x0001, 0x0004 } 1304 }, 1305 { 1080, 0, 540, 1306 { 1050, 600, 0x0001, 0x0004 } 1307 }, 1308 { 1040, -1, 540, 1309 { 1011, 623, 0x0001, 0x0004 } 1310 }, 1311 { 1000, -2, 540, 1312 { 1944, 648, 0x0001, 0x0002 } 1313 }, 1314 { 960, -3, 540, 1315 { 1866, 675, 0x0001, 0x0002 } 1316 }, 1317 { 1080, 3, 600, /* 1080i 960x600 (203) */ 1318 { 1418, 670, 0x0003, 0x0008 } 1319 }, 1320 { 1040, 2, 600, 1321 { 1365, 700, 0x0003, 0x0008 } 1322 }, 1323 { 1000, 1, 600, 1324 { 1313, 816, 0x0003, 0x0008 } 1325 }, 1326 { 960, 0, 600, 1327 { 1260, 851, 0x0003, 0x0008 } 1328 }, 1329 { 920, -1, 600, 1330 { 1208, 887, 0x0003, 0x0008 } 1331 }, 1332 { 880, -2, 600, 1333 { 1155, 928, 0x0003, 0x0008 } 1334 }, 1335 { 840, -3, 600, 1336 { 1103, 972, 0x0003, 0x0008 } 1337 } 1338}; 1339 1340static unsigned const char SiSScalingP1Regs[] = { 1341 0x08,0x09,0x0b,0x0c,0x0d,0x0e,0x10,0x11,0x12 1342}; 1343static unsigned const char SiSScalingP4Regs[] = { 1344 0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1a,0x1b 1345}; 1346 1347/* TV filters for SiS video bridges 1348 */ 1349static const struct _SiSTVFilter301 { 1350 UChar filter[7][4]; 1351} SiSTVFilter301[] = { 1352 {{ {0x00,0xE0,0x10,0x60}, /* NTSCFilter - 320 */ 1353 {0x00,0xEE,0x10,0x44}, 1354 {0x00,0xF4,0x10,0x38}, 1355 {0xF8,0xF4,0x18,0x38}, 1356 {0xFC,0xFB,0x14,0x2A}, 1357 {0x00,0x00,0x10,0x20}, 1358 {0x00,0x04,0x10,0x18} }}, 1359 {{ {0xF5,0xEE,0x1B,0x44}, /* NTSCFilter - 640 */ 1360 {0xF8,0xF4,0x18,0x38}, 1361 {0xEB,0x04,0x25,0x18}, 1362 {0xF1,0x05,0x1F,0x16}, 1363 {0xF6,0x06,0x1A,0x14}, 1364 {0xFA,0x06,0x16,0x14}, 1365 {0x00,0x04,0x10,0x18} }}, 1366 {{ {0xEB,0x04,0x25,0x18}, /* NTSCFilter - 720 */ 1367 {0xE7,0x0E,0x29,0x04}, 1368 {0xEE,0x0C,0x22,0x08}, 1369 {0xF6,0x0B,0x1A,0x0A}, 1370 {0xF9,0x0A,0x17,0x0C}, 1371 {0xFC,0x0A,0x14,0x0C}, 1372 {0x00,0x08,0x10,0x10} }}, 1373 {{ {0xEC,0x02,0x24,0x1C}, /* NTSCFilter - 800/400 */ 1374 {0xF2,0x04,0x1E,0x18}, 1375 {0xEB,0x15,0x25,0xF6}, 1376 {0xF4,0x10,0x1C,0x00}, 1377 {0xF8,0x0F,0x18,0x02}, 1378 {0x00,0x04,0x10,0x18}, 1379 {0x01,0x06,0x0F,0x14} }}, 1380 {{ {0x00,0xE0,0x10,0x60}, /* PALFilter - 320 */ 1381 {0x00,0xEE,0x10,0x44}, 1382 {0x00,0xF4,0x10,0x38}, 1383 {0xF8,0xF4,0x18,0x38}, 1384 {0xFC,0xFB,0x14,0x2A}, 1385 {0x00,0x00,0x10,0x20}, 1386 {0x00,0x04,0x10,0x18} }}, 1387 {{ {0xF5,0xEE,0x1B,0x44}, /* PALFilter - 640 */ 1388 {0xF8,0xF4,0x18,0x38}, 1389 {0xF1,0xF7,0x1F,0x32}, 1390 {0xF5,0xFB,0x1B,0x2A}, 1391 {0xF9,0xFF,0x17,0x22}, 1392 {0xFB,0x01,0x15,0x1E}, 1393 {0x00,0x04,0x10,0x18} }}, 1394 {{ {0xF5,0xEE,0x1B,0x2A}, /* PALFilter - 720 */ 1395 {0xEE,0xFE,0x22,0x24}, 1396 {0xF3,0x00,0x1D,0x20}, 1397 {0xF9,0x03,0x17,0x1A}, 1398 {0xFB,0x02,0x14,0x1E}, 1399 {0xFB,0x04,0x15,0x18}, 1400 {0x00,0x06,0x10,0x14} }}, 1401 {{ {0xF5,0xEE,0x1B,0x44}, /* PALFilter - 800/400 */ 1402 {0xF8,0xF4,0x18,0x38}, 1403 {0xFC,0xFB,0x14,0x2A}, 1404 {0xEB,0x05,0x25,0x16}, 1405 {0xF1,0x05,0x1F,0x16}, 1406 {0xFA,0x07,0x16,0x12}, 1407 {0x00,0x07,0x10,0x12} }} 1408}; 1409 1410static const struct _SiSTVFilter301B { 1411 UChar filter[7][7]; 1412} SiSTVFilter301B[] = { 1413 {{ {0x01,0x02,0xfb,0xf8,0x06,0x27,0x3a}, /* NTSC - 640 */ 1414 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, 1415 {0x01,0x01,0x00,0xf6,0x00,0x28,0x40}, 1416 {0xff,0x03,0x02,0xf6,0xfc,0x27,0x46}, 1417 {0xff,0x01,0x04,0xf8,0xfa,0x27,0x46}, 1418 {0xff,0x01,0x05,0xf9,0xf7,0x26,0x4a}, 1419 {0xff,0xff,0x05,0xfc,0xf4,0x24,0x52} }}, 1420 {{ {0x01,0x00,0xfb,0xfb,0x0b,0x25,0x32}, /* NTSC - 720 (?) */ 1421 {0x01,0x01,0xfb,0xf9,0x09,0x26,0x36}, 1422 {0x01,0x02,0xfc,0xf8,0x06,0x27,0x38}, 1423 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, 1424 {0x01,0x03,0xff,0xf6,0x00,0x27,0x40}, 1425 {0xff,0x03,0x02,0xf6,0xfe,0x27,0x42}, 1426 {0xff,0x02,0x03,0xf7,0xfb,0x27,0x46} }}, 1427 {{ {0x01,0xfe,0xfb,0xfe,0x0e,0x23,0x2e}, /* NTSC - 800 */ 1428 {0x01,0xff,0xfb,0xfc,0x0c,0x25,0x30}, 1429 {0x01,0x00,0xfb,0xfa,0x0a,0x26,0x34}, 1430 {0x01,0x01,0xfc,0xf8,0x08,0x26,0x38}, 1431 {0x01,0x02,0xfd,0xf7,0x06,0x27,0x38}, 1432 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, 1433 {0xff,0x03,0x00,0xf6,0x00,0x27,0x42} }}, 1434 {{ {0xff,0xfd,0xfe,0x05,0x11,0x1e,0x24}, /* NTSC - 1024 */ 1435 {0xff,0xfd,0xfd,0x04,0x11,0x1f,0x26}, 1436 {0xff,0xfd,0xfc,0x02,0x10,0x22,0x28}, 1437 {0xff,0xff,0xfc,0x00,0x0f,0x22,0x28}, 1438 {0x01,0xfe,0xfb,0xff,0x0e,0x23,0x2c}, 1439 {0x01,0xff,0xfb,0xfd,0x0d,0x24,0x2e}, 1440 {0x01,0xff,0xfb,0xfb,0x0c,0x25,0x32} }}, 1441 {{ {0x01,0x02,0xfb,0xf8,0x06,0x27,0x3a}, /* PAL - 640 */ 1442 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, 1443 {0x01,0x01,0x00,0xf6,0x00,0x28,0x40}, 1444 {0xff,0x03,0x02,0xf6,0xfc,0x27,0x46}, 1445 {0xff,0x01,0x04,0xf8,0xfa,0x27,0x46}, 1446 {0xff,0x01,0x05,0xf9,0xf7,0x26,0x4a}, 1447 {0xff,0xff,0x05,0xfc,0xf4,0x24,0x52} }}, 1448 {{ {0x01,0x00,0xfb,0xfb,0x0b,0x25,0x32}, /* PAL - 720/768 */ 1449 {0x01,0x01,0xfb,0xf9,0x09,0x26,0x36}, 1450 {0x01,0x02,0xfc,0xf8,0x06,0x27,0x38}, 1451 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, 1452 {0x01,0x03,0xff,0xf6,0x00,0x27,0x40}, 1453 {0xff,0x03,0x02,0xf6,0xfe,0x27,0x42}, 1454 {0xff,0x02,0x03,0xf7,0xfb,0x27,0x46} }}, 1455 {{ {0x01,0xfe,0xfb,0xfe,0x0e,0x23,0x2e}, /* PAL - 800 */ 1456 {0x01,0xff,0xfb,0xfc,0x0c,0x25,0x30}, 1457 {0x01,0x00,0xfb,0xfa,0x0a,0x26,0x34}, 1458 {0x01,0x01,0xfc,0xf8,0x08,0x26,0x38}, 1459 {0x01,0x02,0xfd,0xf7,0x06,0x27,0x38}, 1460 {0x01,0x02,0xfe,0xf7,0x03,0x27,0x3c}, 1461 {0xff,0x03,0x00,0xf6,0x00,0x27,0x42} }}, 1462 {{ {0xff,0xfd,0xfe,0x05,0x11,0x1e,0x24}, /* PAL - 1024 */ 1463 {0xff,0xfd,0xfd,0x04,0x11,0x1f,0x26}, 1464 {0xff,0xfd,0xfc,0x02,0x10,0x22,0x28}, 1465 {0xff,0xff,0xfc,0x00,0x0f,0x22,0x28}, 1466 {0x01,0xfe,0xfb,0xff,0x0e,0x23,0x2c}, 1467 {0x01,0xff,0xfb,0xfd,0x0d,0x24,0x2e}, 1468 {0x01,0xff,0xfb,0xfb,0x0c,0x25,0x32} }}, 1469 {{ {0x54,0x69,0x6c,0x6c,0x20,0x53,0x6f}, /* PAL-M - 1024 */ 1470 {0x66,0x69,0x61,0x20,0x42,0x65,0x72}, 1471 {0x6e,0x74,0x73,0x73,0x6f,0x6e,0x20}, 1472 {0x2d,0x20,0x42,0x72,0x6f,0x75,0x67}, 1473 {0x68,0x74,0x20,0x74,0x6f,0x20,0x79}, 1474 {0x6f,0x75,0x20,0x62,0x79,0x20,0x6e}, 1475 {0x6f,0x74,0x20,0x61,0x20,0x6d,0x65,} }}, 1476 {{ {0x72,0x65,0x20,0x57,0x69,0x7a,0x61}, /* PAL-N - 1024 */ 1477 {0x72,0x64,0x20,0x62,0x75,0x74,0x20}, 1478 {0x74,0x68,0x65,0x20,0x57,0x69,0x7a}, 1479 {0x61,0x72,0x64,0x20,0x45,0x78,0x74}, 1480 {0x72,0x61,0x6f,0x72,0x64,0x69,0x6e}, 1481 {0x61,0x69,0x72,0x65,0x21,0x20,0x48}, 1482 {0x69,0x20,0x44,0x61,0x6c,0x65,0x21} }} 1483}; 1484 1485/* For communication with the SiS Linux framebuffer driver (sisfb) */ 1486 1487/* ioctl for identifying and giving some info (esp. memory heap start) */ 1488#define SISFB_GET_INFO_SIZE 0x8004f300 1489#define SISFB_GET_INFO 0x8000f301 /* Must be patched with result from ..._SIZE at D[29:16] */ 1490/* deprecated ioctl number (for older versions of sisfb) */ 1491#define SISFB_GET_INFO_OLD 0x80046ef8 1492 1493/* ioctls for tv parameters (position) */ 1494#define SISFB_SET_TVPOSOFFSET 0x4004f304 1495 1496/* lock sisfb from register access */ 1497#define SISFB_SET_LOCK 0x4004f306 1498 1499/* Magic value for USB device */ 1500#ifndef SISFB_USB_MAGIC 1501#define SISFB_USB_MAGIC 0x55aa2011 1502#endif 1503 1504/* Structure argument for SISFB_GET_INFO ioctl */ 1505typedef struct _SISFB_INFO sisfb_info, *psisfb_info; 1506 1507struct _SISFB_INFO { 1508 CARD32 sisfb_id; /* for identifying sisfb */ 1509#ifndef SISFB_ID 1510#define SISFB_ID 0x53495346 /* Identify myself with 'SISF' */ 1511#endif 1512 CARD32 chip_id; /* PCI ID of detected chip */ 1513 CARD32 memory; /* video memory in KB which sisfb manages */ 1514 CARD32 heapstart; /* heap start (= sisfb "mem" argument) in KB */ 1515 CARD8 fbvidmode; /* current sisfb mode */ 1516 1517 CARD8 sisfb_version; 1518 CARD8 sisfb_revision; 1519 CARD8 sisfb_patchlevel; 1520 1521 CARD8 sisfb_caps; /* sisfb's capabilities */ 1522 1523 CARD32 sisfb_tqlen; /* turbo queue length (in KB) */ 1524 1525 CARD32 sisfb_pcibus; /* The card's PCI bus ID. For USB, bus = SISFB_USB_MAGIC */ 1526 CARD32 sisfb_pcislot; /* alias usbbus */ 1527 CARD32 sisfb_pcifunc; /* alias usbdev */ 1528 1529 CARD8 sisfb_lcdpdc; 1530 1531 CARD8 sisfb_lcda; 1532 1533 CARD32 sisfb_vbflags; 1534 CARD32 sisfb_currentvbflags; 1535 1536 CARD32 sisfb_scalelcd; 1537 CARD32 sisfb_specialtiming; 1538 1539 CARD8 sisfb_haveemi; 1540 CARD8 sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33; 1541 CARD8 sisfb_haveemilcd; 1542 1543 CARD8 sisfb_lcdpdca; 1544 1545 CARD16 sisfb_tvxpos, sisfb_tvypos; /* Warning: Values + 32 ! */ 1546 1547 CARD32 sisfb_heapsize; /* heap size (in KB) */ 1548 CARD32 sisfb_videooffset; /* Offset of viewport in video memory (in bytes) */ 1549 1550 CARD32 sisfb_curfstn; /* currently running FSTN/DSTN mode */ 1551 CARD32 sisfb_curdstn; 1552 1553 CARD16 sisfb_pci_vendor; /* PCI vendor (SiS or XGI) */ 1554 1555 CARD32 sisfb_vbflags2; 1556 1557 CARD8 sisfb_can_post; /* sisfb can POST this card */ 1558 CARD8 sisfb_card_posted; /* card is POSTED */ 1559 CARD8 sisfb_was_boot_device; /* This card was the boot video device (ie is primary) */ 1560 1561 CARD8 reserved[183]; /* for future use */ 1562}; 1563 1564/* Mandatory functions */ 1565static void SISIdentify(int flags); 1566static Bool SISProbe(DriverPtr drv, int flags); 1567static Bool SISPreInit(ScrnInfoPtr pScrn, int flags); 1568static Bool SISScreenInit(SCREEN_INIT_ARGS_DECL); 1569static Bool SISEnterVT(VT_FUNC_ARGS_DECL); 1570static void SISLeaveVT(VT_FUNC_ARGS_DECL); 1571static Bool SISCloseScreen(CLOSE_SCREEN_ARGS_DECL); 1572static Bool SISSaveScreen(ScreenPtr pScreen, int mode); 1573static Bool SISSwitchMode(SWITCH_MODE_ARGS_DECL); 1574void SISAdjustFrame(ADJUST_FRAME_ARGS_DECL); 1575 1576/* Optional functions */ 1577#ifdef SISDUALHEAD 1578static Bool SISSaveScreenDH(ScreenPtr pScreen, int mode); 1579#endif 1580static void SISFreeScreen(FREE_SCREEN_ARGS_DECL); 1581static ModeStatus SISValidMode(SCRN_ARG_TYPE arg, DisplayModePtr mode, 1582 Bool verbose, int flags); 1583 1584/* Internally used functions */ 1585static Bool SISMapMem(ScrnInfoPtr pScrn); 1586static Bool SISUnmapMem(ScrnInfoPtr pScrn); 1587#ifdef SIS_NEED_MAP_IOP 1588static Bool SISMapIOPMem(ScrnInfoPtr pScrn); 1589static Bool SISUnmapIOPMem(ScrnInfoPtr pScrn); 1590#endif 1591static void SISSave(ScrnInfoPtr pScrn); 1592static void SISRestore(ScrnInfoPtr pScrn); 1593static Bool SISModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode); 1594static void SISModifyModeInfo(DisplayModePtr mode); 1595static void SiSPreSetMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int viewmode); 1596static void SiSPostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg); 1597static void SiS6326PostSetMode(ScrnInfoPtr pScrn, SISRegPtr sisReg); 1598static Bool SiSSetVESAMode(ScrnInfoPtr pScrn, DisplayModePtr pMode); 1599static void SISVESARestore(ScrnInfoPtr pScrn); 1600static void SiSBuildVesaModeList(ScrnInfoPtr pScrn, vbeInfoPtr pVbe, VbeInfoBlock *vbe); 1601static UShort SiSCalcVESAModeIndex(ScrnInfoPtr pScrn, DisplayModePtr mode); 1602static void SISVESASaveRestore(ScrnInfoPtr pScrn, vbeSaveRestoreFunction function); 1603static void SISBridgeRestore(ScrnInfoPtr pScrn); 1604static void SiSEnableTurboQueue(ScrnInfoPtr pScrn); 1605static void SiSRestoreQueueMode(SISPtr pSiS, SISRegPtr sisReg); 1606UChar SISSearchCRT1Rate(ScrnInfoPtr pScrn, DisplayModePtr mode); 1607static void SISWaitVBRetrace(ScrnInfoPtr pScrn); 1608void SISWaitRetraceCRT1(ScrnInfoPtr pScrn); 1609void SISWaitRetraceCRT2(ScrnInfoPtr pScrn); 1610UShort SiS_CheckModeCRT1(ScrnInfoPtr pScrn, DisplayModePtr mode, 1611 unsigned int VBFlags, Bool hcm); 1612UShort SiS_CheckModeCRT2(ScrnInfoPtr pScrn, DisplayModePtr mode, 1613 unsigned int VBFlags, Bool hcm); 1614 1615#ifdef SISMERGED 1616static Bool InRegion(int x, int y, region r); 1617static void SISMergedPointerMoved(SCRN_ARG_TYPE arg, int x, int y); 1618#endif 1619Bool SiSBridgeIsInSlaveMode(ScrnInfoPtr pScrn); 1620UShort SiS_GetModeNumber(ScrnInfoPtr pScrn, DisplayModePtr mode, unsigned int VBFlags); 1621UChar SiS_GetSetBIOSScratch(ScrnInfoPtr pScrn, UShort offset, UChar value); 1622#ifdef DEBUG 1623static void SiSDumpModeInfo(ScrnInfoPtr pScrn, DisplayModePtr mode); 1624#endif 1625Bool SISDetermineLCDACap(ScrnInfoPtr pScrn); 1626void SISSaveDetectedDevices(ScrnInfoPtr pScrn); 1627#ifdef SISGAMMARAMP 1628void SISCalculateGammaRamp(ScreenPtr pScreen, ScrnInfoPtr pScrn); 1629#endif 1630 1631/* Our very own vgaHW functions (sis_vga.c) */ 1632extern void SiSVGASave(ScrnInfoPtr pScrn, SISRegPtr save, int flags); 1633extern void SiSVGARestore(ScrnInfoPtr pScrn, SISRegPtr restore, int flags); 1634extern void SiSVGASaveFonts(ScrnInfoPtr pScrn); 1635extern void SiSVGARestoreFonts(ScrnInfoPtr pScrn); 1636extern void SISVGALock(SISPtr pSiS); 1637extern void SiSVGAUnlock(SISPtr pSiS); 1638extern void SiSVGAProtect(ScrnInfoPtr pScrn, Bool on); 1639extern Bool SiSVGAMapMem(ScrnInfoPtr pScrn); 1640extern void SiSVGAUnmapMem(ScrnInfoPtr pScrn); 1641extern Bool SiSVGASaveScreen(ScreenPtr pScreen, int mode); 1642 1643/* shadow */ 1644extern void SISPointerMoved(SCRN_ARG_TYPE arg, int x, int y); 1645extern void SISPointerMovedReflect(SCRN_ARG_TYPE arg, int x, int y); 1646extern void SISRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 1647extern void SISRefreshAreaReflect(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 1648extern void SISRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 1649extern void SISRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 1650extern void SISRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 1651extern void SISRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox); 1652 1653/* vb */ 1654extern void SISCRT1PreInit(ScrnInfoPtr pScrn); 1655extern void SISLCDPreInit(ScrnInfoPtr pScrn, Bool quiet); 1656extern void SISTVPreInit(ScrnInfoPtr pScrn, Bool quiet); 1657extern void SISCRT2PreInit(ScrnInfoPtr pScrn, Bool quiet); 1658extern void SISSense30x(ScrnInfoPtr pScrn, Bool quiet); 1659extern void SISSenseChrontel(ScrnInfoPtr pScrn, Bool quiet); 1660extern void SiSSetupPseudoPanel(ScrnInfoPtr pScrn); 1661 1662/* utility */ 1663extern void SiSCtrlExtInit(ScrnInfoPtr pScrn); 1664extern void SiSCtrlExtUnregister(SISPtr pSiS, int index); 1665 1666/* init.c, init301.c ----- (use their data types!) */ 1667extern unsigned short SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, 1668 int Depth, BOOLEAN FSTN, int LCDwith, int LCDheight); 1669extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, 1670 int VDisplay, int Depth, BOOLEAN FSTN, unsigned short CustomT, 1671 int LCDwith, int LCDheight, unsigned int VBFlags2); 1672extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, 1673 int VDisplay, int Depth, unsigned int VBFlags2); 1674extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, 1675 int VDisplay, int Depth, unsigned int VBFlags2); 1676extern int SiSTranslateToVESA(ScrnInfoPtr pScrn, int modenumber); 1677extern int SiSTranslateToOldMode(int modenumber); 1678extern BOOLEAN SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr); 1679extern BOOLEAN SiSBIOSSetMode(struct SiS_Private *SiS_Pr, 1680 ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom); 1681extern BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, 1682 ScrnInfoPtr pScrn, unsigned short ModeNo, BOOLEAN dosetpitch); 1683extern BOOLEAN SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, 1684 ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom); 1685extern BOOLEAN SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, 1686 ScrnInfoPtr pScrn, DisplayModePtr mode, BOOLEAN IsCustom); 1687extern DisplayModePtr SiSBuildBuiltInModeList(ScrnInfoPtr pScrn, BOOLEAN includelcdmodes, 1688 BOOLEAN isfordvi, BOOLEAN fakecrt2modes, BOOLEAN IsForCRT2); 1689extern void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr); 1690extern void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr); 1691extern void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr); 1692extern void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr); 1693extern void SiS_CalcXTapScaler(struct SiS_Private *SiS_Pr, int srcsize, int destsize, int taps, Bool ishoriz); 1694/* End of init.c, init301.c ----- */ 1695 1696 1697 1698 1699 1700 1701