1/* 2 Voodoo Banshee driver version 1.0.1 3 4 Author: Daryll Strauss 5 6 Copyright: 1998,1999 7*/ 8 9#ifndef _TDFXDEFS_H_ 10#define _TDFXDEFS_H_ 11 12#define TDFXIOMAPSIZE 0x2000000 13 14/* Flags */ 15#define BIT(n) (1UL<<(n)) 16#define SST_SGRAM_OFLOP_DEL_ADJ_SHIFT 20 17#define SST_SGRAM_CLK_NODELAY BIT(13) 18#define SST_DRAM_REFRESH_EN BIT(0) 19#define SST_DRAM_REFRESH_VALUE_SHIFT 1 20#define SST_DRAM_REFRESH_VALUE (0x1FF<<SST_DRAM_REFRESH_VALUE_SHIFT) 21#define SST_SGRAM_TYPE_SHIFT 27 22#define SST_SGRAM_TYPE (0x1L<<SST_SGRAM_TYPE_SHIFT) 23#define SST_SGRAM_NUM_CHIPSETS BIT(26) 24#define SST_SGRAM_TYPE_8MBIT (0x0L<<SST_SGRAM_TYPE_SHIFT) 25#define SST_SGRAM_TYPE_16MBIT (0x1L<<SST_SGRAM_TYPE_SHIFT) 26#define SST_DISABLE_2D_BLOCK_WRITE BIT(15) 27#define SST_MCTL_TYPE_SDRAM BIT(30) 28#define SST_DAC_MODE_2X BIT(0) 29#define SST_VIDEO_2X_MODE_EN BIT(26) 30#define SST_VGA0_EXTENSIONS BIT(6) 31#define SST_WAKEUP_3C3 1 32#define SST_VGA0_WAKEUP_SELECT_SHIFT 8 33#define SST_VGA0_LEGACY_DECODE_SHIFT 9 34#define SST_VGA0_LEGACY_DECODE (1 << SST_VGA0_LEGACY_DECODE_SHIFT) 35#define SST_VGA0_ENABLE_DECODE 0 36#define SST_ENABLE_ALT_READBACK 0 37#define SST_VGA0_CLUT_SELECT_SHIFT 2 38#define SST_CLUT_SELECT_6BIT 0 39#define SST_CLUT_SELECT_8BIT 1 40#define SST_VGA0_CONFIG_READBACK_SHIFT 10 41#define SST_VIDEO_PROCESSOR_EN BIT(0) 42#define SST_CURSOR_MODE_SHIFT 1 43#define SST_CURSOR_X11 (1<<SST_CURSOR_MODE_SHIFT) 44#define SST_DESKTOP_EN BIT(7) 45#define SST_DESKTOP_PIXEL_FORMAT_SHIFT 18 46#define SST_DESKTOP_CLUT_BYPASS BIT(10) 47#define SST_INTERLACE BIT(3) 48#define SST_HALF_MODE BIT(4) 49#define SST_CURSOR_EN BIT(27) 50#define SST_FBI_BUSY BIT(7) 51#define SST_BUSY BIT(9) 52#define SST_RETRACE BIT(6) 53#define SST_COMMANDEXTRA_VSYNC BIT(2) 54 55#define MEM_TYPE_SGRAM 0 56#define MEM_TYPE_SDRAM 1 57/* 58 * SST_RAW_LFB_ADDR_STRIDE(Lg2SizeInK) takes the 59 * lfbMemoryConfig value for SGRAMStrideInTiles. This 60 * is given by this table: 61 * SGRAMStrideInBytes lfbMemoryConfig Value 62 * ================== ===================== 63 * 1k 0 64 * 2k 1 65 * 4k 2 66 * 8k 3 67 * 16k 4 68 * 69 * FWIW, the right hand column is log2(left hand column)-10 70 */ 71#define SST_RAW_LFB_ADDR_STRIDE_SHIFT 13 72#define SST_RAW_LFB_ADDR_STRIDE(Lg2SizeInK) \ 73 ((Lg2SizeInK)<<SST_RAW_LFB_ADDR_STRIDE_SHIFT) 74#define SST_RAW_LFB_ADDR_STRIDE_4K SST_RAW_LFB_ADDR_STRIDE(2) 75#define SST_RAW_LFB_ADDR_STRIDE_8K SST_RAW_LFB_ADDR_STRIDE(3) 76#define SST_RAW_LFB_ADDR_STRIDE_16K SST_RAW_LFB_ADDR_STRIDE(4) 77#define SST_RAW_LFB_TILE_STRIDE_SHIFT 16 78 79#define BLIT_LEFT 1 80#define BLIT_UP 2 81 82/* Base Registers */ 83#define STATUS 0x0 84#define PCIINIT0 0x4 85#define SIPMONITOR 0x8 86#define LFBMEMORYCONFIG 0xC 87#define MISCINIT0 0x10 88#define MISCINIT1 0x14 89#define DRAMINIT0 0x18 90#define DRAMINIT1 0x1C 91#define AGPINIT 0x20 92#define TMUGBEINIT 0x24 93#define VGAINIT0 0x28 94#define VGAINIT1 0x2c 95#define DRAMCOMMAND 0x30 96#define DRAMDATA 0x34 97#define PLLCTRL0 0x40 98#define PLLCTRL1 0x44 99#define PLLCTRL2 0x48 100#define DACMODE 0x4c 101#define DACADDR 0x50 102#define DACDATA 0x54 103#define RGBMAXDELTA 0x58 104#define VIDPROCCFG 0x5c 105#define HWCURPATADDR 0x60 106#define HWCURLOC 0x64 107#define HWCURC0 0x68 108#define HWCURC1 0x6c 109#define VIDINFORMAT 0x70 110#define VIDINSTATUS 0x74 111#define VIDSERIALPARALLELPORT 0x78 112#define VSP_TVOUT_RESET 0x80000000 /* 0 forces TVout reset */ 113#define VSP_GPIO2_IN 0x40000000 114#define VSP_GPIO1_OUT 0x20000000 115#define VSP_VMI_RESET_N 0x10000000 /* 0 forces a VMI reset */ 116#define VSP_SDA1_IN 0x08000000 /* i2c bus on the feature connector */ 117#define VSP_SCL1_IN 0x04000000 118#define VSP_SDA1_OUT 0x02000000 119#define VSP_SCL1_OUT 0x01000000 120#define VSP_ENABLE_IIC1 0x00800000 /* 1 enables I2C bus 1 */ 121#define VSP_SDA0_IN 0x00400000 /* i2c bus on the monitor connector */ 122#define VSP_SCL0_IN 0x00200000 123#define VSP_SDA0_OUT 0x00100000 124#define VSP_SCL0_OUT 0x00080000 125#define VSP_ENABLE_IIC0 0x00040000 /* 1 enables I2C bus 0 */ 126#define VSP_VMI_ADDRESS 0x0003c000 /* mask */ 127#define VSP_VMI_DATA 0x00003fc0 /* mask */ 128#define VSP_VMI_DISABLE 0x00000020 /* 0 enables VMI output */ 129#define VSP_VMI_RDY_N 0x00000010 130#define VSP_RW_N 0x00000008 131#define VSP_DS_N 0x00000004 132#define VSP_CS_N 0x00000002 133#define VSP_HOST_ENABLE 0x00000001 /* 1 enables VMI host control*/ 134#define VIDINXDECIMDELTAS 0x7c 135#define VIDINDECIMINITERRS 0x80 136#define VIDYDECIMDELTA 0x84 137#define VIDPXELBUGTHOLD 0x88 138#define VIDCHROMAMIN 0x8c 139#define VIDCHROMAMAX 0x90 140#define VIDCURRENTLINE 0x94 141#define VIDSCREENSIZE 0x98 142#define VIDOVERLAYSTARTCOORDS 0x9c 143#define VIDOVERLAYENDSCREENCOORDS 0xa0 144#define VIDOVERLAYDUDX 0xa4 145#define VIDOVERLAYDUDXOFFSETSRCWIDTH 0xa8 146#define VIDOVERLAYDVDY 0xac 147#define VIDOVERLAYDVDYOFFSET 0xe0 148#define VIDDESKTOPSTARTADDR 0xe4 149#define VIDDESKTOPOVERLAYSTRIDE 0xe8 150#define VIDINADDR0 0xec 151#define VIDINADDR1 0xf0 152#define VIDINADDR2 0xf4 153#define VIDINSTRIDE 0xf8 154#define VIDCUROVERLAYSTARTADDR 0xfc 155 156/* 2D Commands */ 157#define SST_2D_NOP 0 158#define SST_2D_SCRNTOSCRNBLIT 1 159#define SST_2D_SCRNTOSCRNSTRETCH 2 160#define SST_2D_HOSTTOSCRNBLIT 3 161#define SST_2D_HOSTTOSCRNSTRECH 4 162#define SST_2D_RECTANGLEFILL 5 163#define SST_2D_LINE (6 | SST_2D_REVERSIBLE) 164#define SST_2D_POLYLINE (7 | SST_2D_REVERSIBLE) 165#define SST_2D_POLYGONFILL (8 | SST_2D_REVERSIBLE) 166 167/* Flags */ 168#define SST_2D_REVERSIBLE BIT(9) 169#define SST_2D_STIPPLE_LINE BIT(12) 170#define SST_2D_MONOCHROME_PATTERN BIT(13) 171#define SST_2D_X_RIGHT_TO_LEFT BIT(14) 172#define SST_2D_Y_BOTTOM_TO_TOP BIT(15) 173#define SST_2D_TRANSPARENT_MONOCHROME BIT(16) 174#define SST_2D_SOURCE_PACKING_SHIFT 22 175#define SST_2D_SOURCE_PACKING_BYTE (1<<SST_2D_SOURCE_PACKING_SHIFT) 176#define SST_2D_SOURCE_PACKING_WORD (2<<SST_2D_SOURCE_PACKING_SHIFT) 177#define SST_2D_SOURCE_PACKING_DWORD (3<<SST_2D_SOURCE_PACKING_SHIFT) 178#define SST_2D_X_PATOFFSET_SHIFT 17 179#define SST_2D_Y_PATOFFSET_SHIFT 20 180#define SST_2D_SRC_FORMAT_SHIFT 16 181#define SST_2D_PIXFMT_1BPP (0<<SST_2D_SRC_FORMAT_SHIFT) 182#define SST_2D_SRC_COLORKEY_EX BIT(0) 183#define SST_2D_GO BIT(8) 184#define SST_2D_USECLIP1 BIT(23) 185 186/* 2D Registers */ 187#define SST_2D_OFFSET 0x100000 188#define SST_2D_CLIP0MIN SST_2D_OFFSET+0x8 189#define SST_2D_CLIP0MAX SST_2D_OFFSET+0xC 190#define SST_2D_DSTBASEADDR SST_2D_OFFSET+0x10 191#define SST_2D_DSTFORMAT SST_2D_OFFSET+0x14 192#define SST_2D_SRCCOLORKEYMIN SST_2D_OFFSET+0x18 193#define SST_2D_SRCCOLORKEYMAX SST_2D_OFFSET+0x1c 194#define SST_2D_DSTCOLORKEYMIN SST_2D_OFFSET+0x20 195#define SST_2D_DSTCOLORKEYMAX SST_2D_OFFSET+0x24 196#define SST_2D_BRESERROR0 SST_2D_OFFSET+0x28 197#define SST_2D_BRESERROR1 SST_2D_OFFSET+0x2c 198#define SST_2D_ROP SST_2D_OFFSET+0x30 199#define SST_2D_SRCBASEADDR SST_2D_OFFSET+0x34 200#define SST_2D_COMMANDEXTRA SST_2D_OFFSET+0x38 201#define SST_2D_LINESTIPPLE SST_2D_OFFSET+0x3c 202#define SST_2D_LINESTYLE SST_2D_OFFSET+0x40 203#define SST_2D_CLIP1MIN SST_2D_OFFSET+0x4C 204#define SST_2D_CLIP1MAX SST_2D_OFFSET+0x50 205#define SST_2D_SRCFORMAT SST_2D_OFFSET+0x54 206#define SST_2D_SRCSIZE SST_2D_OFFSET+0x58 207#define SST_2D_SRCXY SST_2D_OFFSET+0x5C 208#define SST_2D_COLORBACK SST_2D_OFFSET+0x60 209#define SST_2D_COLORFORE SST_2D_OFFSET+0x64 210#define SST_2D_DSTSIZE SST_2D_OFFSET+0x68 211#define SST_2D_DSTXY SST_2D_OFFSET+0x6C 212#define SST_2D_COMMAND SST_2D_OFFSET+0x70 213#define SST_2D_LAUNCH SST_2D_OFFSET+0x80 214#define SST_2D_PATTERN0 SST_2D_OFFSET+0x100 215#define SST_2D_PATTERN1 SST_2D_OFFSET+0x104 216 217/* 3D Commands */ 218#define SST_3D_NOP 0 219 220/* 3D Registers */ 221#define SST_3D_OFFSET 0x200000 222#define SST_3D_STATUS SST_3D_OFFSET+0 223#define SST_3D_LFBMODE SST_3D_OFFSET+0x114 224#define SST_3D_COMMAND SST_3D_OFFSET+0x120 225#define SST_3D_SWAPBUFFERCMD SST_3D_OFFSET+0x128 226#define SST_3D_SLICTRL SST_3D_OFFSET+0x20C 227#define SST_3D_AACTRL SST_3D_OFFSET+0x210 228#define SST_3D_SWAPPENDING SST_3D_OFFSET+0x24C 229#define SST_3D_LEFTOVERLAYBUF SST_3D_OFFSET+0x250 230#define SST_3D_RIGHTOVERLAYBUF SST_3D_OFFSET+0x254 231#define SST_3D_FBISWAPHISTORY SST_3D_OFFSET+0x258 232 233/* NAPALM REGISTERS */ 234#define CFG_PCI_COMMAND 4 235#define CFG_MEM0BASE 16 236#define CFG_MEM1BASE 20 237#define CFG_INIT_ENABLE 64 238#define CFG_PCI_DECODE 72 239#define CFG_VIDEO_CTRL0 128 240#define CFG_VIDEO_CTRL1 132 241#define CFG_VIDEO_CTRL2 136 242#define CFG_SLI_LFB_CTRL 140 243#define CFG_AA_ZBUFF_APERTURE 144 244#define CFG_AA_LFB_CTRL 148 245#define CFG_SLI_AA_MISC 172 246 247/* Pixel Formats */ 248#define GR_PIXFMT_I_8 0x0001 249#define GR_PIXFMT_AI_88 0x0002 250#define GR_PIXFMT_RGB_565 0x0003 251#define GR_PIXFMT_ARGB_1555 0x0004 252#define GR_PIXFMT_ARGB_8888 0x0005 253#define GR_PIXFMT_AA_2_RGB_565 0x0006 254#define GR_PIXFMT_AA_2_ARGB_1555 0x0007 255#define GR_PIXFMT_AA_2_ARGB_8888 0x0008 256#define GR_PIXFMT_AA_4_RGB_565 0x0009 257#define GR_PIXFMT_AA_4_ARGB_1555 0x000a 258#define GR_PIXFMT_AA_4_ARGB_8888 0x000b 259 260/* pciInit0 */ 261#define SST_PCI_STALL_ENABLE BIT(0) 262#define SST_PCI_LOWTHRESH_SHIFT 2 263#define SST_PCI_LOWTHRESH (0xF << SST_PCI_LOWTHRESH_SHIFT) 264#define SST_PCI_HARDCODE_BASE BIT(7) 265#define SST_PCI_READ_WS BIT(8) 266#define SST_PCI_WRITE_WS BIT(9) 267#define SST_PCI_DISABLE_IO BIT(11) 268#define SST_PCI_DISABLE_MEM BIT(12) 269#define SST_PCI_RETRY_INTERVAL_SHIFT 13 270#define SST_PCI_RETRY_INTERVAL (0x1F << SST_PCI_RETRY_INTERVAL_SHIFT) 271#define SST_PCI_INTERRUPT_ENABLE BIT(18) 272#define SST_PCI_TIMEOUT_ENABLE BIT(19) 273#define SST_PCI_FORCE_FB_HIGH BIT(26) 274 275#define SST_AA_CLK_INVERT BIT(20) 276#define SST_AA_CLK_DELAY_SHIFT 21 277#define SST_AA_CLK_DELAY (0xF<<SST_AA_CLK_DELAY_SHIFT) 278 279#define CFG_SWAP_ALGORITHM_VSYNC (0x00) 280#define CFG_SWAP_ALGORITHM_SYNCIN (0x01) 281#define CFG_SWAPBUFFER_ALGORITHM_SHIFT (25) 282 283/* CFG_INIT_ENABLE */ 284#define CFG_UPDATE_MEMBASE_LSBS BIT(10) 285#define CFG_SNOOP_EN BIT(11) 286#define CFG_SNOOP_MEMBASE0_EN BIT(12) 287#define CFG_SNOOP_MEMBASE1_EN BIT(13) 288#define CFG_SNOOP_SLAVE BIT(14) 289#define CFG_SNOOP_MEMBASE0_SHIFT 15 290#define CFG_SNOOP_MEMBASE0 (0x3FF<<CFG_SNOOP_MEMBASE0_SHIFT) 291#define CFG_SWAP_ALGORITHM BIT(25) 292#define CFG_SWAP_MASTER BIT(26) 293#define CFG_SWAP_QUICK BIT(27) 294#define CFG_MULTI_FUNCTION_DEV BIT(28) 295#define CFG_LFB_RD_CACHE_DISABLE BIT(29) 296#define CFG_SNOOP_FBIINIT_WR_EN BIT(30) 297#define CFG_SNOOP_MEMBASE0_DECODE_SHIFT 10 298#define CFG_SNOOP_MEMBASE0_DECODE (0xF<<CFG_SNOOP_MEMBASE0_DECODE_SHIFT) 299#define CFG_SNOOP_MEMBASE1_DECODE_SHIFT 14 300#define CFG_SNOOP_MEMBASE1_DECODE (0xF<<CFG_SNOOP_MEMBASE1_DECODE_SHIFT) 301#define CFG_SNOOP_MEMBASE1_SHIFT 18 302#define CFG_SNOOP_MEMBASE1 (0x3FF<<CFG_SNOOP_MEMBASE1_SHIFT) 303 304/* CFG_VIDEO_CTRL0 */ 305#define CFG_ENHANCED_VIDEO_EN BIT(0) 306#define CFG_ENHANCED_VIDEO_SLV BIT(1) 307#define CFG_VIDEO_TV_OUTPUT_EN BIT(2) 308#define CFG_VIDEO_LOCALMUX_SEL BIT(3) 309#define CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY BIT(3) 310#define CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT 4 311#define CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT 6 312#define CFG_VIDEO_OTHERMUX_SEL_TRUE (0x3<<CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) 313#define CFG_VIDEO_OTHERMUX_SEL_FALSE (0x3<<CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) 314#define CFG_VIDEO_OTHERMUX_SEL_PIPE 0 315#define CFG_VIDEO_OTHERMUX_SEL_PIPE_PLUS_AAFIFO 1 316#define CFG_VIDEO_OTHERMUX_SEL_AAFIFO 2 317#define CFG_SLI_FETCH_COMPARE_INV BIT(8) 318#define CFG_SLI_CRT_COMPARE_INV BIT(9) 319#define CFG_SLI_AAFIFO_COMPARE_INV BIT(10) 320#define CFG_VIDPLL_SEL BIT(11) 321#define CFG_DIVIDE_VIDEO_SHIFT 12 322#define CFG_DIVIDE_VIDEO (0x7<<CFG_DIVIDE_VIDEO_SHIFT) 323#define CFG_DIVIDE_VIDEO_BY_1 (0x0<<CFG_DIVIDE_VIDEO_SHIFT) 324#define CFG_DIVIDE_VIDEO_BY_2 (0x1<<CFG_DIVIDE_VIDEO_SHIFT) 325#define CFG_DIVIDE_VIDEO_BY_4 (0x2<<CFG_DIVIDE_VIDEO_SHIFT) 326#define CFG_DIVIDE_VIDEO_BY_8 (0x3<<CFG_DIVIDE_VIDEO_SHIFT) 327#define CFG_DIVIDE_VIDEO_BY_16 (0x4<<CFG_DIVIDE_VIDEO_SHIFT) 328#define CFG_DIVIDE_VIDEO_BY_32 (0x5<<CFG_DIVIDE_VIDEO_SHIFT) 329#define CFG_ALWAYS_DRIVE_AA_BUS BIT(15) 330#define CFG_VSYNC_IN_DEL_SHIFT 16 331#define CFG_VSYNC_IN_DEL (0xF<<CFG_VSYNC_IN_DEL_SHIFT) 332#define CFG_DAC_VSYNC_TRISTATE BIT(24) 333#define CFG_DAC_HSYNC_TRISTATE BIT(25) 334 335/* CFG_VIDEO_CTRL1 */ 336#define CFG_SLI_RENDERMASK_FETCH_SHIFT 0 337#define CFG_SLI_RENDERMASK_FETCH (0xFF<<CFG_SLI_RENDERMASK_FETCH_SHIFT) 338#define CFG_SLI_COMPAREMASK_FETCH_SHIFT 8 339#define CFG_SLI_COMPAREMASK_FETCH (0xFF<<CFG_SLI_COMPAREMASK_FETCH_SHIFT) 340#define CFG_SLI_RENDERMASK_CRT_SHIFT 16 341#define CFG_SLI_RENDERMASK_CRT (0xFF<<CFG_SLI_RENDERMASK_CRT_SHIFT) 342#define CFG_SLI_COMPAREMASK_CRT_SHIFT 24 343#define CFG_SLI_COMPAREMASK_CRT (0xFF<<CFG_SLI_COMPAREMASK_CRT_SHIFT) 344 345/* CFG_VIDEO_CTRL2 */ 346#define CFG_SLI_RENDERMASK_AAFIFO_SHIFT 0 347#define CFG_SLI_RENDERMASK_AAFIFO (0xFF<<CFG_SLI_RENDERMASK_AAFIFO_SHIFT) 348#define CFG_SLI_COMPAREMASK_AAFIFO_SHIFT 8 349#define CFG_SLI_COMPAREMASK_AAFIFO (0xFF<<CFG_SLI_COMPAREMASK_AAFIFO_SHIFT) 350 351/* CFG_SLI_LFB_CTRL */ 352#define CFG_SLI_LFB_RENDERMASK_SHIFT 0 353#define CFG_SLI_LFB_RENDERMASK (0xFF<<CFG_SLI_LFB_RENDERMASK_SHIFT) 354#define CFG_SLI_LFB_COMPAREMASK_SHIFT 8 355#define CFG_SLI_LFB_COMPAREMASK (0xFF<<CFG_SLI_LFB_COMPAREMASK_SHIFT) 356#define CFG_SLI_LFB_SCANMASK_SHIFT 16 357#define CFG_SLI_LFB_SCANMASK (0xFF<<CFG_SLI_LFB_SCANMASK_SHIFT) 358#define CFG_SLI_LFB_NUMCHIPS_LOG2_SHIFT 24 359#define CFG_SLI_LFB_NUMCHIPS_LOG2 (0x3<<CFG_SLI_LFB_NUMCHIPS_LOG2_SHIFT) 360#define CFG_SLI_LFB_CPU_WR_EN BIT(26) 361#define CFG_SLI_LFB_DPTCH_WR_EN BIT(27) 362#define CFG_SLI_RD_EN BIT(28) 363 364/* CFG_AA_ZBUFF_APERTURE */ 365#define CFG_AA_DEPTH_BUFFER_BEG_SHIFT 0 366#define CFG_AA_DEPTH_BUFFER_BEG (0x7FFF<<CFG_AA_DEPTH_BUFFER_BEG_SHIFT) 367#define CFG_AA_DEPTH_BUFFER_END_SHIFT 16 368#define CFG_AA_DEPTH_BUFFER_END (0xFFFF<<CFG_AA_DEPTH_BUFFER_END_SHIFT) 369 370/* CFG_AA_LFB_CTRL */ 371#define CFG_AA_BASEADDR_SHIFT 0 372#define CFG_AA_BASEADDR (0x3FFFFFF<<CFG_AA_BASEADDR_SHIFT) 373#define CFG_AA_LFB_CPU_WR_EN BIT(26) 374#define CFG_AA_LFB_DPTCH_WR_EN BIT(27) 375#define CFG_AA_LFB_RD_EN BIT(28) 376#define CFG_AA_LFB_RD_FORMAT_SHIFT 29 377#define CFG_AA_LFB_RD_FORMAT (0x3<<CFG_AA_LFB_RD_FORMAT_SHIFT) 378#define CFG_AA_LFB_RD_FORMAT_16BPP (0x0<<CFG_AA_LFB_RD_FORMAT_SHIFT) 379#define CFG_AA_LFB_RD_FORMAT_15BPP (0x1<<CFG_AA_LFB_RD_FORMAT_SHIFT) 380#define CFG_AA_LFB_RD_FORMAT_32BPP (0x2<<CFG_AA_LFB_RD_FORMAT_SHIFT) 381#define CFG_AA_LFB_RD_DIVIDE_BY_4 BIT(31) 382 383/* CFG_SLI_AA_MISC */ 384#define CFG_VGA_VSYNC_OFFSET_SHIFT 0 385#define CFG_VGA_VSYNC_OFFSET (0x1ff<<CFG_VGA_VSYNC_OFFSET_SHIFT) 386#define CFG_VGA_VSYNC_OFFSET_PIXELS_SHIFT 0 387#define CFG_VGA_VSYNC_OFFSET_CHARS_SHIFT 3 388#define CFG_VGA_VSYNC_OFFSET_HXTRA_SHIFT 6 389#define CFG_HOTPLUG_SHIFT 9 390#define CFG_HOTPLUG_TRISTATE (0x0<<CFG_HOTPLUG_SHIFT) 391#define CFG_HOTPLUG_DRIVE0 (0x2<<CFG_HOTPLUG_SHIFT) 392#define CFG_HOTPLUG_DRIVE1 (0x3<<CFG_HOTPLUG_SHIFT) 393#define CFG_AA_LFB_RD_SLV_WAIT BIT(12) 394 395/* SLICTL_3D_CTRL */ 396#define SLICTL_3D_RENDERMASK_SHIFT 0 397#define SLICTL_3D_RENDERMASK (0xFF<<SLICTL_3D_RENDERMASK_SHIFT) 398#define SLICTL_3D_COMPAREMASK_SHIFT 8 399#define SLICTL_3D_COMPAREMASK (0xFF<<SLICTL_3D_COMPAREMASK_SHIFT) 400#define SLICTL_3D_SCANMASK_SHIFT 16 401#define SLICTL_3D_SCANMASK (0xFF<<SLICTL_3D_SCANMASK_SHIFT) 402#define SLICTL_3D_NUMCHIPS_LOG2_SHIFT 24 403#define SLICTL_3D_NUMCHIPS_LOG2 (0x3<<SLICTL_3D_NUMCHIPS_LOG2_SHIFT) 404#define SLICTL_3D_EN BIT(26) 405 406#define SST_POWERDOWN_DAC BIT(8) 407 408#endif 409