trident.h revision eca46af7
195b296d0Smrg/*
295b296d0Smrg * Copyright 1992-2003 by Alan Hourihane, North Wales, UK.
395b296d0Smrg *
495b296d0Smrg * Permission to use, copy, modify, distribute, and sell this software and its
595b296d0Smrg * documentation for any purpose is hereby granted without fee, provided that
695b296d0Smrg * the above copyright notice appear in all copies and that both that
795b296d0Smrg * copyright notice and this permission notice appear in supporting
895b296d0Smrg * documentation, and that the name of Alan Hourihane not be used in
995b296d0Smrg * advertising or publicity pertaining to distribution of the software without
1095b296d0Smrg * specific, written prior permission.  Alan Hourihane makes no representations
1195b296d0Smrg * about the suitability of this software for any purpose.  It is provided
1295b296d0Smrg * "as is" without express or implied warranty.
1395b296d0Smrg *
1495b296d0Smrg * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
1595b296d0Smrg * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
1695b296d0Smrg * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
1795b296d0Smrg * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
1895b296d0Smrg * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
1995b296d0Smrg * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
2095b296d0Smrg * PERFORMANCE OF THIS SOFTWARE.
2195b296d0Smrg *
2295b296d0Smrg * Authors:  Alan Hourihane, <alanh@fairlite.demon.co.uk>
2395b296d0Smrg */
2495b296d0Smrg/*#define VBE_INFO*/
2595b296d0Smrg
2695b296d0Smrg#ifndef _TRIDENT_H_
2795b296d0Smrg#define _TRIDENT_H_
2895b296d0Smrg
2995b296d0Smrg#include <stdio.h>
3095b296d0Smrg#include <string.h>
3195b296d0Smrg#include <math.h>
3295b296d0Smrg
33ff89ac2bSmrg#include "tridentpcirename.h"
34ff89ac2bSmrg
3595b296d0Smrg#include "exa.h"
3695b296d0Smrg#include "xf86Cursor.h"
37eca46af7Smrg#ifdef HAVE_XAA_H
3895b296d0Smrg#include "xaa.h"
39eca46af7Smrg#endif
40eca46af7Smrg#include "xf86fbman.h"
4195b296d0Smrg#include "xf86RamDac.h"
4295b296d0Smrg#include "compiler.h"
4395b296d0Smrg#include "vgaHW.h"
4495b296d0Smrg#include "xf86i2c.h"
4595b296d0Smrg#include "xf86int10.h"
4695b296d0Smrg#include "shadowfb.h"
4795b296d0Smrg#include "shadow.h"
4895b296d0Smrg#include "xf86xv.h"
4995b296d0Smrg#include "xf86Pci.h"
5095b296d0Smrg#include "vbe.h"
5195b296d0Smrg
52eca46af7Smrg#include "compat-api.h"
532378475aSmrg/* Banked framebuffer only supported on ISA */
542378475aSmrg#ifdef HAVE_ISA
552378475aSmrg#define LINEAR() (pTrident->Linear)
562378475aSmrg#else
572378475aSmrg#define LINEAR() (1)
582378475aSmrg#endif
592378475aSmrg
60eca46af7Smrg#define PCI_VENDOR_TRIDENT		0x1023
61eca46af7Smrg#define PCI_CHIP_2100			0x2100
62eca46af7Smrg#define PCI_CHIP_2200			0x2200
63eca46af7Smrg#define PCI_CHIP_8400			0x8400
64eca46af7Smrg#define PCI_CHIP_8420			0x8420
65eca46af7Smrg#define PCI_CHIP_8500			0x8500
66eca46af7Smrg#define PCI_CHIP_8520			0x8520
67eca46af7Smrg#define PCI_CHIP_8600			0x8600
68eca46af7Smrg#define PCI_CHIP_8620			0x8620
69eca46af7Smrg#define PCI_CHIP_8820			0x8820
70eca46af7Smrg#define PCI_CHIP_9320			0x9320
71eca46af7Smrg#define PCI_CHIP_9388			0x9388
72eca46af7Smrg#define PCI_CHIP_9397			0x9397
73eca46af7Smrg#define PCI_CHIP_939A			0x939A
74eca46af7Smrg#define PCI_CHIP_9420			0x9420
75eca46af7Smrg#define PCI_CHIP_9440			0x9440
76eca46af7Smrg#define PCI_CHIP_9520			0x9520
77eca46af7Smrg#define PCI_CHIP_9525			0x9525
78eca46af7Smrg#define PCI_CHIP_9540			0x9540
79eca46af7Smrg#define PCI_CHIP_9660			0x9660
80eca46af7Smrg#define PCI_CHIP_9750			0x9750
81eca46af7Smrg#define PCI_CHIP_9850			0x9850
82eca46af7Smrg#define PCI_CHIP_9880			0x9880
83eca46af7Smrg#define PCI_CHIP_9910			0x9910
8495b296d0Smrg
8595b296d0Smrgtypedef struct {
8695b296d0Smrg	unsigned char tridentRegs3x4[0x100];
8795b296d0Smrg	unsigned char tridentRegs3CE[0x100];
8895b296d0Smrg	unsigned char tridentRegs3C4[0x100];
8995b296d0Smrg	unsigned char tridentRegsDAC[0x01];
9095b296d0Smrg        unsigned char tridentRegsClock[0x05];
9195b296d0Smrg	unsigned char DacRegs[0x300];
9295b296d0Smrg} TRIDENTRegRec, *TRIDENTRegPtr;
9395b296d0Smrg
9495b296d0Smrg#define VGA_REGNUM_ABOUT_TV 19
9595b296d0Smrg#define TRIDENTPTR(p)	((TRIDENTPtr)((p)->driverPrivate))
9695b296d0Smrg
9795b296d0Smrgtypedef struct {
9895b296d0Smrg    ScrnInfoPtr		pScrn;
9995b296d0Smrg    pciVideoPtr		PciInfo;
10014330f12Smrg    uint32_t		PciTag;
10195b296d0Smrg    EntityInfoPtr	pEnt;
10295b296d0Smrg    ExaDriverPtr	EXADriverPtr;
10395b296d0Smrg    int			useEXA;
10495b296d0Smrg    int			Chipset;
10595b296d0Smrg    int			DACtype;
10695b296d0Smrg    int			RamDac;
10795b296d0Smrg    int                 ChipRev;
10895b296d0Smrg    int			HwBpp;
10995b296d0Smrg    int			BppShift;
11095b296d0Smrg    CARD32		IOAddress;
11195b296d0Smrg    unsigned long	FbAddress;
11295b296d0Smrg    unsigned char *     IOBase;
11395b296d0Smrg    unsigned char *	FbBase;
11495b296d0Smrg    long		FbMapSize;
11514330f12Smrg    unsigned long		PIOBase;
11695b296d0Smrg    Bool		NoAccel;
11795b296d0Smrg    Bool		HWCursor;
11895b296d0Smrg    Bool		UsePCIRetry;
11995b296d0Smrg    Bool		UsePCIBurst;
12095b296d0Smrg    Bool		NewClockCode;
12195b296d0Smrg    Bool		Clipping;
12295b296d0Smrg    Bool		DstEnable;
12395b296d0Smrg    Bool		ROP;
12495b296d0Smrg    Bool		HasSGRAM;
12595b296d0Smrg    Bool		MUX;
12695b296d0Smrg    Bool		IsCyber;
12795b296d0Smrg    Bool		CyberShadow;
12895b296d0Smrg    Bool		CyberStretch;
12995b296d0Smrg    Bool		NoMMIO;
13095b296d0Smrg    Bool                MMIOonly;
13195b296d0Smrg    Bool		ShadowFB;
13295b296d0Smrg    Bool		Linear;
13395b296d0Smrg    DGAModePtr		DGAModes;
13495b296d0Smrg    int			numDGAModes;
13595b296d0Smrg    Bool		DGAactive;
13695b296d0Smrg    int			DGAViewportStatus;
13795b296d0Smrg    unsigned char *	ShadowPtr;
13895b296d0Smrg    int			ShadowPitch;
13995b296d0Smrg    RefreshAreaFuncPtr  RefreshArea;
140eca46af7Smrg    void	        (*PointerMoved)(SCRN_ARG_TYPE arg, int x, int y);
14195b296d0Smrg    int                 Rotate;
14295b296d0Smrg    float		frequency;
14395b296d0Smrg    unsigned char	REGPCIReg;
14495b296d0Smrg    unsigned char	REGNewMode1;
14595b296d0Smrg    CARD8		SaveClock1;
14695b296d0Smrg    CARD8		SaveClock2;
14795b296d0Smrg    CARD8		SaveClock3;
14895b296d0Smrg    int			MinClock;
14995b296d0Smrg    int			MaxClock;
15095b296d0Smrg    int			MUXThreshold;
15195b296d0Smrg    int                 currentClock;
15295b296d0Smrg    int			MCLK;
15395b296d0Smrg    int			dwords;
15495b296d0Smrg    int			h;
15595b296d0Smrg    int			x;
15695b296d0Smrg    int			w;
15795b296d0Smrg    int			y;
15895b296d0Smrg    int                 lcdMode;
15995b296d0Smrg    Bool                lcdActive;
16095b296d0Smrg    Bool                doInit;
16195b296d0Smrg#ifdef READOUT
16295b296d0Smrg    Bool                DontSetClock;
16395b296d0Smrg#endif
16495b296d0Smrg    TRIDENTRegRec	SavedReg;
16595b296d0Smrg    TRIDENTRegRec	ModeReg;
16695b296d0Smrg    I2CBusPtr		DDC;
16795b296d0Smrg    CARD16		EngineOperation;
16895b296d0Smrg    CARD32		PatternLocation;
16995b296d0Smrg    CARD32		BltScanDirection;
17095b296d0Smrg    CARD32		DrawFlag;
17195b296d0Smrg    CARD16		LinePattern;
17295b296d0Smrg    RamDacRecPtr	RamDacRec;
17395b296d0Smrg    int			CursorOffset;
17495b296d0Smrg    xf86CursorInfoPtr	CursorInfoRec;
17595b296d0Smrg    xf86Int10InfoPtr	Int10;
17695b296d0Smrg    vbeInfoPtr		pVbe;
17795b296d0Smrg#ifdef VBE_INFO
17895b296d0Smrg    vbeModeInfoPtr	vbeModes;
17995b296d0Smrg#endif
180eca46af7Smrg#ifdef HAVE_XAA_H
18195b296d0Smrg    XAAInfoRecPtr	AccelInfoRec;
182eca46af7Smrg#endif
18395b296d0Smrg    CloseScreenProcPtr	CloseScreen;
18495b296d0Smrg    ScreenBlockHandlerProcPtr BlockHandler;
185eca46af7Smrg    CreateScreenResourcesProcPtr CreateScreenResources;
18695b296d0Smrg    int                 panelWidth;
18795b296d0Smrg    int                 panelHeight;
18895b296d0Smrg    unsigned int	(*ddc1Read)(ScrnInfoPtr);
18995b296d0Smrg    CARD8*		XAAScanlineColorExpandBuffers[2];
19095b296d0Smrg    CARD8*		XAAImageScanlineBuffer[1];
19195b296d0Smrg    void                (*InitializeAccelerator)(ScrnInfoPtr);
19295b296d0Smrg    void		(*VideoTimerCallback)(ScrnInfoPtr, Time);
19395b296d0Smrg    XF86VideoAdaptorPtr adaptor;
19495b296d0Smrg    int                 videoKey;
19595b296d0Smrg    int			hsync;
19695b296d0Smrg    int			hsync_rskew;
19795b296d0Smrg    int			vsync;
19895b296d0Smrg    int			vsync_bskew;
19995b296d0Smrg    CARD32              videoFlags;
20095b296d0Smrg    int			keyOffset;
20195b296d0Smrg    int                 OverrideHsync;
20295b296d0Smrg    int                 OverrideVsync;
20395b296d0Smrg    int                 OverrideBskew;
20495b296d0Smrg    int                 OverrideRskew;
20595b296d0Smrg    OptionInfoPtr	Options;
20695b296d0Smrg    Bool		shadowNew;
20795b296d0Smrg    int			displaySize;
20895b296d0Smrg    int			dspOverride;
20995b296d0Smrg    Bool		GammaBrightnessOn;
21095b296d0Smrg    int			brightness;
21195b296d0Smrg    double		gamma;
21295b296d0Smrg    int			FPDelay;	/* just for debugging - will go away */
21395b296d0Smrg    int                 TVChipset;    /* 0: None 1: VT1621 2: CH7005C*/
21495b296d0Smrg    int                 TVSignalMode; /* 0: NTSC 1: PAL */
21595b296d0Smrg    Bool                TVRegSet;     /* 0: User not customer TV Reg, 1: User customer TV Reg */
21695b296d0Smrg    unsigned char       TVRegUserSet[2][128]; /*[0][128] for Reg Index, [1][128] for Reg Value */
21795b296d0Smrg    unsigned char       DefaultTVDependVGASetting[VGA_REGNUM_ABOUT_TV+0x62]; /* VGA_REGNUM_ABOUT_TV: VGA Reg, 0x62: TV Reg */
21895b296d0Smrg} TRIDENTRec, *TRIDENTPtr;
21995b296d0Smrg
22095b296d0Smrgtypedef struct {
22195b296d0Smrg    CARD8 mode;
22295b296d0Smrg    int display_x;
22395b296d0Smrg    int display_y;
22495b296d0Smrg    int clock;
22595b296d0Smrg    int shadow_0;
22695b296d0Smrg    int shadow_3;
22795b296d0Smrg    int shadow_4;
22895b296d0Smrg    int shadow_5;
22995b296d0Smrg    int shadow_6;
23095b296d0Smrg    int shadow_7;
23195b296d0Smrg    int shadow_10;
23295b296d0Smrg    int shadow_11;
23395b296d0Smrg    int shadow_16;
23495b296d0Smrg    int shadow_HiOrd;
23595b296d0Smrg} tridentLCD;
23695b296d0Smrg
23795b296d0Smrg#define LCD_ACTIVE 0x01
23895b296d0Smrg#define CRT_ACTIVE 0x02
23995b296d0Smrg
24095b296d0Smrgextern tridentLCD LCD[];
24195b296d0Smrg
24295b296d0Smrgtypedef struct {
24395b296d0Smrg    int x_res;
24495b296d0Smrg    int y_res;
24595b296d0Smrg    int mode;
24695b296d0Smrg} biosMode;
24795b296d0Smrg
24895b296d0Smrgtypedef struct {
24995b296d0Smrg  int x_res;
25095b296d0Smrg  int y_res;
25195b296d0Smrg  CARD8 GR5a;
25295b296d0Smrg  CARD8 GR5c;
25395b296d0Smrg} newModes;
25495b296d0Smrg
25595b296d0Smrg/* Prototypes */
25695b296d0Smrg
25795b296d0SmrgBool TRIDENTClockSelect(ScrnInfoPtr pScrn, int no);
258eca46af7SmrgBool TRIDENTSwitchMode(SWITCH_MODE_ARGS_DECL);
259eca46af7Smrgvoid TRIDENTAdjustFrame(ADJUST_FRAME_ARGS_DECL);
26095b296d0SmrgBool TRIDENTDGAInit(ScreenPtr pScreen);
26195b296d0SmrgBool TRIDENTI2CInit(ScreenPtr pScreen);
26295b296d0Smrgvoid TRIDENTInitVideo(ScreenPtr pScreen);
26395b296d0Smrgvoid TRIDENTResetVideo(ScrnInfoPtr pScrn);
26495b296d0Smrgunsigned int Tridentddc1Read(ScrnInfoPtr pScrn);
26595b296d0Smrgvoid TVGARestore(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg);
26695b296d0Smrgvoid TVGASave(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg);
26795b296d0SmrgBool TVGAInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
26895b296d0Smrgvoid TridentRestore(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg);
26995b296d0Smrgvoid TridentSave(ScrnInfoPtr pScrn, TRIDENTRegPtr tridentReg);
27095b296d0SmrgBool TridentInit(ScrnInfoPtr pScrn, DisplayModePtr mode);
27195b296d0SmrgBool TridentAccelInit(ScreenPtr pScreen);
27295b296d0SmrgBool XPAccelInit(ScreenPtr pScreen);
27395b296d0SmrgBool XP4XaaInit(ScreenPtr pScreen);
27495b296d0SmrgBool XP4ExaInit(ScreenPtr pScreen);
27595b296d0SmrgBool ImageAccelInit(ScreenPtr pScreen);
27695b296d0SmrgBool BladeXaaInit(ScreenPtr pScreen);
27795b296d0SmrgBool BladeExaInit(ScreenPtr pScreen);
27895b296d0SmrgBool TridentHWCursorInit(ScreenPtr pScreen);
27995b296d0Smrgint TridentFindMode(int xres, int yres, int depth);
28095b296d0Smrgvoid TGUISetClock(ScrnInfoPtr pScrn, int clock, unsigned char *a, unsigned char *b);
28195b296d0Smrgvoid TGUISetMCLK(ScrnInfoPtr pScrn, int clock, unsigned char *a, unsigned char *b);
28295b296d0Smrgvoid tridentSetModeBIOS(ScrnInfoPtr pScrn, DisplayModePtr mode);
28395b296d0Smrgvoid TridentOutIndReg(ScrnInfoPtr pScrn,
28495b296d0Smrg		     CARD32 reg, unsigned char mask, unsigned char data);
28595b296d0Smrgunsigned char TridentInIndReg(ScrnInfoPtr pScrn, CARD32 reg);
28695b296d0Smrgvoid TridentLoadPalette(ScrnInfoPtr pScrn, int numColors, int *indicies, LOCO *colors, VisualPtr pVisual);
28795b296d0Smrgvoid TridentSetOverscan(ScrnInfoPtr pScrn, int overscan);
28895b296d0Smrgint TGUISetRead(ScreenPtr pScreen, int bank);
28995b296d0Smrgint TGUISetWrite(ScreenPtr pScreen, int bank);
29095b296d0Smrgint TGUISetReadWrite(ScreenPtr pScreen, int bank);
29195b296d0Smrgint TVGA8900SetRead(ScreenPtr pScreen, int bank);
29295b296d0Smrgint TVGA8900SetWrite(ScreenPtr pScreen, int bank);
29395b296d0Smrgint TVGA8900SetReadWrite(ScreenPtr pScreen, int bank);
29495b296d0Smrgvoid TridentFindClock(ScrnInfoPtr pScrn, int clock);
29595b296d0Smrgfloat CalculateMCLK(ScrnInfoPtr pScrn);
29695b296d0Smrgvoid TRIDENTRefreshArea(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
29795b296d0Smrgvoid TRIDENTShadowUpdate (ScreenPtr pScreen, shadowBufPtr pBuf);
298eca46af7Smrgvoid TRIDENTPointerMoved(SCRN_ARG_TYPE arg, int x, int y);
29995b296d0Smrgvoid TRIDENTRefreshArea8(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
30095b296d0Smrgvoid TRIDENTRefreshArea16(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
30195b296d0Smrgvoid TRIDENTRefreshArea24(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
30295b296d0Smrgvoid TRIDENTRefreshArea32(ScrnInfoPtr pScrn, int num, BoxPtr pbox);
30395b296d0Smrg
30495b296d0Smrgvoid VIA_TVInit(ScrnInfoPtr pScrn);
30595b296d0Smrgvoid VIA_SaveTVDepentVGAReg(ScrnInfoPtr pScrn);
30695b296d0Smrgvoid VIA_RestoreTVDependVGAReg(ScrnInfoPtr pScrn);
30795b296d0Smrgvoid VIA_DumpReg(ScrnInfoPtr pScrn);
30895b296d0Smrg
30995b296d0Smrg/*
31095b296d0Smrg * Trident Chipset Definitions
31195b296d0Smrg */
31295b296d0Smrg
31395b296d0Smrg/* Supported chipsets */
31495b296d0Smrgtypedef enum {
31595b296d0Smrg    TVGA8200LX,
31695b296d0Smrg    TVGA8800BR,
31795b296d0Smrg    TVGA8800CS,
31895b296d0Smrg    TVGA8900B,
31995b296d0Smrg    TVGA8900C,
32095b296d0Smrg    TVGA8900CL,
32195b296d0Smrg    TVGA8900D,
32295b296d0Smrg    TVGA9000,
32395b296d0Smrg    TVGA9000i,
32495b296d0Smrg    TVGA9100B,
32595b296d0Smrg    TVGA9200CXr,
32695b296d0Smrg    TGUI9400CXi,
32795b296d0Smrg    TGUI9420DGi,
32895b296d0Smrg    TGUI9430DGi,
32995b296d0Smrg    TGUI9440AGi,
33095b296d0Smrg    CYBER9320,
33195b296d0Smrg    TGUI9660,
33295b296d0Smrg    TGUI9680,
33395b296d0Smrg    PROVIDIA9682,
33495b296d0Smrg    CYBER9382,
33595b296d0Smrg    CYBER9385,
33695b296d0Smrg    PROVIDIA9685,
33795b296d0Smrg    CYBER9388,
33895b296d0Smrg    CYBER9397,
33995b296d0Smrg    CYBER9397DVD,
34095b296d0Smrg    CYBER9520,
34195b296d0Smrg    CYBER9525DVD,
34295b296d0Smrg    IMAGE975,
34395b296d0Smrg    IMAGE985,
34495b296d0Smrg    BLADE3D,
34595b296d0Smrg    CYBERBLADEI7,
34695b296d0Smrg    CYBERBLADEI7D,
34795b296d0Smrg    CYBERBLADEI1,
34895b296d0Smrg    CYBERBLADEI1D,
34995b296d0Smrg    CYBERBLADEAI1,
35095b296d0Smrg    CYBERBLADEAI1D,
35195b296d0Smrg    CYBERBLADEE4,
35295b296d0Smrg    BLADEXP,
35395b296d0Smrg    CYBERBLADEXPAI1,
35495b296d0Smrg    CYBERBLADEXP4,
35595b296d0Smrg    XP5
35695b296d0Smrg} TRIDENTType;
35795b296d0Smrg
35895b296d0Smrg#define UseMMIO		(pTrident->NoMMIO == FALSE)
35995b296d0Smrg
36095b296d0Smrg#define IsPciCard	(pTrident->pEnt->location.type == BUS_PCI)
36195b296d0Smrg
362ff89ac2bSmrg#ifdef HAVE_ISA
363ff89ac2bSmrg# define IsPrimaryCard	((xf86IsPrimaryPci(pTrident->PciInfo)) || \
36495b296d0Smrg			 (xf86IsPrimaryIsa()))
365ff89ac2bSmrg#else
366ff89ac2bSmrg# define IsPrimaryCard	(xf86IsPrimaryPci(pTrident->PciInfo))
367ff89ac2bSmrg#endif
36895b296d0Smrg
36995b296d0Smrg#define HAS_DST_TRANS	((pTrident->Chipset == PROVIDIA9682) || \
37095b296d0Smrg			 (pTrident->Chipset == PROVIDIA9685) || \
37195b296d0Smrg			 (pTrident->Chipset == BLADEXP) || \
37295b296d0Smrg			 (pTrident->Chipset == CYBERBLADEXPAI1))
37395b296d0Smrg
37495b296d0Smrg#define Is3Dchip	((pTrident->Chipset == CYBER9397) || \
37595b296d0Smrg			 (pTrident->Chipset == CYBER9397DVD) || \
37695b296d0Smrg			 (pTrident->Chipset == CYBER9520) || \
37795b296d0Smrg			 (pTrident->Chipset == CYBER9525DVD) || \
37895b296d0Smrg			 (pTrident->Chipset == CYBERBLADEE4)  || \
37995b296d0Smrg			 (pTrident->Chipset == IMAGE975)  || \
38095b296d0Smrg			 (pTrident->Chipset == IMAGE985)  || \
38195b296d0Smrg			 (pTrident->Chipset == CYBERBLADEI7)  || \
38295b296d0Smrg			 (pTrident->Chipset == CYBERBLADEI7D)  || \
38395b296d0Smrg			 (pTrident->Chipset == CYBERBLADEI1)  || \
38495b296d0Smrg			 (pTrident->Chipset == CYBERBLADEI1D)  || \
38595b296d0Smrg			 (pTrident->Chipset == CYBERBLADEAI1)  || \
38695b296d0Smrg			 (pTrident->Chipset == CYBERBLADEAI1D)  || \
38795b296d0Smrg			 (pTrident->Chipset == BLADE3D) || \
38895b296d0Smrg			 (pTrident->Chipset == CYBERBLADEXPAI1) || \
38995b296d0Smrg			 (pTrident->Chipset == CYBERBLADEXP4) || \
39095b296d0Smrg			 (pTrident->Chipset == XP5) || \
39195b296d0Smrg			 (pTrident->Chipset == BLADEXP))
39295b296d0Smrg
39395b296d0Smrg/*
39495b296d0Smrg * Trident DAC's
39595b296d0Smrg */
39695b296d0Smrg
39795b296d0Smrg#define TKD8001		0
39895b296d0Smrg#define TGUIDAC		1
39995b296d0Smrg
40095b296d0Smrg/*
40195b296d0Smrg * Video Flags
40295b296d0Smrg */
40395b296d0Smrg
40495b296d0Smrg#define VID_ZOOM_INV 0x1
40595b296d0Smrg#define VID_ZOOM_MINI 0x2
40695b296d0Smrg#define VID_OFF_SHIFT_4 0x4
40795b296d0Smrg#define VID_ZOOM_NOMINI 0x8
40895b296d0Smrg#define VID_DOUBLE_LINEBUFFER_FOR_WIDE_SRC 0x10
40995b296d0Smrg#endif /* _TRIDENT_H_ */
41095b296d0Smrg
411