| History log of /src/sys/arch/mips/cavium/octeonvar.h |
| Revision | | Date | Author | Comments |
| 1.18 |
| 26-Jan-2022 |
andvar | remove double t from targeted, add missing r to arbitrary
And fix few more typos along the way in comments and man pages.
|
| 1.17 |
| 28-Jul-2020 |
simonb | Change cpus_booted back to a simple variable instead of a kcpuset.
octeon_cpu_spinup() was trying to set CPU status immediately on kernel
startup _well_ before the kcpuset was initialised.
|
| 1.16 |
| 17-Jul-2020 |
jmcneill | Remove 2 CPU limit in OCTEON interrupt controller driver.
|
| 1.15 |
| 17-Jul-2020 |
jmcneill | Cleanup handling of multiple banks.
|
| 1.14 |
| 16-Jul-2020 |
jmcneill | Support 128 IRQs instead of 64. This is icky and needs to be cleaned up.
|
| 1.13 |
| 23-Jun-2020 |
simonb | Cleanup - mostly removing unused code and defines.
|
| 1.12 |
| 22-Jun-2020 |
simonb | Remove unmaintained CNMAC_DEBUG debug code.
|
| 1.11 |
| 18-Jun-2020 |
simonb | General code cleanup:
- use generic macros for building IO and IOBDMA addresses instead
of many different variations of the same theme.
- use #define's for CVMSEG addresses instead of magic numbers.
- use __BIT/__BITS/__SHIFTIN/__SHIFTOUT in most places, instead of
foo_SHIFT defines or (worse) shifting by magic numbers.
No functional changes.
|
| 1.10 |
| 15-Jun-2020 |
simonb | Finish CPU core support for Octeon Cavium CN70XX:
- decode actual CPU name
- per CPU core reset logic (partially adapted from OpenBSD)
- handle Octeon 3 ioclock rate differences to other cores (from OpenBSD)
|
| 1.9 |
| 05-Jun-2020 |
simonb | Rework CVMSEG LM usage a litte:
- remove unused LM slots
- use #defines for defining the size of CVMSEG LM users
XXX: Need to dynamically set CVMMEMCTL[LMEMSZ] during startup so we can
both adapt to any future increase in CVMSEG LM usage and not waste
any more L2 that we need to.
XXX: Still need to move general IOBDMA conf to a different (new?) header.
|
| 1.8 |
| 31-May-2020 |
simonb | Rename all Cavium Octeon device driver functions, structs etc from
"octeon_foo" to "octfoo", except "octeon_eth" becomes "cnmac".
|
| 1.7 |
| 13-May-2020 |
riastradh | Rework octeon_rnm(4) random number generator driver.
- Do a little on-line self-test for fun.
- Draw raw samples from the ring oscillators.
- Draw substantially more samples:
=> early RO samples seem to have considerably lower entropy
=> consecutive RO samples are not independent
- Make sure to use rnd_add_data_sync in the callback.
=> not technically needed in HEAD, but would be needed for pullup
|
| 1.6 |
| 19-Apr-2018 |
christos | branches: 1.6.6;
s/static inline/static __inline/g for consistency.
|
| 1.5 |
| 11-Jul-2016 |
matt | branches: 1.5.16; 1.5.18;
Change MIPS to use the common pmap code.
Switch to 8KB pages on CPUs with a R4K MMU.
Simplify cache code.
Merge in most of changes from matt-mips64 branch
|
| 1.4 |
| 10-Jun-2015 |
matt | Transition from __cpuset_t to kcpuset_t *. This brings the local pmap one
step closer to uvm/pmap, its eventual replacement. Tested on ERLITE MP kernel.
|
| 1.3 |
| 06-Jun-2015 |
matt | Add wdog support
cleanup IPI and MP support
Add NMI support.
|
| 1.2 |
| 01-Jun-2015 |
matt | branches: 1.2.2;
Rework cavium support in preparation for MULTIPROCESSOR support
|
| 1.1 |
| 29-Apr-2015 |
hikaru | Initial import of Cavium Octeon and Octeon Plus SoC and
specifically Ubiquiti Networks EdgeRouter LITE support.
Currently the ethernet and uart are worked.
This support was contributed by Internet Initiative Japan Inc.
|
| 1.2.2.4 |
| 05-Oct-2016 |
skrll | Sync with HEAD
|
| 1.2.2.3 |
| 22-Sep-2015 |
skrll | Sync with HEAD
|
| 1.2.2.2 |
| 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 |
| 01-Jun-2015 |
skrll | file octeonvar.h was added on branch nick-nhusb on 2015-06-06 14:40:01 +0000
|
| 1.5.18.1 |
| 22-Apr-2018 |
pgoyette | Sync with HEAD
|
| 1.5.16.2 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.5.16.1 |
| 11-Jul-2016 |
jdolecek | file octeonvar.h was added on branch tls-maxphys on 2017-12-03 11:36:27 +0000
|
| 1.6.6.1 |
| 19-May-2020 |
martin | Pull up following revision(s) (requested by simonb in ticket #918):
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.3
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.4
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.5
sys/arch/mips/cavium/dev/octeon_rnm.c: revision 1.6 (+ patch)
sys/arch/mips/cavium/dev/octeon_rnmreg.h: revision 1.2
sys/arch/mips/cavium/dev/octeon_rnmreg.h: revision 1.3
sys/arch/mips/cavium/octeonvar.h: revision 1.7
Add a few more bits.
XXX convert to __BITS.
--
If bus_space_map fails, just don't attach the driver instead of panicing.
Check RNG built in self test, don't attach if that fails too.
--
Oceton RNG/RNM driver modernisation to fit new entropy world order by
riastradh@, with some tweaks to get working in RNG mode.
XXX TODO: work out how to get raw entropy mode working.
--
Rework octeon_rnm(4) random number generator driver.
- Do a little on-line self-test for fun.
- Draw raw samples from the ring oscillators.
- Draw substantially more samples:
=3D> early RO samples seem to have considerably lower entropy
=3D> consecutive RO samples are not independent
- Make sure to use rnd_add_data_sync in the callback.
=3D> not technically needed in HEAD, but would be needed for pullup
--
Adjust entropy estimate for the Octeon.
We are hedging in serial and in parallel, and more conservative than
the Linux driver from Cavium seems to be, so although I don't know
exactly what the thermal jitter of the device is, this seems like a
reasonable compromise.
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