Cross Reference: /src/sys/arch/mips/rmi/rmixl

History log of /src/sys/arch/mips/rmi/rmixl_fmn.c
Revision	Date	Author	Comments
1.5	11-Aug-2023	mrg	avoid uninitialised variable warnings (likely incorrect ones.) cry wolved by GCC 12.
1.4	27-Sep-2011	jym	Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments. Fix call sites to reflect the new definition. Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
1.3	29-Apr-2011	matt	cpu_number() return an u_int, use %u for format
1.2	20-Feb-2011	matt	branches: 1.2.2; Merge forward from matt-nb5-mips64.
1.1	21-Mar-2010	cliff	branches: 1.1.2; 1.1.4; 1.1.6; file rmixl_fmn.c was initially added on branch matt-nb5-mips64.
1.1.6.1	05-Mar-2011	bouyer	Sync with HEAD
1.1.4.1	06-Jun-2011	jruoho	Sync with HEAD.
1.1.2.13	15-Dec-2012	matt	Add initial support for XLP II (XLP2XX/XLP1XX).
1.1.2.12	30-Mar-2012	matt	Deal with station ids without names (not all XLS have all stations).
1.1.2.11	19-Jan-2012	matt	Unbreak things so that XLS/XLR boot again. :)
1.1.2.10	19-Jan-2012	matt	Change struct rmixl_cpu_softc to cpu_softc and remove casts. Fix IPIs. More FMN cleanup.
1.1.2.9	04-Jan-2012	matt	Rework Fast Messaging Network support (it's now lockless). Workaround a problem with bus 0 BAR sizing causing the registers behind the BAR to become inaccessible. Move much/most of the startup code from evbmips/rmixl/machdep to mips/rmi/rmixl_machdep.c Move the code to find the XLP variant to the early boot so it can be used early. 8bit and 16bit accessed to PCI bus 0 cause cache errors so chagne the access of pci mem to 32bits.
1.1.2.8	24-Dec-2011	matt	Add XLP support (i2c, console, pci, sdhc works).
1.1.2.7	29-Apr-2011	matt	Major merge to/from current. Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL Adds support for emulation of rdhwr $3,$29 instruction. Major cleanup of SMP code. (stable on multi-core / single thread per core) llsc locking code only used in MP capable kernels.
1.1.2.6	08-Feb-2011	cliff	- eliminate assumptions that cpuid 0 is primary - distinguish between cpuid and cpu index.
1.1.2.5	05-Feb-2011	cliff	- obtain rmixl_intr_lock before rmixl_vec_establish(), he expects that lock is held
1.1.2.4	13-Apr-2010	cliff	add TNF License and copyright.
1.1.2.3	13-Apr-2010	cliff	improve names to avoid confusion between storage and pointers
1.1.2.2	29-Mar-2010	cliff	- use the new chip-type-specific names for logical station IDs - dimension fmn_intrhand[] by max number of station for any RMIXL chip type - add FMN station tables and info for XLR; these are untested. - rmixl_fmn_init_core() now calls chip-type-specific init subfunctions which just grab the appropriate station table and info strutures.
1.1.2.1	21-Mar-2010	cliff	add device driver for RMI Fast Message Network
1.2.2.3	31-May-2011	rmind	sync with head
1.2.2.2	05-Mar-2011	rmind	sync with head
1.2.2.1	20-Feb-2011	rmind	file rmixl_fmn.c was added on branch rmind-uvmplock on 2011-03-05 20:51:10 +0000

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