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History log of /src/sys/arch/mips/rmi/rmixl_subr.S
RevisionDateAuthorComments
 1.7  26-Jul-2020  simonb Use EIMR/EIRR regs definitions from <mips/cpuregs.h>
 1.6  07-Jun-2015  matt Define COP0 register that use select value in <mips/cpuregs.h>
Use those new definitions
 1.5  14-Apr-2011  matt branches: 1.5.14; 1.5.32;
Use .set arch=xlr to access RMI specific instructions.
 1.4  14-Apr-2011  cliff - fix RCSID
- add rmixl_eirr_ack() to ack the EIRR, using COP0_SYNC & JR_HB_RA as needed
- in rmixl_cpu_trampoline, remove old KSEG0 address reconstruction
of trampoline args pointer, and comment/explain the new way
- also in rmixl_cpu_trampoline, remove old watchpoint hack used for debugging
 1.3  20-Feb-2011  matt Merge forward from matt-nb5-mips64.
 1.2  14-Dec-2009  matt branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Merge from matt-nb5-mips64
Merge mips-specific arch files.
 1.1  13-Nov-2009  cliff branches: 1.1.2;
file rmixl_subr.S was initially added on branch matt-nb5-mips64.
 1.1.2.12  19-Jan-2012  matt KX needs to be enabled for n32
 1.1.2.11  06-Dec-2011  matt Use MIPS_COP_0_OSSCRATCH instead $22
 1.1.2.10  03-Dec-2011  matt Rework things a bit for the XLR/XLS/XLP TLB. Before dealing with the TLB when
MP on the XL?, disable interrupts and take out a lock to prevent concurrent
updates to the TLB. In the TLB miss and invalid exception handlers, if the
lock is already owned by another CPU, simply return from the exception and
let it continue or restart as appropriate. This prevents concurrent TLB
exceptions in multiple threads from possibly updating the TLB multiple times
for a single address.
 1.1.2.9  26-May-2011  matt Add MIPS64_RMIXL (XLR/XLS) and MIPS64R2_RMIXL (XLP). This allows the kernel
to treat this special which is needed for MP support. When accessing the TLB,
always lock the TLB before hand. If in the miss handlers, the TLB is already
locked let trap deal with the exeception.
 1.1.2.8  29-Apr-2011  matt Major merge to/from current.
Adds MIPS32/MIPS64 R2 support (24k, 74k, etc.) including COP0_USERLOCAL
Adds support for emulation of rdhwr $3,$29 instruction.
Major cleanup of SMP code. (stable on multi-core / single thread per core)
llsc locking code only used in MP capable kernels.
 1.1.2.7  13-Apr-2010  cliff add TNF License and copyright.
 1.1.2.6  22-Mar-2010  cliff - in rmixlfw_wakeup_cpu, properly nuke the upper half of sp
before OR-ing in KSEG0_START. This is only needed in _LP64 case.
- in rmixl_cpu_trampoline:
trampoline args addr needs reconstructing the upper half only in _LP64 case.
delete set of MIPS_SR_INT_IE bit.
use REG_L instead of PTR_L to load trampoline args
so we get 64 bit loads in both 32 and 64 bit kernels.
 1.1.2.5  21-Mar-2010  cliff - add rmixlfw_wakeup_cpu, performs callback to RMI firmware wakeup function
- add rmixl_cpu_trampoline, entry point for CPU wakeup following
RMI firmware wakeup callback.
 1.1.2.4  10-Feb-2010  cliff save gp and t8 before callback to firmware
 1.1.2.3  24-Jan-2010  cliff - cpu_rmixl_attach calls cpu_setup_trampoline to get control of
subordinate CPUs from firmware by using the 'wakeup' callback method
and into cpu_wakeup_trampoline where they just spin pending further work.
- the callback requires re-basing the stack pointer to be in KSEG0,
done in asm subroutine rmixlfw_wakeup_cpu
 1.1.2.2  31-Dec-2009  matt Indicate that some RMI mfcr/mtcr can't be used in O32
 1.1.2.1  13-Nov-2009  cliff - rmixls_subr.S is replaced by rmixl_subr.S
- those subroutine names changed accordingly
 1.2.10.1  05-Mar-2011  bouyer Sync with HEAD
 1.2.8.1  06-Jun-2011  jruoho Sync with HEAD.
 1.2.6.2  21-Apr-2011  rmind sync with head
 1.2.6.1  05-Mar-2011  rmind sync with head
 1.2.4.2  11-Mar-2010  yamt sync with head
 1.2.4.1  14-Dec-2009  yamt file rmixl_subr.S was added on branch yamt-nfs-mp on 2010-03-11 15:02:41 +0000
 1.5.32.1  22-Sep-2015  skrll Sync with HEAD
 1.5.14.1  03-Dec-2017  jdolecek update from HEAD

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