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History log of /src/sys/arch/riscv/starfive/jh7110_clkc.c
RevisionDateAuthorComments
 1.8  17-Jan-2025  skrll branches: 1.8.4;
risc-v: Don't attach the JH7110 ISP clock controller

Something isn't quite right with the ISP clock controller and it causes
problems with sysctl -A. As it's not currently used don't attach it.
 1.7  17-Jan-2025  skrll Order the clock controllers consistently. NFC.
 1.6  20-Sep-2024  rin riscv/jh7110_clkc: Missing <sys/kmem.h> include
 1.5  18-Sep-2024  skrll risc-v: add reset support to the JH7110 SOC clock controller driver
 1.4  18-Sep-2024  skrll Match "Image-Signal-Process" clock controller and only aprint_debug the
state of "System" and "Always-On" clocks.
 1.3  18-Sep-2024  skrll #define<space> consistency
 1.2  09-Sep-2024  skrll Whitespace
 1.1  19-Aug-2024  skrll Add a clock driver for the JH7110 SoC found in the StarFive VisionFive 2
SBC.

It's not fully functional as something is wrong for the
Image-Signal-Process controller which is why it's #if 0'd out.
 1.8.4.2  02-Aug-2025  perseant Sync with HEAD
 1.8.4.1  17-Jan-2025  perseant file jh7110_clkc.c was added on branch perseant-exfatfs on 2025-08-02 05:56:05 +0000

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