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History log of /src/sys/dev/pci/pciide_piix_reg.h
RevisionDateAuthorComments
 1.16  09-Feb-2024  andvar fix spelling mistakes, mainly in comments and log messages.
 1.15  04-Jul-2018  kamil Avoid undefined behavior in pciiide macros

Cast the 'bytes' argument in PIIX_IDETIM_SET() and PIIX_IDETIM_CLEAR()
to unsigned int. This prevents UB because of shifting the bits and changing
the bit of signedness.

sys/dev/pci/piixide.c:714:11, left shift of 65535 by 16 places cannot be represented in type 'int'
sys/dev/pci/piixide.c:720:11, left shift of 32768 by 16 places cannot be represented in type 'int'

Detected with Kernel Undefined Behavior Sanitizer.

Reported by <Harry Pantazis>
 1.14  19-Oct-2009  bouyer branches: 1.14.62; 1.14.64;
Remove closes 3 & 4 from my licence. Lots of thanks to Soren Jacobsen
for the booring work !
 1.13  25-Dec-2007  perry branches: 1.13.10;
Convert many of the uses of __attribute__ to equivalent
__packed, __unused and __dead macros from cdefs.h
 1.12  03-Sep-2006  xtraeme branches: 1.12.28; 1.12.34; 1.12.38; 1.12.42;
* Add support for ICH8 and ICH8M SATA/RAID controllers.
* If the controller is in AHCI, ask for SATA IDE mode of operation.

jsg@openbsd says:

"X60/T60 Thinkpads are shipped in AHCI configuration by default,
this makes them work without changing a BIOS option."

Tested by eye of the beholder. From OpenBSD.

Ok'ed tls.
 1.11  17-Jun-2006  jmcneill branches: 1.11.2;
Forgot to commit the register definition for PIIX_UDMATIM.
 1.10  11-Dec-2005  christos branches: 1.10.4; 1.10.8; 1.10.14; 1.10.16;
merge ktrace-lwp.
 1.9  27-Feb-2005  perry branches: 1.9.4;
nuke trailing whitespace
 1.8  05-Oct-2003  bouyer branches: 1.8.8; 1.8.10;
Remove references to University of California from my copyright notices.
 1.7  23-Apr-2002  bouyer branches: 1.7.10;
More copyright fixes, pointed out by Thomas. Thanks !
 1.6  21-Oct-2001  thorpej Make the various timing, etc. tables const, and add the __unused__
attribute to them, just in case something other than the pciide driver
proper needs to pull in the header.
 1.5  05-Jan-2001  bouyer branches: 1.5.2; 1.5.4;
Add support for Ultra/100 on intel ICH2; from Tomokazu HARADA in kern/11747.
 1.4  15-May-2000  bouyer branches: 1.4.4;
Sync my copyrigth notice.
 1.3  30-Aug-1999  bouyer branches: 1.3.2;
Add support for Intel 810 chipset (ICH/ICH0).
While I'm there merge back piix_channel_map into piix_chip_map.
 1.2  12-Oct-1998  bouyer branches: 1.2.6;
Merge bouyer-ide
 1.1  04-Jun-1998  bouyer branches: 1.1.2;
file pciide_pIIx_reg.h was initially added on branch bouyer-ide.
 1.1.2.4  04-Oct-1998  bouyer atavar.h: drv_softc is a struct device * instead of void*, as it's mostly
used for dv_xname
wd.c: convert for drv_softc type change, printf cleanup
wdc.c: always call ata_get_params() (params was used initialised with
non-32bit controllers, leaving to bogus PIO/DMA mode report).
Cleaup of the PIO/DMA mode message.
pciide_piix_reg.h: Fix definition of PIIX_IDETIM_CLEAR (unused before)
pciide.c: add a method do disable a channel on know device. If a channel
doesn't have any drive, we disable it and free its resources if disable
was successfull. This should help with laptops where the second channel
of the PIIX4 is unused but not disabled by BIOS. On such laptops,
irq15 can be used for PCMCIA but it was claimed by pciide.
Misc printf cleanup.
wdc_isa.c: printf cleanup.
 1.1.2.3  10-Jun-1998  bouyer Fix confusion between binary and hex in DMA modes: 0x10 -> 0x02.
 1.1.2.2  10-Jun-1998  bouyer - Fix timing settings for DMA: the controller was always set up to use
DMA mode 0 (compatible).
- The 2 Ultra-dma registers are in fact one 32-bit register.
Change the macros and setup in a way it may now work (but still untested,
thus not enabled by default).
- For DMA mode 1, use a more efficient timing than the one suggested
by intel.
Some work is still needed here to get ATAPI DMA working (should be done soon).
 1.1.2.1  04-Jun-1998  bouyer Commit changes to the IDE system in a branch. This allows a better separation
between higth-level and low-level (i.e. registers read/write) and generalize
the queue for all commands. This also add supports for IDE DMA.
 1.2.6.1  07-Jul-2000  he Apply patch (requested by bouyer):
Add support for the following PCIIDE controllers:
o AMD 756
o CMD PCI0648 and PCI0649
o Hightpoint HPT366
o OPTi 82c621 (and a few of its derivatives)
o Promise Ultra/33 and Ultra/66
o Intel 82801 (ICH/ICH0)
Also fix PR#10437 (detect more ATAPI devices).
 1.3.2.2  05-Jan-2001  bouyer Sync with HEAD
 1.3.2.1  20-Nov-2000  bouyer Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
 1.4.4.1  04-Feb-2001  he Pull up revision 1.5 (requested by bouyer):
Add support for Ultra/100 on Intel ICH2.
 1.5.4.2  23-Jun-2002  jdolecek catch up with -current on kqueue branch
 1.5.4.1  10-Jan-2002  thorpej Sync kqueue branch with -current.
 1.5.2.2  20-Jun-2002  nathanw Catch up to -current.
 1.5.2.1  22-Oct-2001  nathanw Catch up to -current.
 1.7.10.4  04-Mar-2005  skrll Sync with HEAD.

Hi Perry!
 1.7.10.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.7.10.2  18-Sep-2004  skrll Sync with HEAD.
 1.7.10.1  03-Aug-2004  skrll Sync with HEAD
 1.8.10.1  19-Mar-2005  yamt sync with head. xen and whitespace. xen part is not finished.
 1.8.8.1  29-Apr-2005  kent sync with -current
 1.9.4.3  21-Jan-2008  yamt sync with head
 1.9.4.2  30-Dec-2006  yamt sync with head.
 1.9.4.1  21-Jun-2006  yamt sync with head.
 1.10.16.1  13-Jul-2006  gdamore Merge from HEAD.
 1.10.14.1  19-Jun-2006  chap Sync with head.
 1.10.8.2  14-Sep-2006  yamt sync with head.
 1.10.8.1  26-Jun-2006  yamt sync with head.
 1.10.4.1  09-Sep-2006  rpaulo sync with head
 1.11.2.1  07-Sep-2006  riz Pull up following revision(s) (requested by xtraeme in ticket #117):
sys/dev/pci/piixide.c: revision 1.29
sys/dev/pci/pciide_piix_reg.h: revision 1.12
* Add support for ICH8 and ICH8M SATA/RAID controllers.
* If the controller is in AHCI, ask for SATA IDE mode of operation.
jsg@openbsd says:
"X60/T60 Thinkpads are shipped in AHCI configuration by default,
this makes them work without changing a BIOS option."
Tested by eye of the beholder. From OpenBSD.
Ok'ed tls.
 1.12.42.1  02-Jan-2008  bouyer Sync with HEAD
 1.12.38.1  26-Dec-2007  ad Sync with head.
 1.12.34.1  18-Feb-2008  mjf Sync with HEAD.
 1.12.28.1  09-Jan-2008  matt sync with HEAD
 1.13.10.1  11-Mar-2010  yamt sync with head
 1.14.64.1  10-Jun-2019  christos Sync with HEAD
 1.14.62.1  28-Jul-2018  pgoyette Sync with HEAD

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