Cross Reference: /src/sys/arch/arm/nvidia/tegra124

Lines Matching defs:clk_parent
803 	struct clk *clk, *clk_parent;
810 		clk_parent = clk_get(&sc->sc_clkdom,
812 		KASSERT(clk_parent != NULL);
814 		error = clk_set_parent(clk, clk_parent);
818 			    clk->name, clk_parent->name, error);
820 		clk_put(clk_parent);
1056 	struct clk *clk_parent;
1059 	clk_parent = tegra124_car_clock_get_parent(sc, TEGRA_CLK_BASE(tclk));
1060 	if (clk_parent == NULL)
1062 	const u_int rate_parent = tegra124_car_clock_get_rate(sc, clk_parent);
1211 	struct clk *clk_parent;
1213 	clk_parent = tegra124_car_clock_get_parent(sc, TEGRA_CLK_BASE(tclk));
1214 	if (clk_parent == NULL)
1216 	const u_int parent_rate = tegra124_car_clock_get_rate(sc, clk_parent);
1238 	struct clk *clk_parent;
1243 	clk_parent = tegra124_car_clock_get_parent(sc, TEGRA_CLK_BASE(tclk));
1244 	const u_int parent_rate = tegra124_car_clock_get_rate(sc, clk_parent);
1285 	struct clk *clk_parent;
1291 	clk_parent = tegra124_car_clock_get_parent(sc, TEGRA_CLK_BASE(tclk));
1292 	if (clk_parent == NULL)
1294 	const u_int parent_rate = tegra124_car_clock_get_rate(sc, clk_parent);
1404 	struct clk *clk_parent;
1413 		clk_parent = tegra124_car_clock_get_parent(priv, clk);
1414 		if (clk_parent == NULL)
1416 		return tegra124_car_clock_get_rate(priv, clk_parent);
1430 	struct clk *clk_parent;
1439 		clk_parent = tegra124_car_clock_get_parent(priv, clk);
1440 		if (clk_parent == NULL)
1442 		return tegra124_car_clock_set_rate(priv, clk_parent,
1459 	struct clk *clk_parent;
1462 		clk_parent = tegra124_car_clock_get_parent(priv, clk);
1463 		if (clk_parent == NULL)
1465 		return tegra124_car_clock_enable(priv, clk_parent);
1484     struct clk *clk_parent)
1487 	struct tegra_clk *tclk_parent = TEGRA_CLK_PRIV(clk_parent);
1492 		if (nclk_parent == clk_parent || nclk_parent == NULL)
1495 		    clk_parent);
OpenGrok
