Home | History | Annotate | Download | only in nvidia
History log of /src/sys/arch/arm/nvidia/tegra124_car.c
RevisionDateAuthorComments
 1.24  19-Mar-2022  riastradh tegra124_car(4): Attach rndsource synchronously.

It looks like the original motivation for deferring to
config_interrupts was to wait until softint_establish worked. But
this no longer needs to use softints to deliver the entropy, so
that's moot.

Doing this synchronously gives us a better chance for more entropy
earlier.
 1.23  19-Mar-2022  riastradh tegra124_car(4): No need for rnd lock -- delete it.

This only ever reads from a single device register, so no need to
serialize access.

XXX This should really have a hardware-specific health test, but I
can't find any documentation on the underlying physical entropy
source.
 1.22  27-Jan-2021  thorpej Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().

Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
 1.21  12-Aug-2020  jmcneill branches: 1.21.2;
Add CEC clock
 1.20  30-Apr-2020  riastradh rnd_attach_source calls the callback itself now.

No need for every driver to explicitly call it to prime the pool.

Eliminate now-unused <sys/rndpool.h>.
 1.19  13-Oct-2019  skrll Restore %# for PRIxBUSADDR
 1.18  13-Oct-2019  skrll Use PRIxBUSADDR
 1.17  09-Mar-2019  jakllsch Add Tegra124 "mselect" clock and two PCIe-related clocks it sources.

With mainline u-boot (not starting the pci subsystem in the firmware):
Gets to a root prompt instead of hanging during tegrapcie attach, but
PCIe remains non-functional without a modern "xusbpad" phy driver for
Tegra124 (needed to configure the lane map).
 1.16  26-Sep-2018  jmcneill Register clocks with clk_attach
 1.15  09-Sep-2018  aymeric Pass clock provider's phandle to fdtbus_clock_controller_func.decode()
and update callers.

This allows to accomodate clock managers whose clocks are identified
directly by a clock instead of a pair (clock provider, index).

ok jmcneill@ on port-arm
 1.14  21-Jul-2017  jmcneill branches: 1.14.2; 1.14.4; 1.14.6;
Add support for NVIDIA Tegra X1.
 1.13  29-Apr-2017  jmcneill add APB-DMA clock gate
 1.12  26-Apr-2017  jmcneill branches: 1.12.2;
Set host1x parent to pll_p_out0
 1.11  22-Apr-2017  jmcneill Fix fractional divider calculations and round down for sdmmc clocks.
 1.10  16-Apr-2017  jmcneill Add support for multiple clock domains in clk API.
 1.9  14-Apr-2017  jmcneill Add GPU gating clock
 1.8  12-Jan-2017  maya branches: 1.8.2;
fix off by one.

ok riastradh
 1.7  17-Dec-2016  riastradh Simplify bcm2835, tegra, and am335x hardware RNG drivers.

Tested by nick@.
 1.6  08-Sep-2016  jakllsch Add Tegra124 CAR bits to support the XUSB xHCI core.
 1.5  02-Sep-2016  jakllsch Source of pll_p_out5 is not div_pllp_out5 but div_pll_p_out5.
 1.4  17-Aug-2016  jakllsch Complete implementation of clocks for SPI controllers in tegra124_car.
 1.3  17-Aug-2016  jakllsch Fix I2C clock calculations. Previously I2C clocks were half what was
requested. The I2C clock registers have a LSB of one-half rather than
one-whole like the rest of them.
 1.2  23-Dec-2015  jmcneill branches: 1.2.2; 1.2.4;
fix divider calculations for hdmi, and treat clock ID 211 as pll_p_out0 instead of directly pll_p
 1.1  22-Dec-2015  jmcneill Switch Tegra over to fdt based clocks and reset controls.
 1.2.4.3  26-Apr-2017  pgoyette Sync with HEAD
 1.2.4.2  20-Mar-2017  pgoyette Sync with HEAD
 1.2.4.1  07-Jan-2017  pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
 1.2.2.5  28-Aug-2017  skrll Sync with HEAD
 1.2.2.4  05-Feb-2017  skrll Sync with HEAD
 1.2.2.3  05-Oct-2016  skrll Sync with HEAD
 1.2.2.2  27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.2.2.1  23-Dec-2015  skrll file tegra124_car.c was added on branch nick-nhusb on 2015-12-27 12:09:31 +0000
 1.8.2.1  21-Apr-2017  bouyer Sync with HEAD
 1.12.2.1  02-May-2017  pgoyette Sync with HEAD - tag prg-localcount2-base1
 1.14.6.2  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.14.6.1  10-Jun-2019  christos Sync with HEAD
 1.14.4.1  30-Sep-2018  pgoyette Ssync with HEAD
 1.14.2.2  03-Dec-2017  jdolecek update from HEAD
 1.14.2.1  21-Jul-2017  jdolecek file tegra124_car.c was added on branch tls-maxphys on 2017-12-03 11:35:54 +0000
 1.21.2.1  03-Apr-2021  thorpej Sync with HEAD.

RSS XML Feed