Lines Matching refs:CLK_DIV
332 #define CLK_DIV(_name, _parent, _reg, _bits) { \
534 CLK_DIV("div_uarta", "mux_uarta",
536 CLK_DIV("div_uartb", "mux_uartb",
538 CLK_DIV("div_uartc", "mux_uartc",
540 CLK_DIV
542 CLK_DIV("div_sdmmc1", "mux_sdmmc1",
544 CLK_DIV("div_sdmmc2", "mux_sdmmc2",
546 CLK_DIV("div_sdmmc3", "mux_sdmmc3",
548 CLK_DIV("div_sdmmc4", "mux_sdmmc4",
550 CLK_DIV("div_i2c1", "mux_i2c1",
552 CLK_DIV("div_i2c2", "mux_i2c2",
554 CLK_DIV("div_i2c3", "mux_i2c3",
556 CLK_DIV("div_i2c4", "mux_i2c4",
558 CLK_DIV("div_i2c5", "mux_i2c5",
560 CLK_DIV("div_i2c6", "mux_i2c6",
562 CLK_DIV("div_spi1", "mux_spi1",
564 CLK_DIV("div_spi2", "mux_spi2",
566 CLK_DIV("div_spi3", "mux_spi3",
568 CLK_DIV("div_spi4", "mux_spi4",
570 CLK_DIV("div_spi5", "mux_spi5",
572 CLK_DIV("div_spi6", "mux_spi6",
574 CLK_DIV("div_sata_oob", "mux_sata_oob",
576 CLK_DIV("div_sata", "mux_sata",
578 CLK_DIV("div_hda2codec_2x", "mux_hda2codec_2x",
580 CLK_DIV("div_hda", "mux_hda",
582 CLK_DIV("div_soc_therm", "mux_soc_therm",
584 CLK_DIV("div_mselect", "mux_mselect",
586 CLK_DIV("div_tsensor", "mux_tsensor",
588 CLK_DIV("div_host1x", "mux_host1x",
590 CLK_DIV("div_hdmi", "mux_hdmi",
592 CLK_DIV("div_pll_p_out5", "pll_p",
594 CLK_DIV("xusb_host_src", "mux_xusb_host",
596 CLK_DIV("xusb_ss_src", "mux_xusb_ss",
598 CLK_DIV("xusb_fs_src", "mux_xusb_fs",
600 CLK_DIV("xusb_falcon_src", "mux_xusb_falcon",
Indexes created Sat Oct 18 17:09:52 GMT 2025