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Lines Matching refs:raw_div

1222 tegra124_car_clock_calc_rate_frac_div(u_int rate, u_int raw_div)
1224 	raw_div += 2;
1226 	rate += raw_div - 1;
1227 	rate /= raw_div;
1247 	const u_int raw_div = __SHIFTOUT(v, tdiv->bits);
1256 		rate = parent_rate * 1 / (raw_div + 1);
1264 			    parent_rate, raw_div);
1271 		    raw_div);
1286 	u_int raw_div;
1298 	raw_div = __SHIFTOUT(tdiv->bits, tdiv->bits);
1309 			raw_div = (parent_rate * 2) / rate - 2;
1317 			raw_div = (parent_rate * 2) / rate - 2;
1329 			raw_div = parent_rate / rate - 1;
1336 			for (raw_div = 0x00; raw_div <= 0xff; raw_div++) {
1339 					parent_rate, raw_div);
1343 			if (raw_div == 0x100)
1349 			raw_div = (parent_rate * 2) / rate - 2;
1354 	v |= __SHIFTIN(raw_div, tdiv->bits);