Lines Matching defs:nkmp
138 const int cluster = clk->u.nkmp.reg == PLL_C0CPUX_CTRL_REG ? 0 : 1;
139 struct sunxi_ccu_nkmp *nkmp = &clk->u.nkmp;
155 val = CCU_READ(sc, nkmp->reg);
158 CCU_WRITE(sc, nkmp->reg, val);
161 while ((CCU_READ(sc, PLL_STABLE_STATUS_REG) & nkmp->lock) == 0)
178 .u.nkmp.reg = PLL_C0CPUX_CTRL_REG,
179 .u.nkmp.parent = "hosc",
180 .u.nkmp.n = __BITS(15,8),
181 .u.nkmp.k = 0,
182 .u.nkmp.m = __BITS(1,0),
183 .u.nkmp.p = __BIT(16),
184 .u.nkmp.enable = __BIT(31),
185 .u.nkmp.flags = SUNXI_CCU_NKMP_SCALE_CLOCK |
188 .u.nkmp.lock = __BIT(0), /* PLL_STABLE_STATUS_REG */
189 .u.nkmp.table = NULL,
199 .u.nkmp.reg = PLL_C1CPUX_CTRL_REG,
200 .u.nkmp.parent = "hosc",
201 .u.nkmp.n = __BITS(15,8),
202 .u.nkmp.k = 0,
203 .u.nkmp.m = __BITS(1,0),
204 .u.nkmp.p = __BIT(16),
205 .u.nkmp.enable = __BIT(31),
206 .u.nkmp.flags = SUNXI_CCU_NKMP_SCALE_CLOCK |
209 .u.nkmp.lock = __BIT(1), /* PLL_STABLE_STATUS_REG */
210 .u.nkmp.table = NULL,
Indexes created Mon Oct 13 05:10:05 GMT 2025