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Lines Matching refs:sc_iwin

159 	sc->sc_iwin[0].iwin_base_lo = VERDE_PMMR_BASE;
160 	sc->sc_iwin[0].iwin_base_hi = 0;
161 	sc->sc_iwin[0].iwin_xlate = VERDE_PMMR_BASE;
162 	sc->sc_iwin[0].iwin_size = VERDE_PMMR_SIZE;
167 		sc->sc_iwin[1].iwin_base_lo = VERDE_OUT_XLATE_MEM_WIN0_BASE |
170 		sc->sc_iwin[1].iwin_base_hi = 0;
172 		sc->sc_iwin[1].iwin_base_lo = 0;
173 		sc->sc_iwin[1].iwin_base_hi = 0;
175 	sc->sc_iwin[1].iwin_xlate = VERDE_OUT_XLATE_MEM_WIN0_BASE;
176 	sc->sc_iwin[1].iwin_size = VERDE_OUT_XLATE_MEM_WIN_SIZE;
179 		sc->sc_iwin[2].iwin_base_lo = memstart |
182 		sc->sc_iwin[2].iwin_base_hi = 0;
184 		sc->sc_iwin[2].iwin_base_lo = 0;
185 		sc->sc_iwin[2].iwin_base_hi = 0;
187 	sc->sc_iwin[2].iwin_xlate = memstart;
188 	sc->sc_iwin[2].iwin_size = memsize;
191 		sc->sc_iwin[3].iwin_base_lo = 0 |
195 		sc->sc_iwin[3].iwin_base_lo = 0;
197 	sc->sc_iwin[3].iwin_base_hi = 0;
198 	sc->sc_iwin[3].iwin_xlate = 0;
199 	sc->sc_iwin[3].iwin_size = 0;
209 	    PCI_MAPREG_MEM_ADDR(sc->sc_iwin[1].iwin_base_lo);
210 	sc->sc_owin[0].owin_xlate_hi = sc->sc_iwin[1].iwin_base_hi;