Lines Matching defs:eirr
108 * do not clear these when acking EIRR
444 * this ensures we enable in EIRR,
705 irtc1 |= vec; /* vector in EIRR */
876 * the real pending status is obtained from EIRR
882 uint64_t eirr;
887 asm volatile("dmfc0 %0, $9, 6;" : "=r"(eirr));
891 printf("%s: cpu%u: eirr %#"PRIx64", eimr %#"PRIx64", mask %#"PRIx64"\n",
892 __func__, cpu_number(), eirr, eimr, ipl_eimr_map[ipl-1]);
896 * reduce eirr to
901 eirr &= ipl_eimr_map[ipl-1];
902 eirr &= ~ipl_eimr_map[ipl];
903 eirr &= ~((MIPS_INT_MASK_5 | MIPS_SOFT_INT_MASK) >> 8);
904 if (eirr == 0)
907 vec = 63 - dclz(eirr);
915 * ack in EIRR, and in PIC if needed,
Indexes created Wed Oct 01 19:09:53 GMT 2025