Lines Matching refs:_SB_MAKEMASK
61 #define M_SYS_RESERVED _SB_MAKEMASK(8,0)
64 #define M_SYS_REVISION _SB_MAKEMASK(8,S_SYS_REVISION)
113 #define M_SYS_L2C_SIZE _SB_MAKEMASK(4,S_SYS_L2C_SIZE)
129 #define M_SYS_NUM_CPUS _SB_MAKEMASK(4,S_SYS_NUM_CPUS)
136 #define M_SYS_PART _SB_MAKEMASK(16,S_SYS_PART)
150 #define M_SYS_SOC_TYPE _SB_MAKEMASK(4,S_SYS_SOC_TYPE)
189 #define M_SYS_WID _SB_MAKEMASK(32,S_SYS_WID)
201 #define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200)
206 #define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN)
212 #define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200)
218 #define M_SYS_WAFERID_300 _SB_MAKEMASK(40,S_SYS_WAFERID_300)
223 #define M_SYS_XPOS _SB_MAKEMASK(6,S_SYS_XPOS)
228 #define M_SYS_YPOS _SB_MAKEMASK(6,S_SYS_YPOS)
246 #define M_SYS_PLL_DIV _SB_MAKEMASK(5,S_SYS_PLL_DIV)
257 #define M_SYS_BOOT_MODE _SB_MAKEMASK(2,S_SYS_BOOT_MODE)
274 #define M_SYS_CONFIG _SB_MAKEMASK(6,S_SYS_CONFIG)
284 #define M_SYS_CLKCOUNT _SB_MAKEMASK(8,S_SYS_CLKCOUNT)
291 #define M_SYS_PLL_IREF _SB_MAKEMASK(2,S_SYS_PLL_IREF)
294 #define M_SYS_PLL_VCO _SB_MAKEMASK(2,S_SYS_PLL_VCO)
297 #define M_SYS_PLL_VREG _SB_MAKEMASK(2,S_SYS_PLL_VREG)
333 #define M_MBOX_INT_3 _SB_MAKEMASK(16,S_MBOX_INT_3)
335 #define M_MBOX_INT_2 _SB_MAKEMASK(16,S_MBOX_INT_2)
337 #define M_MBOX_INT_1 _SB_MAKEMASK(16,S_MBOX_INT_1)
339 #define M_MBOX_INT_0 _SB_MAKEMASK(16,S_MBOX_INT_0)
349 #define M_SCD_WDOG_INIT _SB_MAKEMASK(23,S_SCD_WDOG_INIT)
352 #define M_SCD_WDOG_CNT _SB_MAKEMASK(23,S_SCD_WDOG_CNT)
358 #define M_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(3,S_SCD_WDOG_RESET_TYPE)
382 #define M_SCD_TIMER_INIT _SB_MAKEMASK(23,S_SCD_TIMER_INIT)
388 #define M_SCD_TIMER_CNT _SB_MAKEMASK(V_SCD_TIMER_WIDTH,S_SCD_TIMER_CNT)
401 #define M_SPC_CFG_SRC0 _SB_MAKEMASK(8,S_SPC_CFG_SRC0)
406 #define M_SPC_CFG_SRC1 _SB_MAKEMASK(8,S_SPC_CFG_SRC1)
411 #define M_SPC_CFG_SRC2 _SB_MAKEMASK(8,S_SPC_CFG_SRC2)
416 #define M_SPC_CFG_SRC3 _SB_MAKEMASK(8,S_SPC_CFG_SRC3)
431 #define M_SCD_BERR_TID _SB_MAKEMASK(10,S_SCD_BERR_TID)
436 #define M_SCD_BERR_RID _SB_MAKEMASK(4,S_SCD_BERR_RID)
441 #define M_SCD_BERR_DCODE _SB_MAKEMASK(3,S_SCD_BERR_DCODE)
449 #define M_SCD_L2ECC_CORR_D _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_D)
454 #define M_SCD_L2ECC_BAD_D _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_D)
459 #define M_SCD_L2ECC_CORR_T _SB_MAKEMASK(8,S_SCD_L2ECC_CORR_T)
464 #define M_SCD_L2ECC_BAD_T _SB_MAKEMASK(8,S_SCD_L2ECC_BAD_T)
469 #define M_SCD_MEM_ECC_CORR _SB_MAKEMASK(8,S_SCD_MEM_ECC_CORR)
474 #define M_SCD_MEM_ECC_BAD _SB_MAKEMASK(8,S_SCD_MEM_ECC_BAD)
479 #define M_SCD_MEM_BUSERR _SB_MAKEMASK(8,S_SCD_MEM_BUSERR)
489 #define M_ATRAP_INDEX _SB_MAKEMASK(4,0)
490 #define M_ATRAP_ADDRESS _SB_MAKEMASK(40,0)
493 #define M_ATRAP_CFG_CNT _SB_MAKEMASK(3,S_ATRAP_CFG_CNT)
504 #define M_ATRAP_CFG_AGENTID _SB_MAKEMASK(4,S_ATRAP_CFG_AGENTID)
517 #define M_ATRAP_CFG_CATTR _SB_MAKEMASK(3,S_ATRAP_CFG_CATTR)
560 #define M_SCD_TRACE_CFG_CUR_ADDR _SB_MAKEMASK(8,S_SCD_TRACE_CFG_CUR_ADDR)
569 #define M_SCD_TREVT_ADDR_MATCH _SB_MAKEMASK(4,S_SCD_TREVT_ADDR_MATCH)
582 #define M_SCD_TREVT_REQID _SB_MAKEMASK(4,S_SCD_TREVT_REQID)
587 #define M_SCD_TREVT_RESPID _SB_MAKEMASK(4,S_SCD_TREVT_RESPID)
592 #define M_SCD_TREVT_DATAID _SB_MAKEMASK(4,S_SCD_TREVT_DATAID)
597 #define M_SCD_TREVT_COUNT _SB_MAKEMASK(8,S_SCD_TREVT_COUNT)
606 #define M_SCD_TRSEQ_EVENT4 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT4)
611 #define M_SCD_TRSEQ_EVENT3 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT3)
616 #define M_SCD_TRSEQ_EVENT2 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT2)
621 #define M_SCD_TRSEQ_EVENT1 _SB_MAKEMASK(4,S_SCD_TRSEQ_EVENT1)
648 #define M_SCD_TRSEQ_FUNCTION _SB_MAKEMASK(4,S_SCD_TRSEQ_FUNCTION)
Indexes created Wed Oct 22 00:09:40 GMT 2025