Lines Matching refs:Cache
37 mcr p15, 2, ip, c0, c0, 0 @ set cache level to L1
43 and r3, r0, ip @ get offset into cache line
48 mcr p15, 0, r0, c7, c14, 1 @ wb and inv the D-Cache line to PoC
65 mov r1, r0, lsr r2 @ r1 = cache type
69 mcr p15, 2, r3, c0, c0, 0 @ select cache level
92 1: mcr p15, 0, r3, c7, c14, 2 @ DCCISW (data cache clean and invalidate by set/way)
110 mov r0, #0 @ default back to cache level 0
111 mcr p15, 2, r0, c0, c0, 0 @ select cache level
120 mcr p15, 2, r0, c0, c0, 0 @ set cache level to L1
140 1: mcr p15, 0, r3, c7, c6, 2 @ DCISW (data cache invalidate by set/way)
150 mcr p15, 0, r0, c7, c5, 0 @ invalidate L1 cache
159 /* Disable MMU and cache */
Indexes created Sat Oct 11 19:10:01 GMT 2025